1/*- 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * --- 45 unchanged lines hidden (view full) --- 54 55#include <dev/pci/pcireg.h> 56#include <dev/pci/pcivar.h> 57 58#include <sys/sysctl.h> 59 60#include "mixer_if.h" 61 |
62SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/es137x.c 150832 2005-10-02 15:56:36Z netchild $"); |
63 64#define MEM_MAP_REG 0x14 65 66/* PCI IDs of supported chips */ 67#define ES1370_PCI_ID 0x50001274 68#define ES1371_PCI_ID 0x13711274 69#define ES1371_PCI_ID2 0x13713274 70#define CT5880_PCI_ID 0x58801274 --- 33 unchanged lines hidden (view full) --- 104 bus_dma_tag_t parent_dmat; 105 106 struct resource *reg, *irq; 107 int regtype, regid, irqid; 108 void *ih; 109 110 device_t dev; 111 int num; |
112 unsigned int bufsz; |
113 struct pcmchan_caps caps; |
114 115 /* Contents of board's registers */ |
116 uint32_t ctrl; 117 uint32_t sctrl; |
118 struct es_chinfo pch, rch; 119 struct mtx *lock; 120}; 121 |
122#define ES_LOCK(sc) snd_mtxlock((sc)->lock) 123#define ES_UNLOCK(sc) snd_mtxunlock((sc)->lock) 124#define ES_LOCK_ASSERT(sc) snd_mtxassert((sc)->lock) |
125 126/* prototypes */ 127static void es_intr(void *); |
128static uint32_t es1371_wait_src_ready(struct es_info *); |
129static void es1371_src_write(struct es_info *, u_short, unsigned short); 130static u_int es1371_adc_rate(struct es_info *, u_int, int); 131static u_int es1371_dac_rate(struct es_info *, u_int, int); |
132static int es1371_init(struct es_info *); |
133static int es1370_init(struct es_info *); 134static int es1370_wrcodec(struct es_info *, u_char, u_char); 135 |
136static u_int32_t es_fmt[] = { |
137 AFMT_U8, 138 AFMT_STEREO | AFMT_U8, 139 AFMT_S16_LE, 140 AFMT_STEREO | AFMT_S16_LE, 141 0 142}; |
143static struct pcmchan_caps es_caps = {4000, 48000, es_fmt, 0}; |
144 |
145static const struct { 146 unsigned volidx:4; 147 unsigned left:4; 148 unsigned right:4; 149 unsigned stereo:1; 150 unsigned recmask:13; 151 unsigned avail:1; 152} mixtable[SOUND_MIXER_NRDEVICES] = { --- 4 unchanged lines hidden (view full) --- 157 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 158 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 159 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 160 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 161 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 162 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 163}; 164 |
165static __inline u_int32_t |
166es_rd(struct es_info *es, int regno, int size) 167{ 168 switch (size) { 169 case 1: 170 return bus_space_read_1(es->st, es->sh, regno); 171 case 2: 172 return bus_space_read_2(es->st, es->sh, regno); 173 case 4: 174 return bus_space_read_4(es->st, es->sh, regno); 175 default: 176 return 0xFFFFFFFF; 177 } 178} 179 |
180static __inline void |
181es_wr(struct es_info *es, int regno, u_int32_t data, int size) 182{ 183 184 switch (size) { 185 case 1: 186 bus_space_write_1(es->st, es->sh, regno, data); 187 break; 188 case 2: --- 23 unchanged lines hidden (view full) --- 212 if (mixtable[i].recmask) v |= (1 << i); 213 mix_setrecdevs(m, v); 214 return 0; 215} 216 217static int 218es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 219{ |
220 struct es_info *es; |
221 int l, r, rl, rr; 222 223 if (!mixtable[dev].avail) return -1; 224 l = left; 225 r = mixtable[dev].stereo? right : l; 226 if (mixtable[dev].left == 0xf) { 227 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 228 } else { 229 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 230 } |
231 es = mix_getdevinfo(m); 232 ES_LOCK(es); |
233 if (mixtable[dev].stereo) { 234 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; |
235 es1370_wrcodec(es, mixtable[dev].right, rr); |
236 } |
237 es1370_wrcodec(es, mixtable[dev].left, rl); 238 ES_UNLOCK(es); 239 |
240 return l | (r << 8); 241} 242 243static int 244es1370_mixsetrecsrc(struct snd_mixer *m, u_int32_t src) 245{ |
246 struct es_info *es; |
247 int i, j = 0; 248 |
249 es = mix_getdevinfo(m); |
250 if (src == 0) src = 1 << SOUND_MIXER_MIC; 251 src &= mix_getrecdevs(m); 252 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 253 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 254 |
255 ES_LOCK(es); 256 es1370_wrcodec(es, CODEC_LIMIX1, j & 0x55); 257 es1370_wrcodec(es, CODEC_RIMIX1, j & 0xaa); 258 es1370_wrcodec(es, CODEC_LIMIX2, (j >> 8) & 0x17); 259 es1370_wrcodec(es, CODEC_RIMIX2, (j >> 8) & 0x0f); 260 es1370_wrcodec(es, CODEC_OMIX1, 0x7f); 261 es1370_wrcodec(es, CODEC_OMIX2, 0x3f); 262 ES_UNLOCK(es); 263 |
264 return src; 265} 266 267static kobj_method_t es1370_mixer_methods[] = { 268 KOBJMETHOD(mixer_init, es1370_mixinit), 269 KOBJMETHOD(mixer_set, es1370_mixset), 270 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 271 { 0, 0 } 272}; 273MIXER_DECLARE(es1370_mixer); 274 275/* -------------------------------------------------------------------- */ 276 277static int 278es1370_wrcodec(struct es_info *es, u_char i, u_char data) 279{ 280 u_int t; 281 |
282 ES_LOCK_ASSERT(es); 283 |
284 for (t = 0; t < 0x1000; t++) { 285 if ((es_rd(es, ES1370_REG_STATUS, 4) & 286 STAT_CSTAT) == 0) { 287 es_wr(es, ES1370_REG_CODEC, 288 ((u_short)i << CODEC_INDEX_SHIFT) | data, 2); 289 return 0; 290 } 291 DELAY(1); 292 } |
293 device_printf(es->dev, "%s: timed out\n", __func__); |
294 return -1; 295} 296 297/* -------------------------------------------------------------------- */ 298 299/* channel interface */ 300static void * 301eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 302{ 303 struct es_info *es = devinfo; 304 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 305 |
306 ch->parent = es; 307 ch->channel = c; 308 ch->buffer = b; 309 ch->bufsz = es->bufsz; 310 ch->blksz = ch->bufsz / 2; 311 ch->num = ch->parent->num++; |
312 ch->dir = dir; |
313 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ch->bufsz) != 0) 314 return NULL; |
315 ES_LOCK(es); |
316 if (dir == PCMDIR_PLAY) { 317 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMEADR >> 8, 1); 318 es_wr(es, ES1370_REG_DAC2_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 319 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 320 } else { 321 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1); 322 es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 323 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 324 } |
325 ES_UNLOCK(es); 326 return ch; |
327} 328 329static int 330eschan_setformat(kobj_t obj, void *data, u_int32_t format) 331{ 332 struct es_chinfo *ch = data; 333 struct es_info *es = ch->parent; 334 |
335 ES_LOCK(es); |
336 if (ch->dir == PCMDIR_PLAY) { 337 es->sctrl &= ~SCTRL_P2FMT; 338 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 339 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 340 } else { 341 es->sctrl &= ~SCTRL_R1FMT; 342 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 343 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 344 } 345 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); |
346 ES_UNLOCK(es); |
347 ch->fmt = format; 348 return 0; 349} 350 351static int 352eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed) 353{ 354 struct es_chinfo *ch = data; 355 struct es_info *es = ch->parent; 356 |
357 /* XXX Fixed rate , do nothing. */ 358 ES_LOCK(es); 359 if (es->caps.minspeed == es->caps.maxspeed) { 360 speed = es->caps.maxspeed; 361 ES_UNLOCK(es); 362 return speed; 363 } 364 if (speed < es->caps.minspeed) 365 speed = es->caps.minspeed; 366 if (speed > es->caps.maxspeed) 367 speed = es->caps.maxspeed; |
368 es->ctrl &= ~CTRL_PCLKDIV; 369 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 370 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); |
371 ES_UNLOCK(es); |
372 /* rec/play speeds locked together - should indicate in flags */ 373 return speed; /* XXX calc real speed */ 374} 375 376static int 377eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed) 378{ 379 struct es_chinfo *ch = data; 380 struct es_info *es = ch->parent; 381 int i, delta; 382 |
383 ES_LOCK(es); |
384 if (ch->dir == PCMDIR_PLAY) 385 i = es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 386 else 387 i = es1371_adc_rate(es, speed, 1); /* record */ |
388 ES_UNLOCK(es); |
389 delta = (speed > i) ? speed - i : i - speed; 390 if (delta < 2) 391 return speed; 392 return i; 393} 394 395static int 396eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 397{ |
398 struct es_info *es; |
399 struct es_chinfo *ch = data; |
400 uint32_t oblksz, obufsz; 401 int error; |
402 |
403 oblksz = ch->blksz; 404 obufsz = ch->bufsz; |
405 ch->blksz = blocksize; 406 ch->bufsz = ch->blksz * 2; |
407 error = sndbuf_resize(ch->buffer, 2, ch->blksz); 408 if (error != 0) { 409 ch->blksz = oblksz; 410 ch->bufsz = obufsz; 411 es = ch->parent; 412 device_printf(es->dev, "unable to set block size, blksz = %d, " 413 "error = %d", blocksize, error); 414 } |
415 return ch->blksz; 416} 417 418static int 419eschan_trigger(kobj_t obj, void *data, int go) 420{ 421 struct es_chinfo *ch = data; 422 struct es_info *es = ch->parent; 423 unsigned cnt; 424 425 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 426 return 0; 427 428 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1; 429 |
430 ES_LOCK(es); |
431 if (ch->dir == PCMDIR_PLAY) { 432 if (go == PCMTRIG_START) { 433 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 434 es->ctrl |= CTRL_DAC2_EN; 435 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN); 436 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 437 es_wr(es, ES1370_REG_DAC2_SCOUNT, cnt, 4); 438 /* start at beginning of buffer */ --- 8 unchanged lines hidden (view full) --- 447 es_wr(es, ES1370_REG_ADC_SCOUNT, cnt, 4); 448 /* start at beginning of buffer */ 449 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMECNT >> 8, 4); 450 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 451 } else es->ctrl &= ~CTRL_ADC_EN; 452 } 453 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 454 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); |
455 ES_UNLOCK(es); |
456 return 0; 457} 458 459static int 460eschan_getptr(kobj_t obj, void *data) 461{ 462 struct es_chinfo *ch = data; 463 struct es_info *es = ch->parent; 464 u_int32_t reg, cnt; 465 466 if (ch->dir == PCMDIR_PLAY) 467 reg = ES1370_REG_DAC2_FRAMECNT; 468 else 469 reg = ES1370_REG_ADC_FRAMECNT; |
470 ES_LOCK(es); |
471 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4); 472 cnt = es_rd(es, reg & 0x000000ff, 4) >> 16; |
473 ES_UNLOCK(es); |
474 /* cnt is longwords */ 475 return cnt << 2; 476} 477 478static struct pcmchan_caps * 479eschan_getcaps(kobj_t obj, void *data) 480{ 481 struct es_chinfo *ch = data; |
482 struct es_info *es = ch->parent; 483 484 return &es->caps; |
485} 486 487static kobj_method_t eschan1370_methods[] = { 488 KOBJMETHOD(channel_init, eschan_init), |
489 KOBJMETHOD(channel_setformat, eschan_setformat), 490 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 491 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 492 KOBJMETHOD(channel_trigger, eschan_trigger), 493 KOBJMETHOD(channel_getptr, eschan_getptr), 494 KOBJMETHOD(channel_getcaps, eschan_getcaps), 495 { 0, 0 } 496}; 497CHANNEL_DECLARE(eschan1370); 498 499static kobj_method_t eschan1371_methods[] = { 500 KOBJMETHOD(channel_init, eschan_init), |
501 KOBJMETHOD(channel_setformat, eschan_setformat), 502 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 503 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 504 KOBJMETHOD(channel_trigger, eschan_trigger), 505 KOBJMETHOD(channel_getptr, eschan_getptr), 506 KOBJMETHOD(channel_getcaps, eschan_getcaps), 507 { 0, 0 } 508}; 509CHANNEL_DECLARE(eschan1371); 510 511/* -------------------------------------------------------------------- */ 512/* The interrupt handler */ 513static void 514es_intr(void *p) 515{ 516 struct es_info *es = p; |
517 uint32_t intsrc, sctrl; |
518 |
519 ES_LOCK(es); |
520 intsrc = es_rd(es, ES1370_REG_STATUS, 4); 521 if ((intsrc & STAT_INTR) == 0) { |
522 ES_UNLOCK(es); |
523 return; 524 } 525 526 sctrl = es->sctrl; 527 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 528 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 529 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 530 531 es_wr(es, ES1370_REG_SERIAL_CONTROL, sctrl, 4); 532 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); |
533 ES_UNLOCK(es); |
534 535 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 536 if (intsrc & STAT_DAC1) 537 ; /* nothing */ 538 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 539} 540 541/* ES1370 specific */ 542static int 543es1370_init(struct es_info *es) 544{ |
545 int r; 546 547 /* XXX ES1370 default to fixed rate operation */ 548 if (resource_int_value(device_get_name(es->dev), 549 device_get_unit(es->dev), "fixed_rate", &r) == 0) { 550 if (r != 0) { 551 if (r < es_caps.minspeed) 552 r = es_caps.minspeed; 553 if (r > es_caps.maxspeed) 554 r = es_caps.maxspeed; 555 } 556 } else 557 r = es_caps.maxspeed; 558 ES_LOCK(es); 559 es->caps = es_caps; 560 if (r != 0) { 561 es->caps.minspeed = r; 562 es->caps.maxspeed = r; 563 } |
564 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | |
565 (DAC2_SRTODIV(es->caps.maxspeed) << CTRL_SH_PCLKDIV); |
566 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 567 568 es->sctrl = 0; 569 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 570 571 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 572 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 573 * {LR,B}CLK2 and run off the LRCLK2 574 * PLL; program DAC_SYNC=0! */ 575 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 576 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ |
577 ES_UNLOCK(es); |
578 579 return 0; 580} 581 582/* ES1371 specific */ 583int |
584es1371_init(struct es_info *es) |
585{ |
586 uint32_t cssr, devid, revid; |
587 int idx; |
588 |
589 ES_LOCK(es); |
590 es->num = 0; 591 es->ctrl = 0; 592 es->sctrl = 0; |
593 es->caps = es_caps; |
594 cssr = 0; |
595 devid = pci_get_devid(es->dev); 596 revid = pci_get_revid(es->dev); |
597 if (devid == CT4730_PCI_ID) { 598 /* XXX amplifier hack? */ 599 es->ctrl |= (1 << 16); 600 } 601 /* initialize the chips */ 602 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 603 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 604 es_wr(es, ES1371_REG_LEGACY, 0, 4); --- 34 unchanged lines hidden (view full) --- 639 * be stuck high, and I've found no way to rectify this other than 640 * power cycle) 641 */ 642 es1371_wait_src_ready(es); 643 es_wr(es, ES1371_REG_SMPRATE, 0, 4); 644 /* try to reset codec directly */ 645 es_wr(es, ES1371_REG_CODEC, 0, 4); 646 es_wr(es, ES1370_REG_STATUS, cssr, 4); |
647 ES_UNLOCK(es); |
648 649 return (0); 650} 651 652/* -------------------------------------------------------------------- */ 653 654static int 655es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data) 656{ |
657 uint32_t t, x, orig; |
658 struct es_info *es = (struct es_info*)s; 659 660 for (t = 0; t < 0x1000; t++) 661 if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4)) 662 break; 663 /* save the current state for later */ 664 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 665 /* enable SRC state data in SRC mux */ --- 18 unchanged lines hidden (view full) --- 684 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 685 686 return 0; 687} 688 689static int 690es1371_rdcd(kobj_t obj, void *s, int addr) 691{ |
692 uint32_t t, x, orig; |
693 struct es_info *es = (struct es_info *)s; 694 695 for (t = 0; t < 0x1000; t++) 696 if (!(x = es_rd(es, ES1371_REG_CODEC, 4) & CODEC_WIP)) 697 break; 698 699 /* save the current state for later */ 700 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); --- 34 unchanged lines hidden (view full) --- 735}; 736AC97_DECLARE(es1371_ac97); 737 738/* -------------------------------------------------------------------- */ 739 740static u_int 741es1371_src_read(struct es_info *es, u_short reg) 742{ |
743 uint32_t r; |
744 745 r = es1371_wait_src_ready(es) & 746 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 747 r |= ES1371_SRC_RAM_ADDRO(reg); 748 es_wr(es, ES1371_REG_SMPRATE, r, 4); 749 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 750} 751 752static void 753es1371_src_write(struct es_info *es, u_short reg, u_short data) 754{ |
755 uint32_t r; |
756 757 r = es1371_wait_src_ready(es) & 758 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 759 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 760 es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4); 761} 762 763static u_int 764es1371_adc_rate(struct es_info *es, u_int rate, int set) 765{ 766 u_int n, truncm, freq, result; 767 |
768 ES_LOCK_ASSERT(es); 769 |
770 if (rate > 48000) rate = 48000; 771 if (rate < 4000) rate = 4000; 772 n = rate / 3000; 773 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 774 n--; 775 truncm = (21 * n - 1) | 1; 776 freq = ((48000UL << 15) / rate) * n; 777 result = (48000UL << 15) / (freq / n); --- 17 unchanged lines hidden (view full) --- 795 return result; 796} 797 798static u_int 799es1371_dac_rate(struct es_info *es, u_int rate, int set) 800{ 801 u_int freq, r, result, dac, dis; 802 |
803 ES_LOCK_ASSERT(es); 804 |
805 if (rate > 48000) rate = 48000; 806 if (rate < 4000) rate = 4000; 807 freq = (rate << 15) / 3000; 808 result = (freq * 3000) >> 15; 809 if (set) { 810 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 811 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 812 813 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 814 es_wr(es, ES1371_REG_SMPRATE, r, 4); 815 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 816 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 817 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 818 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 819 es_wr(es, ES1371_REG_SMPRATE, r, 4); 820 } 821 return result; 822} 823 |
824static uint32_t |
825es1371_wait_src_ready(struct es_info *es) 826{ |
827 uint32_t t, r; |
828 829 for (t = 0; t < 0x1000; t++) { 830 if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) & ES1371_SRC_RAM_BUSY)) 831 return r; 832 DELAY(1); 833 } |
834 device_printf(es->dev, "%s: timed out 0x%x [0x%x]\n", __func__, 835 ES1371_REG_SMPRATE, r); |
836 return 0; 837} 838 839/* -------------------------------------------------------------------- */ 840 841/* 842 * Probe and attach the card 843 */ --- 76 unchanged lines hidden (view full) --- 920 921 default: 922 return ENXIO; 923 } 924} 925 926#ifdef SND_DYNSYSCTL 927static int |
928sysctl_es137x_spdif_enable(SYSCTL_HANDLER_ARGS) |
929{ 930 struct es_info *es; 931 device_t dev; |
932 uint32_t r; 933 int err, new_en; |
934 935 dev = oidp->oid_arg1; 936 es = pcm_getdevinfo(dev); |
937 ES_LOCK(es); 938 r = es_rd(es, ES1370_REG_STATUS, 4); 939 ES_UNLOCK(es); 940 new_en = (r & ENABLE_SPDIF) ? 1 : 0; |
941 err = sysctl_handle_int(oidp, &new_en, sizeof(new_en), req); 942 943 if (err || req->newptr == NULL) |
944 return (err); |
945 if (new_en < 0 || new_en > 1) |
946 return (EINVAL); |
947 |
948 ES_LOCK(es); |
949 if (new_en) { 950 r |= ENABLE_SPDIF; 951 es->ctrl |= SPDIFEN_B; 952 es->ctrl |= RECEN_B; 953 } else { 954 r &= ~ENABLE_SPDIF; 955 es->ctrl &= ~SPDIFEN_B; 956 es->ctrl &= ~RECEN_B; 957 } 958 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 959 es_wr(es, ES1370_REG_STATUS, r, 4); |
960 ES_UNLOCK(es); 961 962 return (0); |
963} 964 965static int |
966sysctl_es137x_latency_timer(SYSCTL_HANDLER_ARGS) |
967{ 968 struct es_info *es; 969 device_t dev; |
970 uint32_t val; 971 int err; |
972 973 dev = oidp->oid_arg1; 974 es = pcm_getdevinfo(dev); |
975 ES_LOCK(es); |
976 val = pci_read_config(dev, PCIR_LATTIMER, 1); |
977 ES_UNLOCK(es); |
978 err = sysctl_handle_int(oidp, &val, sizeof(val), req); 979 980 if (err || req->newptr == NULL) |
981 return (err); 982 if (val > 255) 983 return (EINVAL); |
984 |
985 ES_LOCK(es); |
986 pci_write_config(dev, PCIR_LATTIMER, val, 1); |
987 ES_UNLOCK(es); 988 989 return (0); |
990} |
991 992static int 993sysctl_es137x_fixed_rate(SYSCTL_HANDLER_ARGS) 994{ 995 struct es_info *es; 996 device_t dev; 997 uint32_t val; 998 int err; 999 1000 dev = oidp->oid_arg1; 1001 es = pcm_getdevinfo(dev); 1002 ES_LOCK(es); 1003 if (es->caps.minspeed == es->caps.maxspeed) 1004 val = es->caps.maxspeed; 1005 else 1006 val = 0; 1007 ES_UNLOCK(es); 1008 err = sysctl_handle_int(oidp, &val, sizeof(val), req); 1009 1010 if (err || req->newptr == NULL) 1011 return (err); 1012 if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed)) 1013 return (EINVAL); 1014 1015 ES_LOCK(es); 1016 if (val) { 1017 es->caps.minspeed = val; 1018 es->caps.maxspeed = val; 1019 es->ctrl &= ~CTRL_PCLKDIV; 1020 es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV; 1021 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1022 } else { 1023 es->caps.minspeed = es_caps.minspeed; 1024 es->caps.maxspeed = es_caps.maxspeed; 1025 } 1026 ES_UNLOCK(es); 1027 1028 return (0); 1029} |
1030#endif /* SND_DYNSYSCTL */ 1031 1032static void 1033es_init_sysctls(device_t dev) 1034{ 1035#ifdef SND_DYNSYSCTL 1036 struct es_info *es; 1037 int r, devid, revid; 1038 1039 devid = pci_get_devid(dev); 1040 revid = pci_get_revid(dev); 1041 es = pcm_getdevinfo(dev); 1042 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 1043 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 1044 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 1045 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 1046 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { |
1047 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1048 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1049 OID_AUTO, "spdif_enabled", 1050 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), |
1051 sysctl_es137x_spdif_enable, "I", |
1052 "Enable S/PDIF output on primary playback channel"); |
1053 } else if (devid == ES1370_PCI_ID) { 1054 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1055 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1056 OID_AUTO, "fixed_rate", 1057 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1058 sysctl_es137x_fixed_rate, "I", 1059 "Enable fixed rate playback/recording"); |
1060 } 1061 if (resource_int_value(device_get_name(dev), 1062 device_get_unit(dev), "latency_timer", &r) == 0 && 1063 !(r < 0 || r > 255)) 1064 pci_write_config(dev, PCIR_LATTIMER, r, 1); 1065 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1066 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1067 OID_AUTO, "latency_timer", 1068 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), |
1069 sysctl_es137x_latency_timer, "I", |
1070 "PCI Latency Timer configuration"); 1071#endif /* SND_DYNSYSCTL */ 1072} 1073 1074static int 1075es_pci_attach(device_t dev) 1076{ 1077 u_int32_t data; |
1078 struct es_info *es = NULL; |
1079 int mapped; 1080 char status[SND_STATUSLEN]; |
1081 struct ac97_info *codec = NULL; |
1082 kobj_class_t ct = NULL; |
1083 uint32_t devid; |
1084 1085 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) { 1086 device_printf(dev, "cannot allocate softc\n"); 1087 return ENXIO; 1088 } 1089 es->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 1090 es->dev = dev; 1091 mapped = 0; |
1092 1093 pci_enable_busmaster(dev); |
1094 data = pci_read_config(dev, PCIR_COMMAND, 2); |
1095 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN); |
1096 pci_write_config(dev, PCIR_COMMAND, data, 2); 1097 data = pci_read_config(dev, PCIR_COMMAND, 2); 1098 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 1099 es->regid = MEM_MAP_REG; 1100 es->regtype = SYS_RES_MEMORY; 1101 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1102 RF_ACTIVE); |
1103 if (es->reg) |
1104 mapped++; |
1105 } 1106 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 1107 es->regid = PCIR_BAR(0); 1108 es->regtype = SYS_RES_IOPORT; 1109 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1110 RF_ACTIVE); |
1111 if (es->reg) |
1112 mapped++; |
1113 } 1114 if (mapped == 0) { 1115 device_printf(dev, "unable to map register space\n"); 1116 goto bad; 1117 } 1118 |
1119 es->st = rman_get_bustag(es->reg); 1120 es->sh = rman_get_bushandle(es->reg); |
1121 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); 1122 1123 devid = pci_get_devid(dev); |
1124 switch (devid) { 1125 case ES1371_PCI_ID: 1126 case ES1371_PCI_ID2: 1127 case CT5880_PCI_ID: 1128 case CT4730_PCI_ID: 1129 es1371_init(es); |
1130 codec = AC97_CREATE(dev, es, es1371_ac97); |
1131 if (codec == NULL) 1132 goto bad; |
1133 /* our init routine does everything for us */ 1134 /* set to NULL; flag mixer_init not to run the ac97_init */ 1135 /* ac97_mixer.init = NULL; */ |
1136 if (mixer_init(dev, ac97_getmixerclass(), codec)) 1137 goto bad; |
1138 ct = &eschan1371_class; |
1139 break; 1140 case ES1370_PCI_ID: 1141 es1370_init(es); 1142 if (mixer_init(dev, &es1370_mixer_class, es)) |
1143 goto bad; |
1144 ct = &eschan1370_class; |
1145 break; 1146 default: 1147 goto bad; 1148 /* NOTREACHED */ 1149 } |
1150 1151 es->irqid = 0; 1152 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid, 1153 RF_ACTIVE | RF_SHAREABLE); 1154 if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr, es, &es->ih)) { 1155 device_printf(dev, "unable to map interrupt\n"); 1156 goto bad; 1157 } --- 8 unchanged lines hidden (view full) --- 1166 device_printf(dev, "unable to create dma tag\n"); 1167 goto bad; 1168 } 1169 1170 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld %s", 1171 (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 1172 rman_get_start(es->reg), rman_get_start(es->irq),PCM_KLDSTRING(snd_es137x)); 1173 |
1174 if (pcm_register(dev, es, 1, 1)) 1175 goto bad; |
1176 pcm_addchan(dev, PCMDIR_REC, ct, es); 1177 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 1178 es_init_sysctls(dev); 1179 pcm_setstatus(dev, status); 1180 1181 return 0; 1182 1183 bad: --- 12 unchanged lines hidden (view full) --- 1196{ 1197 int r; 1198 struct es_info *es; 1199 1200 r = pcm_unregister(dev); 1201 if (r) return r; 1202 1203 es = pcm_getdevinfo(dev); |
1204 bus_teardown_intr(dev, es->irq, es->ih); 1205 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1206 bus_release_resource(dev, es->regtype, es->regid, es->reg); |
1207 bus_dma_tag_destroy(es->parent_dmat); |
1208 snd_mtxfree(es->lock); 1209 free(es, M_DEVBUF); 1210 1211 return 0; 1212} 1213 1214static device_method_t es_methods[] = { 1215 /* Device interface */ --- 16 unchanged lines hidden --- |