1/* 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 *
| 1/* 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 *
|
41 * $FreeBSD: head/sys/dev/sound/pci/es137x.c 55204 1999-12-29 03:46:54Z cg $
| 41 * $FreeBSD: head/sys/dev/sound/pci/es137x.c 55209 1999-12-29 05:44:17Z cg $
|
42 */ 43 44/* 45 * Part of this code was heavily inspired by the linux driver from 46 * Thomas Sailer (sailer@ife.ee.ethz.ch) 47 * Just about everything has been touched and reworked in some way but 48 * the all the underlying sequences/timing/register values are from 49 * Thomas' code. 50 * 51*/ 52 53#include "pci.h" 54#include "pcm.h" 55 56#include <dev/sound/pcm/sound.h> 57#include <dev/sound/pcm/ac97.h> 58#include <dev/sound/pci/es137x.h> 59 60#include <pci/pcireg.h> 61#include <pci/pcivar.h> 62 63#include <sys/sysctl.h> 64 65static int debug = 0; 66SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 67 68#define MEM_MAP_REG 0x14 69 70/* PCI IDs of supported chips */ 71#define ES1370_PCI_ID 0x50001274 72#define ES1371_PCI_ID 0x13711274 73 74/* device private data */ 75struct es_info; 76
| 42 */ 43 44/* 45 * Part of this code was heavily inspired by the linux driver from 46 * Thomas Sailer (sailer@ife.ee.ethz.ch) 47 * Just about everything has been touched and reworked in some way but 48 * the all the underlying sequences/timing/register values are from 49 * Thomas' code. 50 * 51*/ 52 53#include "pci.h" 54#include "pcm.h" 55 56#include <dev/sound/pcm/sound.h> 57#include <dev/sound/pcm/ac97.h> 58#include <dev/sound/pci/es137x.h> 59 60#include <pci/pcireg.h> 61#include <pci/pcivar.h> 62 63#include <sys/sysctl.h> 64 65static int debug = 0; 66SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 67 68#define MEM_MAP_REG 0x14 69 70/* PCI IDs of supported chips */ 71#define ES1370_PCI_ID 0x50001274 72#define ES1371_PCI_ID 0x13711274 73 74/* device private data */ 75struct es_info; 76
|
77typedef struct es_chinfo {
| 77struct es_chinfo {
|
78 struct es_info *parent; 79 pcm_channel *channel; 80 snd_dbuf *buffer; 81 int dir, num; 82 u_int32_t fmt;
| 78 struct es_info *parent; 79 pcm_channel *channel; 80 snd_dbuf *buffer; 81 int dir, num; 82 u_int32_t fmt;
|
83} es_chinfo_t;
| 83};
|
84
| 84
|
85typedef struct es_info {
| 85struct es_info {
|
86 bus_space_tag_t st; 87 bus_space_handle_t sh; 88 bus_dma_tag_t parent_dmat; 89 90 int num; 91 /* Contents of board's registers */ 92 u_long ctrl; 93 u_long sctrl; 94 struct es_chinfo pch, rch;
| 86 bus_space_tag_t st; 87 bus_space_handle_t sh; 88 bus_dma_tag_t parent_dmat; 89 90 int num; 91 /* Contents of board's registers */ 92 u_long ctrl; 93 u_long sctrl; 94 struct es_chinfo pch, rch;
|
95} es_info_t;
| 95};
|
96 97/* -------------------------------------------------------------------- */ 98 99/* prototypes */ 100static void es_intr(void *); 101 102static void es1371_wrcodec(void *, int, u_int32_t); 103static u_int32_t es1371_rdcodec(void *, int);
| 96 97/* -------------------------------------------------------------------- */ 98 99/* prototypes */ 100static void es_intr(void *); 101 102static void es1371_wrcodec(void *, int, u_int32_t); 103static u_int32_t es1371_rdcodec(void *, int);
|
104static u_int es1371_wait_src_ready(es_info_t *); 105static void es1371_src_write(es_info_t *, u_short, unsigned short); 106static u_int es1371_adc_rate(es_info_t *, u_int, int); 107static u_int es1371_dac_rate(es_info_t *, u_int, int); 108static int es1371_init(es_info_t *es); 109static int eschan1371_setspeed(void *data, u_int32_t speed); 110
| 104static u_int es1371_wait_src_ready(struct es_info *); 105static void es1371_src_write(struct es_info *, u_short, unsigned short); 106static u_int es1371_adc_rate(struct es_info *, u_int, int); 107static u_int es1371_dac_rate(struct es_info *, u_int, int); 108static int es1371_init(struct es_info *es, int);
|
111static int es1370_init(struct es_info *); 112static int es1370_wrcodec(struct es_info *, u_char, u_char); 113 114/* channel interface */ 115static void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 116static int eschan_setdir(void *data, int dir); 117static int eschan_setformat(void *data, u_int32_t format); 118static int eschan1370_setspeed(void *data, u_int32_t speed);
| 109static int es1370_init(struct es_info *); 110static int es1370_wrcodec(struct es_info *, u_char, u_char); 111 112/* channel interface */ 113static void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 114static int eschan_setdir(void *data, int dir); 115static int eschan_setformat(void *data, u_int32_t format); 116static int eschan1370_setspeed(void *data, u_int32_t speed);
|
| 117static int eschan1371_setspeed(void *data, u_int32_t speed);
|
119static int eschan_setblocksize(void *data, u_int32_t blocksize); 120static int eschan_trigger(void *data, int go); 121static int eschan_getptr(void *data); 122static pcmchan_caps *eschan_getcaps(void *data); 123 124static pcmchan_caps es_playcaps = { 125 4000, 48000, 126 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 127 AFMT_STEREO | AFMT_S16_LE 128}; 129 130static pcmchan_caps es_reccaps = { 131 4000, 48000, 132 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 133 AFMT_STEREO | AFMT_S16_LE 134}; 135 136static pcm_channel es1370_chantemplate = { 137 eschan_init, 138 eschan_setdir, 139 eschan_setformat, 140 eschan1370_setspeed, 141 eschan_setblocksize, 142 eschan_trigger, 143 eschan_getptr, 144 eschan_getcaps, 145}; 146 147static pcm_channel es1371_chantemplate = { 148 eschan_init, 149 eschan_setdir, 150 eschan_setformat, 151 eschan1371_setspeed, 152 eschan_setblocksize, 153 eschan_trigger, 154 eschan_getptr, 155 eschan_getcaps, 156}; 157 158/* -------------------------------------------------------------------- */ 159 160/* The es1370 mixer interface */ 161 162static int es1370_mixinit(snd_mixer *m); 163static int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right); 164static int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src); 165 166static snd_mixer es1370_mixer = { 167 "AudioPCI 1370 mixer", 168 es1370_mixinit, 169 es1370_mixset, 170 es1370_mixsetrecsrc, 171}; 172 173static const struct { 174 unsigned volidx:4; 175 unsigned left:4; 176 unsigned right:4; 177 unsigned stereo:1; 178 unsigned recmask:13; 179 unsigned avail:1; 180} mixtable[SOUND_MIXER_NRDEVICES] = { 181 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 182 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 183 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 184 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 185 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 186 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 187 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 188 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 189 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 190 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 191}; 192 193static int 194es1370_mixinit(snd_mixer *m) 195{ 196 int i; 197 u_int32_t v; 198 199 v = 0; 200 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 201 if (mixtable[i].avail) v |= (1 << i); 202 mix_setdevs(m, v); 203 v = 0; 204 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 205 if (mixtable[i].recmask) v |= (1 << i); 206 mix_setrecdevs(m, v); 207 return 0; 208} 209 210static int 211es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right) 212{ 213 int l, r, rl, rr; 214 215 if (!mixtable[dev].avail) return -1; 216 l = left; 217 r = mixtable[dev].stereo? right : l; 218 if (mixtable[dev].left == 0xf) { 219 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 220 } else { 221 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 222 } 223 if (mixtable[dev].stereo) { 224 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 225 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 226 } 227 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 228 return l | (r << 8); 229} 230 231static int 232es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src) 233{ 234 int i, j = 0; 235 236 if (src == 0) src = 1 << SOUND_MIXER_MIC; 237 src &= mix_getrecdevs(m); 238 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 239 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 240 241 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 242 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 243 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 244 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 245 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 246 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 247 return src; 248} 249 250static int 251es1370_wrcodec(struct es_info *es, u_char i, u_char data) 252{ 253 int wait = 100; /* 100 msec timeout */ 254 255 do { 256 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 257 STAT_CSTAT) == 0) { 258 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 259 ((u_short)i << CODEC_INDEX_SHIFT) | data); 260 return 0; 261 } 262 DELAY(1000); 263 } while (--wait); 264 printf("pcm: es1370_wrcodec timed out\n"); 265 return -1; 266} 267 268/* -------------------------------------------------------------------- */ 269 270/* channel interface */ 271static void * 272eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 273{ 274 struct es_info *es = devinfo; 275 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 276 277 ch->parent = es; 278 ch->channel = c; 279 ch->buffer = b; 280 ch->buffer->bufsize = ES_BUFFSIZE; 281 ch->num = ch->parent->num++; 282 if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL; 283 return ch; 284} 285 286static int 287eschan_setdir(void *data, int dir) 288{ 289 struct es_chinfo *ch = data; 290 struct es_info *es = ch->parent; 291 292 if (dir == PCMDIR_PLAY) { 293 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 294 ES1370_REG_DAC2_FRAMEADR >> 8); 295 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, 296 vtophys(ch->buffer->buf)); 297 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, 298 (ch->buffer->bufsize >> 2) - 1); 299 } else { 300 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 301 ES1370_REG_ADC_FRAMEADR >> 8); 302 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, 303 vtophys(ch->buffer->buf)); 304 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, 305 (ch->buffer->bufsize >> 2) - 1); 306 } 307 ch->dir = dir; 308 return 0; 309} 310 311static int 312eschan_setformat(void *data, u_int32_t format) 313{ 314 struct es_chinfo *ch = data; 315 struct es_info *es = ch->parent; 316 317 if (ch->dir == PCMDIR_PLAY) { 318 es->sctrl &= ~SCTRL_P2FMT; 319 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 320 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 321 } else { 322 es->sctrl &= ~SCTRL_R1FMT; 323 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 324 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 325 } 326 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 327 ch->fmt = format; 328 return 0; 329} 330 331static int 332eschan1370_setspeed(void *data, u_int32_t speed) 333{ 334 struct es_chinfo *ch = data; 335 struct es_info *es = ch->parent; 336 337 es->ctrl &= ~CTRL_PCLKDIV; 338 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 339 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 340 /* rec/play speeds locked together - should indicate in flags */ 341 return speed; /* XXX calc real speed */ 342} 343 344int 345eschan1371_setspeed(void *data, u_int32_t speed) 346{ 347 struct es_chinfo *ch = data; 348 struct es_info *es = ch->parent; 349 350 if (ch->dir == PCMDIR_PLAY) { 351 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 352 } else { 353 return es1371_adc_rate(es, speed, 1); /* record */ 354 } 355} 356 357static int 358eschan_setblocksize(void *data, u_int32_t blocksize) 359{ 360 return blocksize; 361} 362 363static int 364eschan_trigger(void *data, int go) 365{ 366 struct es_chinfo *ch = data; 367 struct es_info *es = ch->parent; 368 unsigned cnt = ch->buffer->dl / ch->buffer->sample_size - 1; 369 370 if (go == PCMTRIG_EMLDMAWR) return 0; 371 if (ch->dir == PCMDIR_PLAY) { 372 if (go == PCMTRIG_START) { 373 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 374 es->ctrl |= CTRL_DAC2_EN; 375 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 376 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 377 SCTRL_P2DACSEN); 378 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 379 bus_space_write_4(es->st, es->sh, 380 ES1370_REG_DAC2_SCOUNT, cnt); 381 } else es->ctrl &= ~CTRL_DAC2_EN; 382 } else { 383 if (go == PCMTRIG_START) { 384 es->ctrl |= CTRL_ADC_EN; 385 es->sctrl &= ~SCTRL_R1LOOPSEL; 386 es->sctrl |= SCTRL_R1INTEN; 387 bus_space_write_4(es->st, es->sh, 388 ES1370_REG_ADC_SCOUNT, cnt); 389 } else es->ctrl &= ~CTRL_ADC_EN; 390 } 391 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 392 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 393 return 0; 394} 395 396static int 397eschan_getptr(void *data) 398{ 399 struct es_chinfo *ch = data; 400 struct es_info *es = ch->parent; 401 if (ch->dir == PCMDIR_PLAY) { 402 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 403 ES1370_REG_DAC2_FRAMECNT >> 8); 404 return (bus_space_read_4(es->st, es->sh, 405 ES1370_REG_DAC2_FRAMECNT & 0xff) >> 14) & 0x3fffc; 406 } else { 407 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 408 ES1370_REG_ADC_FRAMECNT >> 8); 409 return (bus_space_read_4(es->st, es->sh, 410 ES1370_REG_ADC_FRAMECNT & 0xff) >> 14) & 0x3fffc; 411 } 412} 413 414static pcmchan_caps * 415eschan_getcaps(void *data) 416{ 417 struct es_chinfo *ch = data; 418 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 419} 420 421/* The interrupt handler */ 422static void 423es_intr(void *p) 424{ 425 struct es_info *es = p; 426 unsigned intsrc, sctrl; 427 428 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 429 if ((intsrc & STAT_INTR) == 0) return; 430 431 sctrl = es->sctrl; 432 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 433 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 434 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 435 436 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 437 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 438 439 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 440 if (intsrc & STAT_DAC1); 441 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 442} 443 444/* ES1370 specific */ 445static int 446es1370_init(struct es_info *es) 447{ 448 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 449 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 450 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 451 452 es->sctrl = 0; 453 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 454 455 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 456 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 457 * {LR,B}CLK2 and run off the LRCLK2 458 * PLL; program DAC_SYNC=0! */ 459 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 460 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 461 462 return 0; 463} 464 465/* ES1371 specific */ 466int
| 118static int eschan_setblocksize(void *data, u_int32_t blocksize); 119static int eschan_trigger(void *data, int go); 120static int eschan_getptr(void *data); 121static pcmchan_caps *eschan_getcaps(void *data); 122 123static pcmchan_caps es_playcaps = { 124 4000, 48000, 125 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 126 AFMT_STEREO | AFMT_S16_LE 127}; 128 129static pcmchan_caps es_reccaps = { 130 4000, 48000, 131 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 132 AFMT_STEREO | AFMT_S16_LE 133}; 134 135static pcm_channel es1370_chantemplate = { 136 eschan_init, 137 eschan_setdir, 138 eschan_setformat, 139 eschan1370_setspeed, 140 eschan_setblocksize, 141 eschan_trigger, 142 eschan_getptr, 143 eschan_getcaps, 144}; 145 146static pcm_channel es1371_chantemplate = { 147 eschan_init, 148 eschan_setdir, 149 eschan_setformat, 150 eschan1371_setspeed, 151 eschan_setblocksize, 152 eschan_trigger, 153 eschan_getptr, 154 eschan_getcaps, 155}; 156 157/* -------------------------------------------------------------------- */ 158 159/* The es1370 mixer interface */ 160 161static int es1370_mixinit(snd_mixer *m); 162static int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right); 163static int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src); 164 165static snd_mixer es1370_mixer = { 166 "AudioPCI 1370 mixer", 167 es1370_mixinit, 168 es1370_mixset, 169 es1370_mixsetrecsrc, 170}; 171 172static const struct { 173 unsigned volidx:4; 174 unsigned left:4; 175 unsigned right:4; 176 unsigned stereo:1; 177 unsigned recmask:13; 178 unsigned avail:1; 179} mixtable[SOUND_MIXER_NRDEVICES] = { 180 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 181 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 182 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 183 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 184 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 185 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 186 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 187 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 188 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 189 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 190}; 191 192static int 193es1370_mixinit(snd_mixer *m) 194{ 195 int i; 196 u_int32_t v; 197 198 v = 0; 199 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 200 if (mixtable[i].avail) v |= (1 << i); 201 mix_setdevs(m, v); 202 v = 0; 203 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 204 if (mixtable[i].recmask) v |= (1 << i); 205 mix_setrecdevs(m, v); 206 return 0; 207} 208 209static int 210es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right) 211{ 212 int l, r, rl, rr; 213 214 if (!mixtable[dev].avail) return -1; 215 l = left; 216 r = mixtable[dev].stereo? right : l; 217 if (mixtable[dev].left == 0xf) { 218 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 219 } else { 220 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 221 } 222 if (mixtable[dev].stereo) { 223 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 224 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 225 } 226 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 227 return l | (r << 8); 228} 229 230static int 231es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src) 232{ 233 int i, j = 0; 234 235 if (src == 0) src = 1 << SOUND_MIXER_MIC; 236 src &= mix_getrecdevs(m); 237 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 238 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 239 240 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 241 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 242 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 243 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 244 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 245 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 246 return src; 247} 248 249static int 250es1370_wrcodec(struct es_info *es, u_char i, u_char data) 251{ 252 int wait = 100; /* 100 msec timeout */ 253 254 do { 255 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 256 STAT_CSTAT) == 0) { 257 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 258 ((u_short)i << CODEC_INDEX_SHIFT) | data); 259 return 0; 260 } 261 DELAY(1000); 262 } while (--wait); 263 printf("pcm: es1370_wrcodec timed out\n"); 264 return -1; 265} 266 267/* -------------------------------------------------------------------- */ 268 269/* channel interface */ 270static void * 271eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 272{ 273 struct es_info *es = devinfo; 274 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 275 276 ch->parent = es; 277 ch->channel = c; 278 ch->buffer = b; 279 ch->buffer->bufsize = ES_BUFFSIZE; 280 ch->num = ch->parent->num++; 281 if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL; 282 return ch; 283} 284 285static int 286eschan_setdir(void *data, int dir) 287{ 288 struct es_chinfo *ch = data; 289 struct es_info *es = ch->parent; 290 291 if (dir == PCMDIR_PLAY) { 292 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 293 ES1370_REG_DAC2_FRAMEADR >> 8); 294 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, 295 vtophys(ch->buffer->buf)); 296 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, 297 (ch->buffer->bufsize >> 2) - 1); 298 } else { 299 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 300 ES1370_REG_ADC_FRAMEADR >> 8); 301 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, 302 vtophys(ch->buffer->buf)); 303 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, 304 (ch->buffer->bufsize >> 2) - 1); 305 } 306 ch->dir = dir; 307 return 0; 308} 309 310static int 311eschan_setformat(void *data, u_int32_t format) 312{ 313 struct es_chinfo *ch = data; 314 struct es_info *es = ch->parent; 315 316 if (ch->dir == PCMDIR_PLAY) { 317 es->sctrl &= ~SCTRL_P2FMT; 318 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 319 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 320 } else { 321 es->sctrl &= ~SCTRL_R1FMT; 322 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 323 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 324 } 325 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 326 ch->fmt = format; 327 return 0; 328} 329 330static int 331eschan1370_setspeed(void *data, u_int32_t speed) 332{ 333 struct es_chinfo *ch = data; 334 struct es_info *es = ch->parent; 335 336 es->ctrl &= ~CTRL_PCLKDIV; 337 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 338 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 339 /* rec/play speeds locked together - should indicate in flags */ 340 return speed; /* XXX calc real speed */ 341} 342 343int 344eschan1371_setspeed(void *data, u_int32_t speed) 345{ 346 struct es_chinfo *ch = data; 347 struct es_info *es = ch->parent; 348 349 if (ch->dir == PCMDIR_PLAY) { 350 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 351 } else { 352 return es1371_adc_rate(es, speed, 1); /* record */ 353 } 354} 355 356static int 357eschan_setblocksize(void *data, u_int32_t blocksize) 358{ 359 return blocksize; 360} 361 362static int 363eschan_trigger(void *data, int go) 364{ 365 struct es_chinfo *ch = data; 366 struct es_info *es = ch->parent; 367 unsigned cnt = ch->buffer->dl / ch->buffer->sample_size - 1; 368 369 if (go == PCMTRIG_EMLDMAWR) return 0; 370 if (ch->dir == PCMDIR_PLAY) { 371 if (go == PCMTRIG_START) { 372 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 373 es->ctrl |= CTRL_DAC2_EN; 374 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 375 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 376 SCTRL_P2DACSEN); 377 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 378 bus_space_write_4(es->st, es->sh, 379 ES1370_REG_DAC2_SCOUNT, cnt); 380 } else es->ctrl &= ~CTRL_DAC2_EN; 381 } else { 382 if (go == PCMTRIG_START) { 383 es->ctrl |= CTRL_ADC_EN; 384 es->sctrl &= ~SCTRL_R1LOOPSEL; 385 es->sctrl |= SCTRL_R1INTEN; 386 bus_space_write_4(es->st, es->sh, 387 ES1370_REG_ADC_SCOUNT, cnt); 388 } else es->ctrl &= ~CTRL_ADC_EN; 389 } 390 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 391 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 392 return 0; 393} 394 395static int 396eschan_getptr(void *data) 397{ 398 struct es_chinfo *ch = data; 399 struct es_info *es = ch->parent; 400 if (ch->dir == PCMDIR_PLAY) { 401 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 402 ES1370_REG_DAC2_FRAMECNT >> 8); 403 return (bus_space_read_4(es->st, es->sh, 404 ES1370_REG_DAC2_FRAMECNT & 0xff) >> 14) & 0x3fffc; 405 } else { 406 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 407 ES1370_REG_ADC_FRAMECNT >> 8); 408 return (bus_space_read_4(es->st, es->sh, 409 ES1370_REG_ADC_FRAMECNT & 0xff) >> 14) & 0x3fffc; 410 } 411} 412 413static pcmchan_caps * 414eschan_getcaps(void *data) 415{ 416 struct es_chinfo *ch = data; 417 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 418} 419 420/* The interrupt handler */ 421static void 422es_intr(void *p) 423{ 424 struct es_info *es = p; 425 unsigned intsrc, sctrl; 426 427 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 428 if ((intsrc & STAT_INTR) == 0) return; 429 430 sctrl = es->sctrl; 431 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 432 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 433 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 434 435 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 436 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 437 438 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 439 if (intsrc & STAT_DAC1); 440 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 441} 442 443/* ES1370 specific */ 444static int 445es1370_init(struct es_info *es) 446{ 447 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 448 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 449 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 450 451 es->sctrl = 0; 452 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 453 454 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 455 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 456 * {LR,B}CLK2 and run off the LRCLK2 457 * PLL; program DAC_SYNC=0! */ 458 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 459 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 460 461 return 0; 462} 463 464/* ES1371 specific */ 465int
|
467es1371_init(struct es_info *es)
| 466es1371_init(struct es_info *es, int rev)
|
468{ 469 int idx; 470 471 if (debug > 0) printf("es_init\n"); 472 473 es->num = 0; 474 es->ctrl = 0; 475 es->sctrl = 0; 476 /* initialize the chips */
| 467{ 468 int idx; 469 470 if (debug > 0) printf("es_init\n"); 471 472 es->num = 0; 473 es->ctrl = 0; 474 es->sctrl = 0; 475 /* initialize the chips */
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477 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
| 476 if (rev == 7 || rev >= 9) { 477#define ES1371_BINTSUMM_OFF 0x07 478 bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20); 479 if (debug > 0) printf("es_init rev == 7 || rev >= 9\n"); 480 } else { /* pre ac97 2.1 card */ 481 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 482 if (debug > 0) printf("es_init pre ac97 2.1\n"); 483 }
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478 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 479 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 480 /* AC'97 warm reset to start the bitclk */ 481 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 482 DELAY(2000); 483 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 484 /* Init the sample rate converter */ 485 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 486 for (idx = 0; idx < 0x80; idx++) 487 es1371_src_write(es, idx, 0); 488 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 489 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 490 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 491 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 492 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 493 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 494 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 495 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 496 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 497 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 498 es1371_adc_rate (es, 22050, 1); 499 es1371_dac_rate (es, 22050, 1); 500 es1371_dac_rate (es, 22050, 2); 501 /* WARNING: 502 * enabling the sample rate converter without properly programming 503 * its parameters causes the chip to lock up (the SRC busy bit will 504 * be stuck high, and I've found no way to rectify this other than 505 * power cycle) 506 */ 507 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 508 509 return (0); 510} 511 512static void 513es1371_wrcodec(void *s, int addr, u_int32_t data) 514{ 515 int sl; 516 unsigned t, x; 517 struct es_info *es = (struct es_info*)s; 518 519 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 520 521 for (t = 0; t < 0x1000; t++) 522 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 523 break; 524 sl = spltty(); 525 /* save the current state for later */ 526 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 527 /* enable SRC state data in SRC mux */ 528 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 529 (es1371_wait_src_ready(s) & 530 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 531 /* wait for a SAFE time to write addr/data and then do it, dammit */ 532 for (t = 0; t < 0x1000; t++) 533 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 534 break; 535 536 if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC, 537 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 538 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 539 540 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 541 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 542 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 543 /* restore SRC reg */ 544 es1371_wait_src_ready(s); 545 if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x); 546 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 547 splx(sl); 548} 549 550static u_int32_t 551es1371_rdcodec(void *s, int addr) 552{ 553 int sl; 554 unsigned t, x; 555 struct es_info *es = (struct es_info *)s; 556 557 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 558 559 for (t = 0; t < 0x1000; t++) 560 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 561 break; 562 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 563 564 sl = spltty(); 565 566 /* save the current state for later */ 567 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 568 /* enable SRC state data in SRC mux */ 569 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 570 (es1371_wait_src_ready(s) & 571 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 572 /* wait for a SAFE time to write addr/data and then do it, dammit */ 573 for (t = 0; t < 0x5000; t++) 574 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 575 break; 576 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 577 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 578 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 579 580 /* restore SRC reg */ 581 es1371_wait_src_ready(s); 582 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 583 584 splx(sl); 585 586 /* now wait for the stinkin' data (RDY) */ 587 for (t = 0; t < 0x1000; t++) 588 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 589 break; 590 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 591 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 592} 593 594static u_int
| 484 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 485 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 486 /* AC'97 warm reset to start the bitclk */ 487 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 488 DELAY(2000); 489 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 490 /* Init the sample rate converter */ 491 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 492 for (idx = 0; idx < 0x80; idx++) 493 es1371_src_write(es, idx, 0); 494 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 495 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 496 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 497 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 498 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 499 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 500 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 501 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 502 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 503 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 504 es1371_adc_rate (es, 22050, 1); 505 es1371_dac_rate (es, 22050, 1); 506 es1371_dac_rate (es, 22050, 2); 507 /* WARNING: 508 * enabling the sample rate converter without properly programming 509 * its parameters causes the chip to lock up (the SRC busy bit will 510 * be stuck high, and I've found no way to rectify this other than 511 * power cycle) 512 */ 513 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 514 515 return (0); 516} 517 518static void 519es1371_wrcodec(void *s, int addr, u_int32_t data) 520{ 521 int sl; 522 unsigned t, x; 523 struct es_info *es = (struct es_info*)s; 524 525 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 526 527 for (t = 0; t < 0x1000; t++) 528 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 529 break; 530 sl = spltty(); 531 /* save the current state for later */ 532 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 533 /* enable SRC state data in SRC mux */ 534 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 535 (es1371_wait_src_ready(s) & 536 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 537 /* wait for a SAFE time to write addr/data and then do it, dammit */ 538 for (t = 0; t < 0x1000; t++) 539 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 540 break; 541 542 if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC, 543 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 544 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 545 546 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 547 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 548 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 549 /* restore SRC reg */ 550 es1371_wait_src_ready(s); 551 if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x); 552 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 553 splx(sl); 554} 555 556static u_int32_t 557es1371_rdcodec(void *s, int addr) 558{ 559 int sl; 560 unsigned t, x; 561 struct es_info *es = (struct es_info *)s; 562 563 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 564 565 for (t = 0; t < 0x1000; t++) 566 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 567 break; 568 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 569 570 sl = spltty(); 571 572 /* save the current state for later */ 573 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 574 /* enable SRC state data in SRC mux */ 575 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 576 (es1371_wait_src_ready(s) & 577 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 578 /* wait for a SAFE time to write addr/data and then do it, dammit */ 579 for (t = 0; t < 0x5000; t++) 580 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 581 break; 582 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 583 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 584 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 585 586 /* restore SRC reg */ 587 es1371_wait_src_ready(s); 588 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 589 590 splx(sl); 591 592 /* now wait for the stinkin' data (RDY) */ 593 for (t = 0; t < 0x1000; t++) 594 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 595 break; 596 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 597 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 598} 599 600static u_int
|
595es1371_src_read(es_info_t *es, u_short reg)
| 601es1371_src_read(struct es_info *es, u_short reg)
|
596{ 597 unsigned int r; 598 599 r = es1371_wait_src_ready(es) & 600 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 601 r |= ES1371_SRC_RAM_ADDRO(reg); 602 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 603 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 604} 605 606static void
| 602{ 603 unsigned int r; 604 605 r = es1371_wait_src_ready(es) & 606 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 607 r |= ES1371_SRC_RAM_ADDRO(reg); 608 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 609 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 610} 611 612static void
|
607es1371_src_write(es_info_t *es, u_short reg, u_short data){
| 613es1371_src_write(struct es_info *es, u_short reg, u_short data){
|
608 u_int r; 609 610 r = es1371_wait_src_ready(es) & 611 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 612 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 613 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 614 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 615} 616 617static u_int
| 614 u_int r; 615 616 r = es1371_wait_src_ready(es) & 617 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 618 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 619 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 620 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 621} 622 623static u_int
|
618es1371_adc_rate(es_info_t *es, u_int rate, int set)
| 624es1371_adc_rate(struct es_info *es, u_int rate, int set)
|
619{ 620 u_int n, truncm, freq, result; 621 622 if (rate > 48000) rate = 48000; 623 if (rate < 4000) rate = 4000; 624 n = rate / 3000; 625 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 626 n--; 627 truncm = (21 * n - 1) | 1; 628 freq = ((48000UL << 15) / rate) * n; 629 result = (48000UL << 15) / (freq / n); 630 if (set) { 631 if (rate >= 24000) { 632 if (truncm > 239) truncm = 239; 633 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 634 (((239 - truncm) >> 1) << 9) | (n << 4)); 635 } else { 636 if (truncm > 119) truncm = 119; 637 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 638 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 639 } 640 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 641 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 642 0x00ff) | ((freq >> 5) & 0xfc00)); 643 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 644 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 645 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 646 } 647 return result; 648} 649 650static u_int
| 625{ 626 u_int n, truncm, freq, result; 627 628 if (rate > 48000) rate = 48000; 629 if (rate < 4000) rate = 4000; 630 n = rate / 3000; 631 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 632 n--; 633 truncm = (21 * n - 1) | 1; 634 freq = ((48000UL << 15) / rate) * n; 635 result = (48000UL << 15) / (freq / n); 636 if (set) { 637 if (rate >= 24000) { 638 if (truncm > 239) truncm = 239; 639 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 640 (((239 - truncm) >> 1) << 9) | (n << 4)); 641 } else { 642 if (truncm > 119) truncm = 119; 643 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 644 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 645 } 646 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 647 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 648 0x00ff) | ((freq >> 5) & 0xfc00)); 649 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 650 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 651 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 652 } 653 return result; 654} 655 656static u_int
|
651es1371_dac_rate(es_info_t *es, u_int rate, int set)
| 657es1371_dac_rate(struct es_info *es, u_int rate, int set)
|
652{ 653 u_int freq, r, result, dac, dis; 654 655 if (rate > 48000) rate = 48000; 656 if (rate < 4000) rate = 4000; 657 freq = (rate << 15) / 3000; 658 result = (freq * 3000) >> 15; 659 if (set) { 660 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 661 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 662 663 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 664 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 665 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 666 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 667 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 668 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 669 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 670 } 671 return result; 672} 673 674static u_int
| 658{ 659 u_int freq, r, result, dac, dis; 660 661 if (rate > 48000) rate = 48000; 662 if (rate < 4000) rate = 4000; 663 freq = (rate << 15) / 3000; 664 result = (freq * 3000) >> 15; 665 if (set) { 666 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 667 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 668 669 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 670 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 671 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 672 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 673 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 674 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 675 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 676 } 677 return result; 678} 679 680static u_int
|
675es1371_wait_src_ready(es_info_t *es)
| 681es1371_wait_src_ready(struct es_info *es)
|
676{ 677 u_int t, r; 678 679 for (t = 0; t < 500; t++) { 680 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 681 return r; 682 DELAY(1000); 683 } 684 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 685 return 0; 686} 687 688/* -------------------------------------------------------------------- */ 689 690/* 691 * Probe and attach the card 692 */ 693 694static int 695es_pci_probe(device_t dev) 696{ 697 if (pci_get_devid(dev) == ES1370_PCI_ID) { 698 device_set_desc(dev, "AudioPCI ES1370"); 699 return 0; 700 } else if (pci_get_devid(dev) == ES1371_PCI_ID) { 701 device_set_desc(dev, "AudioPCI ES1371"); 702 return 0; 703 } 704 return ENXIO; 705} 706 707static int 708es_pci_attach(device_t dev) 709{ 710 snddev_info *d; 711 u_int32_t data; 712 struct es_info *es = 0; 713 int type = 0; 714 int regid; 715 struct resource *reg = 0; 716 int mapped; 717 int irqid; 718 struct resource *irq = 0; 719 void *ih = 0; 720 char status[SND_STATUSLEN]; 721 struct ac97_info *codec; 722 pcm_channel *ct = NULL; 723 724 d = device_get_softc(dev); 725 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) { 726 device_printf(dev, "cannot allocate softc\n"); 727 return ENXIO; 728 } 729 bzero(es, sizeof *es); 730 731 mapped = 0; 732 data = pci_read_config(dev, PCIR_COMMAND, 2); 733 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 734 regid = MEM_MAP_REG; 735 type = SYS_RES_MEMORY; 736 reg = bus_alloc_resource(dev, type, ®id, 737 0, ~0, 1, RF_ACTIVE); 738 if (reg) { 739 es->st = rman_get_bustag(reg); 740 es->sh = rman_get_bushandle(reg); 741 mapped++; 742 } 743 } 744 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 745 regid = PCI_MAP_REG_START; 746 type = SYS_RES_IOPORT; 747 reg = bus_alloc_resource(dev, type, ®id, 748 0, ~0, 1, RF_ACTIVE); 749 if (reg) { 750 es->st = rman_get_bustag(reg); 751 es->sh = rman_get_bushandle(reg); 752 mapped++; 753 } 754 } 755 if (mapped == 0) { 756 device_printf(dev, "unable to map register space\n"); 757 goto bad; 758 } 759 760 if (pci_get_devid(dev) == ES1371_PCI_ID) {
| 682{ 683 u_int t, r; 684 685 for (t = 0; t < 500; t++) { 686 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 687 return r; 688 DELAY(1000); 689 } 690 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 691 return 0; 692} 693 694/* -------------------------------------------------------------------- */ 695 696/* 697 * Probe and attach the card 698 */ 699 700static int 701es_pci_probe(device_t dev) 702{ 703 if (pci_get_devid(dev) == ES1370_PCI_ID) { 704 device_set_desc(dev, "AudioPCI ES1370"); 705 return 0; 706 } else if (pci_get_devid(dev) == ES1371_PCI_ID) { 707 device_set_desc(dev, "AudioPCI ES1371"); 708 return 0; 709 } 710 return ENXIO; 711} 712 713static int 714es_pci_attach(device_t dev) 715{ 716 snddev_info *d; 717 u_int32_t data; 718 struct es_info *es = 0; 719 int type = 0; 720 int regid; 721 struct resource *reg = 0; 722 int mapped; 723 int irqid; 724 struct resource *irq = 0; 725 void *ih = 0; 726 char status[SND_STATUSLEN]; 727 struct ac97_info *codec; 728 pcm_channel *ct = NULL; 729 730 d = device_get_softc(dev); 731 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) { 732 device_printf(dev, "cannot allocate softc\n"); 733 return ENXIO; 734 } 735 bzero(es, sizeof *es); 736 737 mapped = 0; 738 data = pci_read_config(dev, PCIR_COMMAND, 2); 739 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 740 regid = MEM_MAP_REG; 741 type = SYS_RES_MEMORY; 742 reg = bus_alloc_resource(dev, type, ®id, 743 0, ~0, 1, RF_ACTIVE); 744 if (reg) { 745 es->st = rman_get_bustag(reg); 746 es->sh = rman_get_bushandle(reg); 747 mapped++; 748 } 749 } 750 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 751 regid = PCI_MAP_REG_START; 752 type = SYS_RES_IOPORT; 753 reg = bus_alloc_resource(dev, type, ®id, 754 0, ~0, 1, RF_ACTIVE); 755 if (reg) { 756 es->st = rman_get_bustag(reg); 757 es->sh = rman_get_bushandle(reg); 758 mapped++; 759 } 760 } 761 if (mapped == 0) { 762 device_printf(dev, "unable to map register space\n"); 763 goto bad; 764 } 765 766 if (pci_get_devid(dev) == ES1371_PCI_ID) {
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761 if(-1 == es1371_init(es)) {
| 767 if(-1 == es1371_init(es, pci_get_revid(dev))) {
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762 device_printf(dev, "unable to initialize the card\n"); 763 goto bad; 764 } 765 codec = ac97_create(es, es1371_rdcodec, es1371_wrcodec); 766 if (codec == NULL) goto bad; 767 /* our init routine does everything for us */ 768 /* set to NULL; flag mixer_init not to run the ac97_init */ 769 /* ac97_mixer.init = NULL; */ 770 mixer_init(d, &ac97_mixer, codec); 771 ct = &es1371_chantemplate; 772 } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 773 if (-1 == es1370_init(es)) { 774 device_printf(dev, "unable to initialize the card\n"); 775 goto bad; 776 } 777 mixer_init(d, &es1370_mixer, es); 778 ct = &es1370_chantemplate; 779 } else goto bad; 780 781 irqid = 0; 782 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid, 783 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 784 if (!irq 785 || bus_setup_intr(dev, irq, INTR_TYPE_TTY, es_intr, es, &ih)) { 786 device_printf(dev, "unable to map interrupt\n"); 787 goto bad; 788 } 789 790 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 791 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 792 /*highaddr*/BUS_SPACE_MAXADDR, 793 /*filter*/NULL, /*filterarg*/NULL, 794 /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 795 /*flags*/0, &es->parent_dmat) != 0) { 796 device_printf(dev, "unable to create dma tag\n"); 797 goto bad; 798 } 799 800 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 801 (type == SYS_RES_IOPORT)? "io" : "memory", 802 rman_get_start(reg), rman_get_start(irq)); 803 804 if (pcm_register(dev, es, 1, 1)) goto bad; 805 pcm_addchan(dev, PCMDIR_REC, ct, es); 806 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 807 pcm_setstatus(dev, status); 808 809 return 0; 810 811 bad: 812 if (es) free(es, M_DEVBUF); 813 if (reg) bus_release_resource(dev, type, regid, reg); 814 if (ih) bus_teardown_intr(dev, irq, ih); 815 if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq); 816 return ENXIO; 817} 818 819static device_method_t es_methods[] = { 820 /* Device interface */ 821 DEVMETHOD(device_probe, es_pci_probe), 822 DEVMETHOD(device_attach, es_pci_attach), 823 824 { 0, 0 } 825}; 826 827static driver_t es_driver = { 828 "pcm", 829 es_methods, 830 sizeof(snddev_info), 831}; 832 833static devclass_t pcm_devclass; 834 835DRIVER_MODULE(es, pci, es_driver, pcm_devclass, 0, 0);
| 768 device_printf(dev, "unable to initialize the card\n"); 769 goto bad; 770 } 771 codec = ac97_create(es, es1371_rdcodec, es1371_wrcodec); 772 if (codec == NULL) goto bad; 773 /* our init routine does everything for us */ 774 /* set to NULL; flag mixer_init not to run the ac97_init */ 775 /* ac97_mixer.init = NULL; */ 776 mixer_init(d, &ac97_mixer, codec); 777 ct = &es1371_chantemplate; 778 } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 779 if (-1 == es1370_init(es)) { 780 device_printf(dev, "unable to initialize the card\n"); 781 goto bad; 782 } 783 mixer_init(d, &es1370_mixer, es); 784 ct = &es1370_chantemplate; 785 } else goto bad; 786 787 irqid = 0; 788 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid, 789 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 790 if (!irq 791 || bus_setup_intr(dev, irq, INTR_TYPE_TTY, es_intr, es, &ih)) { 792 device_printf(dev, "unable to map interrupt\n"); 793 goto bad; 794 } 795 796 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 797 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 798 /*highaddr*/BUS_SPACE_MAXADDR, 799 /*filter*/NULL, /*filterarg*/NULL, 800 /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 801 /*flags*/0, &es->parent_dmat) != 0) { 802 device_printf(dev, "unable to create dma tag\n"); 803 goto bad; 804 } 805 806 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 807 (type == SYS_RES_IOPORT)? "io" : "memory", 808 rman_get_start(reg), rman_get_start(irq)); 809 810 if (pcm_register(dev, es, 1, 1)) goto bad; 811 pcm_addchan(dev, PCMDIR_REC, ct, es); 812 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 813 pcm_setstatus(dev, status); 814 815 return 0; 816 817 bad: 818 if (es) free(es, M_DEVBUF); 819 if (reg) bus_release_resource(dev, type, regid, reg); 820 if (ih) bus_teardown_intr(dev, irq, ih); 821 if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq); 822 return ENXIO; 823} 824 825static device_method_t es_methods[] = { 826 /* Device interface */ 827 DEVMETHOD(device_probe, es_pci_probe), 828 DEVMETHOD(device_attach, es_pci_attach), 829 830 { 0, 0 } 831}; 832 833static driver_t es_driver = { 834 "pcm", 835 es_methods, 836 sizeof(snddev_info), 837}; 838 839static devclass_t pcm_devclass; 840 841DRIVER_MODULE(es, pci, es_driver, pcm_devclass, 0, 0);
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