1/*- 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42/* 43 * Part of this code was heavily inspired by the linux driver from 44 * Thomas Sailer (sailer@ife.ee.ethz.ch) 45 * Just about everything has been touched and reworked in some way but 46 * the all the underlying sequences/timing/register values are from 47 * Thomas' code. 48 * 49*/ 50 51#include <dev/sound/pcm/sound.h> 52#include <dev/sound/pcm/ac97.h> 53#include <dev/sound/pci/es137x.h> 54 55#include <dev/pci/pcireg.h> 56#include <dev/pci/pcivar.h> 57 58#include <sys/sysctl.h> 59 60#include "mixer_if.h" 61
| 1/*- 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42/* 43 * Part of this code was heavily inspired by the linux driver from 44 * Thomas Sailer (sailer@ife.ee.ethz.ch) 45 * Just about everything has been touched and reworked in some way but 46 * the all the underlying sequences/timing/register values are from 47 * Thomas' code. 48 * 49*/ 50 51#include <dev/sound/pcm/sound.h> 52#include <dev/sound/pcm/ac97.h> 53#include <dev/sound/pci/es137x.h> 54 55#include <dev/pci/pcireg.h> 56#include <dev/pci/pcivar.h> 57 58#include <sys/sysctl.h> 59 60#include "mixer_if.h" 61
|
62SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/es137x.c 148591 2005-07-31 13:19:38Z netchild $");
| 62SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/es137x.c 150832 2005-10-02 15:56:36Z netchild $");
|
63 64#define MEM_MAP_REG 0x14 65 66/* PCI IDs of supported chips */ 67#define ES1370_PCI_ID 0x50001274 68#define ES1371_PCI_ID 0x13711274 69#define ES1371_PCI_ID2 0x13713274 70#define CT5880_PCI_ID 0x58801274 71#define CT4730_PCI_ID 0x89381102 72 73#define ES1371REV_ES1371_A 0x02 74#define ES1371REV_ES1371_B 0x09 75 76#define ES1371REV_ES1373_8 0x08 77#define ES1371REV_ES1373_A 0x04 78#define ES1371REV_ES1373_B 0x06 79 80#define ES1371REV_CT5880_A 0x07 81 82#define CT5880REV_CT5880_C 0x02 83#define CT5880REV_CT5880_D 0x03 84#define CT5880REV_CT5880_E 0x04 85 86#define CT4730REV_CT4730_A 0x00 87 88#define ES_DEFAULT_BUFSZ 4096 89 90/* device private data */ 91struct es_info; 92 93struct es_chinfo { 94 struct es_info *parent; 95 struct pcm_channel *channel; 96 struct snd_dbuf *buffer; 97 int dir, num; 98 u_int32_t fmt, blksz, bufsz; 99}; 100 101struct es_info { 102 bus_space_tag_t st; 103 bus_space_handle_t sh; 104 bus_dma_tag_t parent_dmat; 105 106 struct resource *reg, *irq; 107 int regtype, regid, irqid; 108 void *ih; 109 110 device_t dev; 111 int num;
| 63 64#define MEM_MAP_REG 0x14 65 66/* PCI IDs of supported chips */ 67#define ES1370_PCI_ID 0x50001274 68#define ES1371_PCI_ID 0x13711274 69#define ES1371_PCI_ID2 0x13713274 70#define CT5880_PCI_ID 0x58801274 71#define CT4730_PCI_ID 0x89381102 72 73#define ES1371REV_ES1371_A 0x02 74#define ES1371REV_ES1371_B 0x09 75 76#define ES1371REV_ES1373_8 0x08 77#define ES1371REV_ES1373_A 0x04 78#define ES1371REV_ES1373_B 0x06 79 80#define ES1371REV_CT5880_A 0x07 81 82#define CT5880REV_CT5880_C 0x02 83#define CT5880REV_CT5880_D 0x03 84#define CT5880REV_CT5880_E 0x04 85 86#define CT4730REV_CT4730_A 0x00 87 88#define ES_DEFAULT_BUFSZ 4096 89 90/* device private data */ 91struct es_info; 92 93struct es_chinfo { 94 struct es_info *parent; 95 struct pcm_channel *channel; 96 struct snd_dbuf *buffer; 97 int dir, num; 98 u_int32_t fmt, blksz, bufsz; 99}; 100 101struct es_info { 102 bus_space_tag_t st; 103 bus_space_handle_t sh; 104 bus_dma_tag_t parent_dmat; 105 106 struct resource *reg, *irq; 107 int regtype, regid, irqid; 108 void *ih; 109 110 device_t dev; 111 int num;
|
112 int spdif_en;
| |
113 unsigned int bufsz;
| 112 unsigned int bufsz;
|
| 113 struct pcmchan_caps caps;
|
114 115 /* Contents of board's registers */
| 114 115 /* Contents of board's registers */
|
116 u_long ctrl; 117 u_long sctrl;
| 116 uint32_t ctrl; 117 uint32_t sctrl;
|
118 struct es_chinfo pch, rch; 119 struct mtx *lock; 120}; 121
| 118 struct es_chinfo pch, rch; 119 struct mtx *lock; 120}; 121
|
122/* -------------------------------------------------------------------- */
| 122#define ES_LOCK(sc) snd_mtxlock((sc)->lock) 123#define ES_UNLOCK(sc) snd_mtxunlock((sc)->lock) 124#define ES_LOCK_ASSERT(sc) snd_mtxassert((sc)->lock)
|
123 124/* prototypes */ 125static void es_intr(void *);
| 125 126/* prototypes */ 127static void es_intr(void *);
|
126 127static u_int es1371_wait_src_ready(struct es_info *);
| 128static uint32_t es1371_wait_src_ready(struct es_info *);
|
128static void es1371_src_write(struct es_info *, u_short, unsigned short); 129static u_int es1371_adc_rate(struct es_info *, u_int, int); 130static u_int es1371_dac_rate(struct es_info *, u_int, int);
| 129static void es1371_src_write(struct es_info *, u_short, unsigned short); 130static u_int es1371_adc_rate(struct es_info *, u_int, int); 131static u_int es1371_dac_rate(struct es_info *, u_int, int);
|
131static int es1371_init(struct es_info *, device_t);
| 132static int es1371_init(struct es_info *);
|
132static int es1370_init(struct es_info *); 133static int es1370_wrcodec(struct es_info *, u_char, u_char); 134
| 133static int es1370_init(struct es_info *); 134static int es1370_wrcodec(struct es_info *, u_char, u_char); 135
|
135static u_int32_t es_playfmt[] = {
| 136static u_int32_t es_fmt[] = {
|
136 AFMT_U8, 137 AFMT_STEREO | AFMT_U8, 138 AFMT_S16_LE, 139 AFMT_STEREO | AFMT_S16_LE, 140 0 141};
| 137 AFMT_U8, 138 AFMT_STEREO | AFMT_U8, 139 AFMT_S16_LE, 140 AFMT_STEREO | AFMT_S16_LE, 141 0 142};
|
142static struct pcmchan_caps es_playcaps = {4000, 48000, es_playfmt, 0};
| 143static struct pcmchan_caps es_caps = {4000, 48000, es_fmt, 0};
|
143
| 144
|
144static u_int32_t es_recfmt[] = { 145 AFMT_U8, 146 AFMT_STEREO | AFMT_U8, 147 AFMT_S16_LE, 148 AFMT_STEREO | AFMT_S16_LE, 149 0 150}; 151static struct pcmchan_caps es_reccaps = {4000, 48000, es_recfmt, 0}; 152
| |
153static const struct { 154 unsigned volidx:4; 155 unsigned left:4; 156 unsigned right:4; 157 unsigned stereo:1; 158 unsigned recmask:13; 159 unsigned avail:1; 160} mixtable[SOUND_MIXER_NRDEVICES] = { 161 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 162 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 163 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 164 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 165 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 166 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 167 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 168 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 169 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 170 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 171}; 172
| 145static const struct { 146 unsigned volidx:4; 147 unsigned left:4; 148 unsigned right:4; 149 unsigned stereo:1; 150 unsigned recmask:13; 151 unsigned avail:1; 152} mixtable[SOUND_MIXER_NRDEVICES] = { 153 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 154 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 155 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 156 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 157 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 158 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 159 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 160 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 161 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 162 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 163}; 164
|
173static u_int32_t
| 165static __inline u_int32_t
|
174es_rd(struct es_info *es, int regno, int size) 175{ 176 switch (size) { 177 case 1: 178 return bus_space_read_1(es->st, es->sh, regno); 179 case 2: 180 return bus_space_read_2(es->st, es->sh, regno); 181 case 4: 182 return bus_space_read_4(es->st, es->sh, regno); 183 default: 184 return 0xFFFFFFFF; 185 } 186} 187
| 166es_rd(struct es_info *es, int regno, int size) 167{ 168 switch (size) { 169 case 1: 170 return bus_space_read_1(es->st, es->sh, regno); 171 case 2: 172 return bus_space_read_2(es->st, es->sh, regno); 173 case 4: 174 return bus_space_read_4(es->st, es->sh, regno); 175 default: 176 return 0xFFFFFFFF; 177 } 178} 179
|
188static void
| 180static __inline void
|
189es_wr(struct es_info *es, int regno, u_int32_t data, int size) 190{ 191 192 switch (size) { 193 case 1: 194 bus_space_write_1(es->st, es->sh, regno, data); 195 break; 196 case 2: 197 bus_space_write_2(es->st, es->sh, regno, data); 198 break; 199 case 4: 200 bus_space_write_4(es->st, es->sh, regno, data); 201 break; 202 } 203} 204 205/* -------------------------------------------------------------------- */ 206/* The es1370 mixer interface */ 207 208static int 209es1370_mixinit(struct snd_mixer *m) 210{ 211 int i; 212 u_int32_t v; 213 214 v = 0; 215 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 216 if (mixtable[i].avail) v |= (1 << i); 217 mix_setdevs(m, v); 218 v = 0; 219 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 220 if (mixtable[i].recmask) v |= (1 << i); 221 mix_setrecdevs(m, v); 222 return 0; 223} 224 225static int 226es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 227{
| 181es_wr(struct es_info *es, int regno, u_int32_t data, int size) 182{ 183 184 switch (size) { 185 case 1: 186 bus_space_write_1(es->st, es->sh, regno, data); 187 break; 188 case 2: 189 bus_space_write_2(es->st, es->sh, regno, data); 190 break; 191 case 4: 192 bus_space_write_4(es->st, es->sh, regno, data); 193 break; 194 } 195} 196 197/* -------------------------------------------------------------------- */ 198/* The es1370 mixer interface */ 199 200static int 201es1370_mixinit(struct snd_mixer *m) 202{ 203 int i; 204 u_int32_t v; 205 206 v = 0; 207 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 208 if (mixtable[i].avail) v |= (1 << i); 209 mix_setdevs(m, v); 210 v = 0; 211 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 212 if (mixtable[i].recmask) v |= (1 << i); 213 mix_setrecdevs(m, v); 214 return 0; 215} 216 217static int 218es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 219{
|
| 220 struct es_info *es;
|
228 int l, r, rl, rr; 229 230 if (!mixtable[dev].avail) return -1; 231 l = left; 232 r = mixtable[dev].stereo? right : l; 233 if (mixtable[dev].left == 0xf) { 234 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 235 } else { 236 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 237 }
| 221 int l, r, rl, rr; 222 223 if (!mixtable[dev].avail) return -1; 224 l = left; 225 r = mixtable[dev].stereo? right : l; 226 if (mixtable[dev].left == 0xf) { 227 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 228 } else { 229 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 230 }
|
| 231 es = mix_getdevinfo(m); 232 ES_LOCK(es);
|
238 if (mixtable[dev].stereo) { 239 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6;
| 233 if (mixtable[dev].stereo) { 234 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6;
|
240 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr);
| 235 es1370_wrcodec(es, mixtable[dev].right, rr);
|
241 }
| 236 }
|
242 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl);
| 237 es1370_wrcodec(es, mixtable[dev].left, rl); 238 ES_UNLOCK(es); 239
|
243 return l | (r << 8); 244} 245 246static int 247es1370_mixsetrecsrc(struct snd_mixer *m, u_int32_t src) 248{
| 240 return l | (r << 8); 241} 242 243static int 244es1370_mixsetrecsrc(struct snd_mixer *m, u_int32_t src) 245{
|
| 246 struct es_info *es;
|
249 int i, j = 0; 250
| 247 int i, j = 0; 248
|
| 249 es = mix_getdevinfo(m);
|
251 if (src == 0) src = 1 << SOUND_MIXER_MIC; 252 src &= mix_getrecdevs(m); 253 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 254 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 255
| 250 if (src == 0) src = 1 << SOUND_MIXER_MIC; 251 src &= mix_getrecdevs(m); 252 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 253 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 254
|
256 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 257 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 258 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 259 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 260 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 261 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f);
| 255 ES_LOCK(es); 256 es1370_wrcodec(es, CODEC_LIMIX1, j & 0x55); 257 es1370_wrcodec(es, CODEC_RIMIX1, j & 0xaa); 258 es1370_wrcodec(es, CODEC_LIMIX2, (j >> 8) & 0x17); 259 es1370_wrcodec(es, CODEC_RIMIX2, (j >> 8) & 0x0f); 260 es1370_wrcodec(es, CODEC_OMIX1, 0x7f); 261 es1370_wrcodec(es, CODEC_OMIX2, 0x3f); 262 ES_UNLOCK(es); 263
|
262 return src; 263} 264 265static kobj_method_t es1370_mixer_methods[] = { 266 KOBJMETHOD(mixer_init, es1370_mixinit), 267 KOBJMETHOD(mixer_set, es1370_mixset), 268 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 269 { 0, 0 } 270}; 271MIXER_DECLARE(es1370_mixer); 272 273/* -------------------------------------------------------------------- */ 274 275static int 276es1370_wrcodec(struct es_info *es, u_char i, u_char data) 277{ 278 u_int t; 279
| 264 return src; 265} 266 267static kobj_method_t es1370_mixer_methods[] = { 268 KOBJMETHOD(mixer_init, es1370_mixinit), 269 KOBJMETHOD(mixer_set, es1370_mixset), 270 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 271 { 0, 0 } 272}; 273MIXER_DECLARE(es1370_mixer); 274 275/* -------------------------------------------------------------------- */ 276 277static int 278es1370_wrcodec(struct es_info *es, u_char i, u_char data) 279{ 280 u_int t; 281
|
| 282 ES_LOCK_ASSERT(es); 283
|
280 for (t = 0; t < 0x1000; t++) { 281 if ((es_rd(es, ES1370_REG_STATUS, 4) & 282 STAT_CSTAT) == 0) { 283 es_wr(es, ES1370_REG_CODEC, 284 ((u_short)i << CODEC_INDEX_SHIFT) | data, 2); 285 return 0; 286 } 287 DELAY(1); 288 }
| 284 for (t = 0; t < 0x1000; t++) { 285 if ((es_rd(es, ES1370_REG_STATUS, 4) & 286 STAT_CSTAT) == 0) { 287 es_wr(es, ES1370_REG_CODEC, 288 ((u_short)i << CODEC_INDEX_SHIFT) | data, 2); 289 return 0; 290 } 291 DELAY(1); 292 }
|
289 printf("pcm: es1370_wrcodec timed out\n");
| 293 device_printf(es->dev, "%s: timed out\n", __func__);
|
290 return -1; 291} 292 293/* -------------------------------------------------------------------- */ 294 295/* channel interface */ 296static void * 297eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 298{ 299 struct es_info *es = devinfo; 300 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 301
| 294 return -1; 295} 296 297/* -------------------------------------------------------------------- */ 298 299/* channel interface */ 300static void * 301eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 302{ 303 struct es_info *es = devinfo; 304 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 305
|
302 snd_mtxlock(es->lock);
| |
303 ch->parent = es; 304 ch->channel = c; 305 ch->buffer = b; 306 ch->bufsz = es->bufsz; 307 ch->blksz = ch->bufsz / 2; 308 ch->num = ch->parent->num++;
| 306 ch->parent = es; 307 ch->channel = c; 308 ch->buffer = b; 309 ch->bufsz = es->bufsz; 310 ch->blksz = ch->bufsz / 2; 311 ch->num = ch->parent->num++;
|
309 snd_mtxunlock(es->lock);
| 312 ch->dir = dir;
|
310 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ch->bufsz) != 0) 311 return NULL;
| 313 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ch->bufsz) != 0) 314 return NULL;
|
312 return ch; 313} 314 315static int 316eschan_setdir(kobj_t obj, void *data, int dir) 317{ 318 struct es_chinfo *ch = data; 319 struct es_info *es = ch->parent; 320
| 315 ES_LOCK(es);
|
321 if (dir == PCMDIR_PLAY) { 322 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMEADR >> 8, 1); 323 es_wr(es, ES1370_REG_DAC2_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 324 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 325 } else { 326 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1); 327 es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 328 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 329 }
| 316 if (dir == PCMDIR_PLAY) { 317 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMEADR >> 8, 1); 318 es_wr(es, ES1370_REG_DAC2_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 319 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 320 } else { 321 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1); 322 es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 323 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 324 }
|
330 ch->dir = dir; 331 return 0;
| 325 ES_UNLOCK(es); 326 return ch;
|
332} 333 334static int 335eschan_setformat(kobj_t obj, void *data, u_int32_t format) 336{ 337 struct es_chinfo *ch = data; 338 struct es_info *es = ch->parent; 339
| 327} 328 329static int 330eschan_setformat(kobj_t obj, void *data, u_int32_t format) 331{ 332 struct es_chinfo *ch = data; 333 struct es_info *es = ch->parent; 334
|
| 335 ES_LOCK(es);
|
340 if (ch->dir == PCMDIR_PLAY) { 341 es->sctrl &= ~SCTRL_P2FMT; 342 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 343 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 344 } else { 345 es->sctrl &= ~SCTRL_R1FMT; 346 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 347 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 348 } 349 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
| 336 if (ch->dir == PCMDIR_PLAY) { 337 es->sctrl &= ~SCTRL_P2FMT; 338 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 339 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 340 } else { 341 es->sctrl &= ~SCTRL_R1FMT; 342 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 343 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 344 } 345 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
|
| 346 ES_UNLOCK(es);
|
350 ch->fmt = format; 351 return 0; 352} 353 354static int 355eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed) 356{ 357 struct es_chinfo *ch = data; 358 struct es_info *es = ch->parent; 359
| 347 ch->fmt = format; 348 return 0; 349} 350 351static int 352eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed) 353{ 354 struct es_chinfo *ch = data; 355 struct es_info *es = ch->parent; 356
|
| 357 /* XXX Fixed rate , do nothing. */ 358 ES_LOCK(es); 359 if (es->caps.minspeed == es->caps.maxspeed) { 360 speed = es->caps.maxspeed; 361 ES_UNLOCK(es); 362 return speed; 363 } 364 if (speed < es->caps.minspeed) 365 speed = es->caps.minspeed; 366 if (speed > es->caps.maxspeed) 367 speed = es->caps.maxspeed;
|
360 es->ctrl &= ~CTRL_PCLKDIV; 361 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 362 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
| 368 es->ctrl &= ~CTRL_PCLKDIV; 369 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 370 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
|
| 371 ES_UNLOCK(es);
|
363 /* rec/play speeds locked together - should indicate in flags */ 364 return speed; /* XXX calc real speed */ 365} 366 367static int 368eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed) 369{ 370 struct es_chinfo *ch = data; 371 struct es_info *es = ch->parent; 372 int i, delta; 373
| 372 /* rec/play speeds locked together - should indicate in flags */ 373 return speed; /* XXX calc real speed */ 374} 375 376static int 377eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed) 378{ 379 struct es_chinfo *ch = data; 380 struct es_info *es = ch->parent; 381 int i, delta; 382
|
| 383 ES_LOCK(es);
|
374 if (ch->dir == PCMDIR_PLAY) 375 i = es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 376 else 377 i = es1371_adc_rate(es, speed, 1); /* record */
| 384 if (ch->dir == PCMDIR_PLAY) 385 i = es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 386 else 387 i = es1371_adc_rate(es, speed, 1); /* record */
|
| 388 ES_UNLOCK(es);
|
378 delta = (speed > i) ? speed - i : i - speed; 379 if (delta < 2) 380 return speed; 381 return i; 382} 383 384static int 385eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 386{
| 389 delta = (speed > i) ? speed - i : i - speed; 390 if (delta < 2) 391 return speed; 392 return i; 393} 394 395static int 396eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 397{
|
| 398 struct es_info *es;
|
387 struct es_chinfo *ch = data;
| 399 struct es_chinfo *ch = data;
|
| 400 uint32_t oblksz, obufsz; 401 int error;
|
388
| 402
|
| 403 oblksz = ch->blksz; 404 obufsz = ch->bufsz;
|
389 ch->blksz = blocksize; 390 ch->bufsz = ch->blksz * 2;
| 405 ch->blksz = blocksize; 406 ch->bufsz = ch->blksz * 2;
|
391 sndbuf_resize(ch->buffer, 2, ch->blksz);
| 407 error = sndbuf_resize(ch->buffer, 2, ch->blksz); 408 if (error != 0) { 409 ch->blksz = oblksz; 410 ch->bufsz = obufsz; 411 es = ch->parent; 412 device_printf(es->dev, "unable to set block size, blksz = %d, " 413 "error = %d", blocksize, error); 414 }
|
392 return ch->blksz; 393} 394 395static int 396eschan_trigger(kobj_t obj, void *data, int go) 397{ 398 struct es_chinfo *ch = data; 399 struct es_info *es = ch->parent; 400 unsigned cnt; 401 402 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 403 return 0; 404 405 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1; 406
| 415 return ch->blksz; 416} 417 418static int 419eschan_trigger(kobj_t obj, void *data, int go) 420{ 421 struct es_chinfo *ch = data; 422 struct es_info *es = ch->parent; 423 unsigned cnt; 424 425 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 426 return 0; 427 428 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1; 429
|
| 430 ES_LOCK(es);
|
407 if (ch->dir == PCMDIR_PLAY) { 408 if (go == PCMTRIG_START) { 409 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 410 es->ctrl |= CTRL_DAC2_EN; 411 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN); 412 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 413 es_wr(es, ES1370_REG_DAC2_SCOUNT, cnt, 4); 414 /* start at beginning of buffer */ 415 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMECNT >> 8, 4); 416 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 417 } else es->ctrl &= ~CTRL_DAC2_EN; 418 } else { 419 if (go == PCMTRIG_START) { 420 es->ctrl |= CTRL_ADC_EN; 421 es->sctrl &= ~SCTRL_R1LOOPSEL; 422 es->sctrl |= SCTRL_R1INTEN; 423 es_wr(es, ES1370_REG_ADC_SCOUNT, cnt, 4); 424 /* start at beginning of buffer */ 425 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMECNT >> 8, 4); 426 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 427 } else es->ctrl &= ~CTRL_ADC_EN; 428 } 429 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 430 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
| 431 if (ch->dir == PCMDIR_PLAY) { 432 if (go == PCMTRIG_START) { 433 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 434 es->ctrl |= CTRL_DAC2_EN; 435 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN); 436 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 437 es_wr(es, ES1370_REG_DAC2_SCOUNT, cnt, 4); 438 /* start at beginning of buffer */ 439 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMECNT >> 8, 4); 440 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 441 } else es->ctrl &= ~CTRL_DAC2_EN; 442 } else { 443 if (go == PCMTRIG_START) { 444 es->ctrl |= CTRL_ADC_EN; 445 es->sctrl &= ~SCTRL_R1LOOPSEL; 446 es->sctrl |= SCTRL_R1INTEN; 447 es_wr(es, ES1370_REG_ADC_SCOUNT, cnt, 4); 448 /* start at beginning of buffer */ 449 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMECNT >> 8, 4); 450 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 451 } else es->ctrl &= ~CTRL_ADC_EN; 452 } 453 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 454 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4);
|
| 455 ES_UNLOCK(es);
|
431 return 0; 432} 433 434static int 435eschan_getptr(kobj_t obj, void *data) 436{ 437 struct es_chinfo *ch = data; 438 struct es_info *es = ch->parent; 439 u_int32_t reg, cnt; 440 441 if (ch->dir == PCMDIR_PLAY) 442 reg = ES1370_REG_DAC2_FRAMECNT; 443 else 444 reg = ES1370_REG_ADC_FRAMECNT;
| 456 return 0; 457} 458 459static int 460eschan_getptr(kobj_t obj, void *data) 461{ 462 struct es_chinfo *ch = data; 463 struct es_info *es = ch->parent; 464 u_int32_t reg, cnt; 465 466 if (ch->dir == PCMDIR_PLAY) 467 reg = ES1370_REG_DAC2_FRAMECNT; 468 else 469 reg = ES1370_REG_ADC_FRAMECNT;
|
| 470 ES_LOCK(es);
|
445 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4); 446 cnt = es_rd(es, reg & 0x000000ff, 4) >> 16;
| 471 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4); 472 cnt = es_rd(es, reg & 0x000000ff, 4) >> 16;
|
| 473 ES_UNLOCK(es);
|
447 /* cnt is longwords */ 448 return cnt << 2; 449} 450 451static struct pcmchan_caps * 452eschan_getcaps(kobj_t obj, void *data) 453{ 454 struct es_chinfo *ch = data;
| 474 /* cnt is longwords */ 475 return cnt << 2; 476} 477 478static struct pcmchan_caps * 479eschan_getcaps(kobj_t obj, void *data) 480{ 481 struct es_chinfo *ch = data;
|
455 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps;
| 482 struct es_info *es = ch->parent; 483 484 return &es->caps;
|
456} 457 458static kobj_method_t eschan1370_methods[] = { 459 KOBJMETHOD(channel_init, eschan_init),
| 485} 486 487static kobj_method_t eschan1370_methods[] = { 488 KOBJMETHOD(channel_init, eschan_init),
|
460 KOBJMETHOD(channel_setdir, eschan_setdir),
| |
461 KOBJMETHOD(channel_setformat, eschan_setformat), 462 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 463 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 464 KOBJMETHOD(channel_trigger, eschan_trigger), 465 KOBJMETHOD(channel_getptr, eschan_getptr), 466 KOBJMETHOD(channel_getcaps, eschan_getcaps), 467 { 0, 0 } 468}; 469CHANNEL_DECLARE(eschan1370); 470 471static kobj_method_t eschan1371_methods[] = { 472 KOBJMETHOD(channel_init, eschan_init),
| 489 KOBJMETHOD(channel_setformat, eschan_setformat), 490 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 491 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 492 KOBJMETHOD(channel_trigger, eschan_trigger), 493 KOBJMETHOD(channel_getptr, eschan_getptr), 494 KOBJMETHOD(channel_getcaps, eschan_getcaps), 495 { 0, 0 } 496}; 497CHANNEL_DECLARE(eschan1370); 498 499static kobj_method_t eschan1371_methods[] = { 500 KOBJMETHOD(channel_init, eschan_init),
|
473 KOBJMETHOD(channel_setdir, eschan_setdir),
| |
474 KOBJMETHOD(channel_setformat, eschan_setformat), 475 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 476 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 477 KOBJMETHOD(channel_trigger, eschan_trigger), 478 KOBJMETHOD(channel_getptr, eschan_getptr), 479 KOBJMETHOD(channel_getcaps, eschan_getcaps), 480 { 0, 0 } 481}; 482CHANNEL_DECLARE(eschan1371); 483 484/* -------------------------------------------------------------------- */ 485/* The interrupt handler */ 486static void 487es_intr(void *p) 488{ 489 struct es_info *es = p;
| 501 KOBJMETHOD(channel_setformat, eschan_setformat), 502 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 503 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 504 KOBJMETHOD(channel_trigger, eschan_trigger), 505 KOBJMETHOD(channel_getptr, eschan_getptr), 506 KOBJMETHOD(channel_getcaps, eschan_getcaps), 507 { 0, 0 } 508}; 509CHANNEL_DECLARE(eschan1371); 510 511/* -------------------------------------------------------------------- */ 512/* The interrupt handler */ 513static void 514es_intr(void *p) 515{ 516 struct es_info *es = p;
|
490 unsigned intsrc, sctrl;
| 517 uint32_t intsrc, sctrl;
|
491
| 518
|
492 snd_mtxlock(es->lock);
| 519 ES_LOCK(es);
|
493 intsrc = es_rd(es, ES1370_REG_STATUS, 4); 494 if ((intsrc & STAT_INTR) == 0) {
| 520 intsrc = es_rd(es, ES1370_REG_STATUS, 4); 521 if ((intsrc & STAT_INTR) == 0) {
|
495 snd_mtxunlock(es->lock);
| 522 ES_UNLOCK(es);
|
496 return; 497 } 498 499 sctrl = es->sctrl; 500 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 501 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 502 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 503 504 es_wr(es, ES1370_REG_SERIAL_CONTROL, sctrl, 4); 505 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
| 523 return; 524 } 525 526 sctrl = es->sctrl; 527 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 528 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 529 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 530 531 es_wr(es, ES1370_REG_SERIAL_CONTROL, sctrl, 4); 532 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4);
|
506 snd_mtxunlock(es->lock);
| 533 ES_UNLOCK(es);
|
507 508 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 509 if (intsrc & STAT_DAC1) 510 ; /* nothing */ 511 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 512} 513 514/* ES1370 specific */ 515static int 516es1370_init(struct es_info *es) 517{
| 534 535 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 536 if (intsrc & STAT_DAC1) 537 ; /* nothing */ 538 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 539} 540 541/* ES1370 specific */ 542static int 543es1370_init(struct es_info *es) 544{
|
| 545 int r; 546 547 /* XXX ES1370 default to fixed rate operation */ 548 if (resource_int_value(device_get_name(es->dev), 549 device_get_unit(es->dev), "fixed_rate", &r) == 0) { 550 if (r != 0) { 551 if (r < es_caps.minspeed) 552 r = es_caps.minspeed; 553 if (r > es_caps.maxspeed) 554 r = es_caps.maxspeed; 555 } 556 } else 557 r = es_caps.maxspeed; 558 ES_LOCK(es); 559 es->caps = es_caps; 560 if (r != 0) { 561 es->caps.minspeed = r; 562 es->caps.maxspeed = r; 563 }
|
518 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS |
| 564 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS |
|
519 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV);
| 565 (DAC2_SRTODIV(es->caps.maxspeed) << CTRL_SH_PCLKDIV);
|
520 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 521 522 es->sctrl = 0; 523 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 524 525 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 526 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 527 * {LR,B}CLK2 and run off the LRCLK2 528 * PLL; program DAC_SYNC=0! */ 529 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 530 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */
| 566 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 567 568 es->sctrl = 0; 569 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 570 571 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 572 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 573 * {LR,B}CLK2 and run off the LRCLK2 574 * PLL; program DAC_SYNC=0! */ 575 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 576 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */
|
| 577 ES_UNLOCK(es);
|
531 532 return 0; 533} 534 535/* ES1371 specific */ 536int
| 578 579 return 0; 580} 581 582/* ES1371 specific */ 583int
|
537es1371_init(struct es_info *es, device_t dev)
| 584es1371_init(struct es_info *es)
|
538{
| 585{
|
539 u_long cssr;
| 586 uint32_t cssr, devid, revid;
|
540 int idx;
| 587 int idx;
|
541 int devid = pci_get_devid(dev); 542 int revid = pci_get_revid(dev);
| |
543
| 588
|
| 589 ES_LOCK(es);
|
544 es->num = 0; 545 es->ctrl = 0; 546 es->sctrl = 0;
| 590 es->num = 0; 591 es->ctrl = 0; 592 es->sctrl = 0;
|
| 593 es->caps = es_caps;
|
547 cssr = 0;
| 594 cssr = 0;
|
| 595 devid = pci_get_devid(es->dev); 596 revid = pci_get_revid(es->dev);
|
548 if (devid == CT4730_PCI_ID) { 549 /* XXX amplifier hack? */ 550 es->ctrl |= (1 << 16); 551 } 552 /* initialize the chips */ 553 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 554 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 555 es_wr(es, ES1371_REG_LEGACY, 0, 4); 556 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 557 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 558 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 559 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 560 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 561 cssr = 1 << 29; 562 es_wr(es, ES1370_REG_STATUS, cssr, 4); 563 DELAY(20000); 564 } 565 /* AC'97 warm reset to start the bitclk */ 566 es_wr(es, ES1370_REG_CONTROL, es->ctrl | ES1371_SYNC_RES, 4); 567 DELAY(2000); 568 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 569 es1371_wait_src_ready(es); 570 /* Init the sample rate converter */ 571 es_wr(es, ES1371_REG_SMPRATE, ES1371_DIS_SRC, 4); 572 for (idx = 0; idx < 0x80; idx++) 573 es1371_src_write(es, idx, 0); 574 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 575 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 576 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 577 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 578 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 579 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 580 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 581 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 582 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 583 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 584 es1371_adc_rate (es, 22050, 1); 585 es1371_dac_rate (es, 22050, 1); 586 es1371_dac_rate (es, 22050, 2); 587 /* WARNING: 588 * enabling the sample rate converter without properly programming 589 * its parameters causes the chip to lock up (the SRC busy bit will 590 * be stuck high, and I've found no way to rectify this other than 591 * power cycle) 592 */ 593 es1371_wait_src_ready(es); 594 es_wr(es, ES1371_REG_SMPRATE, 0, 4); 595 /* try to reset codec directly */ 596 es_wr(es, ES1371_REG_CODEC, 0, 4); 597 es_wr(es, ES1370_REG_STATUS, cssr, 4);
| 597 if (devid == CT4730_PCI_ID) { 598 /* XXX amplifier hack? */ 599 es->ctrl |= (1 << 16); 600 } 601 /* initialize the chips */ 602 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 603 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 604 es_wr(es, ES1371_REG_LEGACY, 0, 4); 605 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 606 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 607 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 608 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 609 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 610 cssr = 1 << 29; 611 es_wr(es, ES1370_REG_STATUS, cssr, 4); 612 DELAY(20000); 613 } 614 /* AC'97 warm reset to start the bitclk */ 615 es_wr(es, ES1370_REG_CONTROL, es->ctrl | ES1371_SYNC_RES, 4); 616 DELAY(2000); 617 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 618 es1371_wait_src_ready(es); 619 /* Init the sample rate converter */ 620 es_wr(es, ES1371_REG_SMPRATE, ES1371_DIS_SRC, 4); 621 for (idx = 0; idx < 0x80; idx++) 622 es1371_src_write(es, idx, 0); 623 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 624 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 625 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 626 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 627 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 628 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 629 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 630 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 631 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 632 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 633 es1371_adc_rate (es, 22050, 1); 634 es1371_dac_rate (es, 22050, 1); 635 es1371_dac_rate (es, 22050, 2); 636 /* WARNING: 637 * enabling the sample rate converter without properly programming 638 * its parameters causes the chip to lock up (the SRC busy bit will 639 * be stuck high, and I've found no way to rectify this other than 640 * power cycle) 641 */ 642 es1371_wait_src_ready(es); 643 es_wr(es, ES1371_REG_SMPRATE, 0, 4); 644 /* try to reset codec directly */ 645 es_wr(es, ES1371_REG_CODEC, 0, 4); 646 es_wr(es, ES1370_REG_STATUS, cssr, 4);
|
| 647 ES_UNLOCK(es);
|
598 599 return (0); 600} 601 602/* -------------------------------------------------------------------- */ 603 604static int 605es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data) 606{
| 648 649 return (0); 650} 651 652/* -------------------------------------------------------------------- */ 653 654static int 655es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data) 656{
|
607 unsigned t, x, orig;
| 657 uint32_t t, x, orig;
|
608 struct es_info *es = (struct es_info*)s; 609 610 for (t = 0; t < 0x1000; t++) 611 if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4)) 612 break; 613 /* save the current state for later */ 614 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 615 /* enable SRC state data in SRC mux */ 616 es_wr(es, ES1371_REG_SMPRATE, 617 (x & 618 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)) | 619 0x00010000, 4); 620 /* busy wait */ 621 for (t = 0; t < 0x1000; t++) 622 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00000000) 623 break; 624 /* wait for a SAFE time to write addr/data and then do it, dammit */ 625 for (t = 0; t < 0x1000; t++) 626 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00010000) 627 break; 628 629 es_wr(es, ES1371_REG_CODEC, 630 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 631 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), 4); 632 /* restore SRC reg */ 633 es1371_wait_src_ready(s); 634 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 635 636 return 0; 637} 638 639static int 640es1371_rdcd(kobj_t obj, void *s, int addr) 641{
| 658 struct es_info *es = (struct es_info*)s; 659 660 for (t = 0; t < 0x1000; t++) 661 if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4)) 662 break; 663 /* save the current state for later */ 664 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 665 /* enable SRC state data in SRC mux */ 666 es_wr(es, ES1371_REG_SMPRATE, 667 (x & 668 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)) | 669 0x00010000, 4); 670 /* busy wait */ 671 for (t = 0; t < 0x1000; t++) 672 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00000000) 673 break; 674 /* wait for a SAFE time to write addr/data and then do it, dammit */ 675 for (t = 0; t < 0x1000; t++) 676 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00010000) 677 break; 678 679 es_wr(es, ES1371_REG_CODEC, 680 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 681 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), 4); 682 /* restore SRC reg */ 683 es1371_wait_src_ready(s); 684 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 685 686 return 0; 687} 688 689static int 690es1371_rdcd(kobj_t obj, void *s, int addr) 691{
|
642 unsigned t, x = 0, orig;
| 692 uint32_t t, x, orig;
|
643 struct es_info *es = (struct es_info *)s; 644 645 for (t = 0; t < 0x1000; t++) 646 if (!(x = es_rd(es, ES1371_REG_CODEC, 4) & CODEC_WIP)) 647 break; 648 649 /* save the current state for later */ 650 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 651 /* enable SRC state data in SRC mux */ 652 es_wr(es, ES1371_REG_SMPRATE, 653 (x & 654 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)) | 655 0x00010000, 4); 656 /* busy wait */ 657 for (t = 0; t < 0x1000; t++) 658 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00000000) 659 break; 660 /* wait for a SAFE time to write addr/data and then do it, dammit */ 661 for (t = 0; t < 0x1000; t++) 662 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00010000) 663 break; 664 665 es_wr(es, ES1371_REG_CODEC, 666 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 667 CODEC_PORD, 4); 668 669 /* restore SRC reg */ 670 es1371_wait_src_ready(s); 671 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 672 673 /* now wait for the stinkin' data (RDY) */ 674 for (t = 0; t < 0x1000; t++) 675 if ((x = es_rd(es, ES1371_REG_CODEC, 4)) & CODEC_RDY) 676 break; 677 678 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 679} 680 681static kobj_method_t es1371_ac97_methods[] = { 682 KOBJMETHOD(ac97_read, es1371_rdcd), 683 KOBJMETHOD(ac97_write, es1371_wrcd), 684 { 0, 0 } 685}; 686AC97_DECLARE(es1371_ac97); 687 688/* -------------------------------------------------------------------- */ 689 690static u_int 691es1371_src_read(struct es_info *es, u_short reg) 692{
| 693 struct es_info *es = (struct es_info *)s; 694 695 for (t = 0; t < 0x1000; t++) 696 if (!(x = es_rd(es, ES1371_REG_CODEC, 4) & CODEC_WIP)) 697 break; 698 699 /* save the current state for later */ 700 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 701 /* enable SRC state data in SRC mux */ 702 es_wr(es, ES1371_REG_SMPRATE, 703 (x & 704 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)) | 705 0x00010000, 4); 706 /* busy wait */ 707 for (t = 0; t < 0x1000; t++) 708 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00000000) 709 break; 710 /* wait for a SAFE time to write addr/data and then do it, dammit */ 711 for (t = 0; t < 0x1000; t++) 712 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00010000) 713 break; 714 715 es_wr(es, ES1371_REG_CODEC, 716 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 717 CODEC_PORD, 4); 718 719 /* restore SRC reg */ 720 es1371_wait_src_ready(s); 721 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 722 723 /* now wait for the stinkin' data (RDY) */ 724 for (t = 0; t < 0x1000; t++) 725 if ((x = es_rd(es, ES1371_REG_CODEC, 4)) & CODEC_RDY) 726 break; 727 728 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 729} 730 731static kobj_method_t es1371_ac97_methods[] = { 732 KOBJMETHOD(ac97_read, es1371_rdcd), 733 KOBJMETHOD(ac97_write, es1371_wrcd), 734 { 0, 0 } 735}; 736AC97_DECLARE(es1371_ac97); 737 738/* -------------------------------------------------------------------- */ 739 740static u_int 741es1371_src_read(struct es_info *es, u_short reg) 742{
|
693 unsigned int r;
| 743 uint32_t r;
|
694 695 r = es1371_wait_src_ready(es) & 696 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 697 r |= ES1371_SRC_RAM_ADDRO(reg); 698 es_wr(es, ES1371_REG_SMPRATE, r, 4); 699 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 700} 701 702static void 703es1371_src_write(struct es_info *es, u_short reg, u_short data) 704{
| 744 745 r = es1371_wait_src_ready(es) & 746 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 747 r |= ES1371_SRC_RAM_ADDRO(reg); 748 es_wr(es, ES1371_REG_SMPRATE, r, 4); 749 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 750} 751 752static void 753es1371_src_write(struct es_info *es, u_short reg, u_short data) 754{
|
705 u_int r;
| 755 uint32_t r;
|
706 707 r = es1371_wait_src_ready(es) & 708 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 709 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 710 es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4); 711} 712 713static u_int 714es1371_adc_rate(struct es_info *es, u_int rate, int set) 715{ 716 u_int n, truncm, freq, result; 717
| 756 757 r = es1371_wait_src_ready(es) & 758 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 759 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 760 es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4); 761} 762 763static u_int 764es1371_adc_rate(struct es_info *es, u_int rate, int set) 765{ 766 u_int n, truncm, freq, result; 767
|
| 768 ES_LOCK_ASSERT(es); 769
|
718 if (rate > 48000) rate = 48000; 719 if (rate < 4000) rate = 4000; 720 n = rate / 3000; 721 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 722 n--; 723 truncm = (21 * n - 1) | 1; 724 freq = ((48000UL << 15) / rate) * n; 725 result = (48000UL << 15) / (freq / n); 726 if (set) { 727 if (rate >= 24000) { 728 if (truncm > 239) truncm = 239; 729 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 730 (((239 - truncm) >> 1) << 9) | (n << 4)); 731 } else { 732 if (truncm > 119) truncm = 119; 733 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 734 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 735 } 736 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 737 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 738 0x00ff) | ((freq >> 5) & 0xfc00)); 739 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 740 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 741 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 742 } 743 return result; 744} 745 746static u_int 747es1371_dac_rate(struct es_info *es, u_int rate, int set) 748{ 749 u_int freq, r, result, dac, dis; 750
| 770 if (rate > 48000) rate = 48000; 771 if (rate < 4000) rate = 4000; 772 n = rate / 3000; 773 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 774 n--; 775 truncm = (21 * n - 1) | 1; 776 freq = ((48000UL << 15) / rate) * n; 777 result = (48000UL << 15) / (freq / n); 778 if (set) { 779 if (rate >= 24000) { 780 if (truncm > 239) truncm = 239; 781 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 782 (((239 - truncm) >> 1) << 9) | (n << 4)); 783 } else { 784 if (truncm > 119) truncm = 119; 785 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 786 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 787 } 788 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 789 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 790 0x00ff) | ((freq >> 5) & 0xfc00)); 791 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 792 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 793 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 794 } 795 return result; 796} 797 798static u_int 799es1371_dac_rate(struct es_info *es, u_int rate, int set) 800{ 801 u_int freq, r, result, dac, dis; 802
|
| 803 ES_LOCK_ASSERT(es); 804
|
751 if (rate > 48000) rate = 48000; 752 if (rate < 4000) rate = 4000; 753 freq = (rate << 15) / 3000; 754 result = (freq * 3000) >> 15; 755 if (set) { 756 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 757 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 758 759 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 760 es_wr(es, ES1371_REG_SMPRATE, r, 4); 761 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 762 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 763 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 764 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 765 es_wr(es, ES1371_REG_SMPRATE, r, 4); 766 } 767 return result; 768} 769
| 805 if (rate > 48000) rate = 48000; 806 if (rate < 4000) rate = 4000; 807 freq = (rate << 15) / 3000; 808 result = (freq * 3000) >> 15; 809 if (set) { 810 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 811 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 812 813 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 814 es_wr(es, ES1371_REG_SMPRATE, r, 4); 815 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 816 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 817 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 818 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 819 es_wr(es, ES1371_REG_SMPRATE, r, 4); 820 } 821 return result; 822} 823
|
770static u_int
| 824static uint32_t
|
771es1371_wait_src_ready(struct es_info *es) 772{
| 825es1371_wait_src_ready(struct es_info *es) 826{
|
773 u_int t, r;
| 827 uint32_t t, r;
|
774 775 for (t = 0; t < 0x1000; t++) { 776 if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) & ES1371_SRC_RAM_BUSY)) 777 return r; 778 DELAY(1); 779 }
| 828 829 for (t = 0; t < 0x1000; t++) { 830 if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) & ES1371_SRC_RAM_BUSY)) 831 return r; 832 DELAY(1); 833 }
|
780 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r);
| 834 device_printf(es->dev, "%s: timed out 0x%x [0x%x]\n", __func__, 835 ES1371_REG_SMPRATE, r);
|
781 return 0; 782} 783 784/* -------------------------------------------------------------------- */ 785 786/* 787 * Probe and attach the card 788 */ 789 790static int 791es_pci_probe(device_t dev) 792{ 793 switch(pci_get_devid(dev)) { 794 case ES1370_PCI_ID: 795 device_set_desc(dev, "AudioPCI ES1370"); 796 return BUS_PROBE_DEFAULT; 797 798 case ES1371_PCI_ID: 799 switch(pci_get_revid(dev)) { 800 case ES1371REV_ES1371_A: 801 device_set_desc(dev, "AudioPCI ES1371-A"); 802 return BUS_PROBE_DEFAULT; 803 804 case ES1371REV_ES1371_B: 805 device_set_desc(dev, "AudioPCI ES1371-B"); 806 return BUS_PROBE_DEFAULT; 807 808 case ES1371REV_ES1373_A: 809 device_set_desc(dev, "AudioPCI ES1373-A"); 810 return BUS_PROBE_DEFAULT; 811 812 case ES1371REV_ES1373_B: 813 device_set_desc(dev, "AudioPCI ES1373-B"); 814 return BUS_PROBE_DEFAULT; 815 816 case ES1371REV_ES1373_8: 817 device_set_desc(dev, "AudioPCI ES1373-8"); 818 return BUS_PROBE_DEFAULT; 819 820 case ES1371REV_CT5880_A: 821 device_set_desc(dev, "Creative CT5880-A"); 822 return BUS_PROBE_DEFAULT; 823 824 default: 825 device_set_desc(dev, "AudioPCI ES1371-?"); 826 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 827 return BUS_PROBE_DEFAULT; 828 } 829 830 case ES1371_PCI_ID2: 831 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)"); 832 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 833 return BUS_PROBE_DEFAULT; 834 835 case CT4730_PCI_ID: 836 switch(pci_get_revid(dev)) { 837 case CT4730REV_CT4730_A: 838 device_set_desc(dev, "Creative SB AudioPCI CT4730"); 839 return BUS_PROBE_DEFAULT; 840 default: 841 device_set_desc(dev, "Creative SB AudioPCI CT4730-?"); 842 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 843 return BUS_PROBE_DEFAULT; 844 } 845 846 case CT5880_PCI_ID: 847 switch(pci_get_revid(dev)) { 848 case CT5880REV_CT5880_C: 849 device_set_desc(dev, "Creative CT5880-C"); 850 return BUS_PROBE_DEFAULT; 851 852 case CT5880REV_CT5880_D: 853 device_set_desc(dev, "Creative CT5880-D"); 854 return BUS_PROBE_DEFAULT; 855 856 case CT5880REV_CT5880_E: 857 device_set_desc(dev, "Creative CT5880-E"); 858 return BUS_PROBE_DEFAULT; 859 860 default: 861 device_set_desc(dev, "Creative CT5880-?"); 862 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 863 return BUS_PROBE_DEFAULT; 864 } 865 866 default: 867 return ENXIO; 868 } 869} 870 871#ifdef SND_DYNSYSCTL 872static int
| 836 return 0; 837} 838 839/* -------------------------------------------------------------------- */ 840 841/* 842 * Probe and attach the card 843 */ 844 845static int 846es_pci_probe(device_t dev) 847{ 848 switch(pci_get_devid(dev)) { 849 case ES1370_PCI_ID: 850 device_set_desc(dev, "AudioPCI ES1370"); 851 return BUS_PROBE_DEFAULT; 852 853 case ES1371_PCI_ID: 854 switch(pci_get_revid(dev)) { 855 case ES1371REV_ES1371_A: 856 device_set_desc(dev, "AudioPCI ES1371-A"); 857 return BUS_PROBE_DEFAULT; 858 859 case ES1371REV_ES1371_B: 860 device_set_desc(dev, "AudioPCI ES1371-B"); 861 return BUS_PROBE_DEFAULT; 862 863 case ES1371REV_ES1373_A: 864 device_set_desc(dev, "AudioPCI ES1373-A"); 865 return BUS_PROBE_DEFAULT; 866 867 case ES1371REV_ES1373_B: 868 device_set_desc(dev, "AudioPCI ES1373-B"); 869 return BUS_PROBE_DEFAULT; 870 871 case ES1371REV_ES1373_8: 872 device_set_desc(dev, "AudioPCI ES1373-8"); 873 return BUS_PROBE_DEFAULT; 874 875 case ES1371REV_CT5880_A: 876 device_set_desc(dev, "Creative CT5880-A"); 877 return BUS_PROBE_DEFAULT; 878 879 default: 880 device_set_desc(dev, "AudioPCI ES1371-?"); 881 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 882 return BUS_PROBE_DEFAULT; 883 } 884 885 case ES1371_PCI_ID2: 886 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)"); 887 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 888 return BUS_PROBE_DEFAULT; 889 890 case CT4730_PCI_ID: 891 switch(pci_get_revid(dev)) { 892 case CT4730REV_CT4730_A: 893 device_set_desc(dev, "Creative SB AudioPCI CT4730"); 894 return BUS_PROBE_DEFAULT; 895 default: 896 device_set_desc(dev, "Creative SB AudioPCI CT4730-?"); 897 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 898 return BUS_PROBE_DEFAULT; 899 } 900 901 case CT5880_PCI_ID: 902 switch(pci_get_revid(dev)) { 903 case CT5880REV_CT5880_C: 904 device_set_desc(dev, "Creative CT5880-C"); 905 return BUS_PROBE_DEFAULT; 906 907 case CT5880REV_CT5880_D: 908 device_set_desc(dev, "Creative CT5880-D"); 909 return BUS_PROBE_DEFAULT; 910 911 case CT5880REV_CT5880_E: 912 device_set_desc(dev, "Creative CT5880-E"); 913 return BUS_PROBE_DEFAULT; 914 915 default: 916 device_set_desc(dev, "Creative CT5880-?"); 917 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 918 return BUS_PROBE_DEFAULT; 919 } 920 921 default: 922 return ENXIO; 923 } 924} 925 926#ifdef SND_DYNSYSCTL 927static int
|
873sysctl_es1371x_spdif_enable(SYSCTL_HANDLER_ARGS)
| 928sysctl_es137x_spdif_enable(SYSCTL_HANDLER_ARGS)
|
874{ 875 struct es_info *es; 876 device_t dev;
| 929{ 930 struct es_info *es; 931 device_t dev;
|
877 int err, new_en, r;
| 932 uint32_t r; 933 int err, new_en;
|
878 879 dev = oidp->oid_arg1; 880 es = pcm_getdevinfo(dev);
| 934 935 dev = oidp->oid_arg1; 936 es = pcm_getdevinfo(dev);
|
881 snd_mtxlock(es->lock); 882 new_en = es->spdif_en; 883 snd_mtxunlock(es->lock);
| 937 ES_LOCK(es); 938 r = es_rd(es, ES1370_REG_STATUS, 4); 939 ES_UNLOCK(es); 940 new_en = (r & ENABLE_SPDIF) ? 1 : 0;
|
884 err = sysctl_handle_int(oidp, &new_en, sizeof(new_en), req); 885 886 if (err || req->newptr == NULL)
| 941 err = sysctl_handle_int(oidp, &new_en, sizeof(new_en), req); 942 943 if (err || req->newptr == NULL)
|
887 return err;
| 944 return (err);
|
888 if (new_en < 0 || new_en > 1)
| 945 if (new_en < 0 || new_en > 1)
|
889 return EINVAL;
| 946 return (EINVAL);
|
890
| 947
|
891 snd_mtxlock(es->lock); 892 es->spdif_en = new_en; 893 r = es_rd(es, ES1370_REG_STATUS, 4);
| 948 ES_LOCK(es);
|
894 if (new_en) { 895 r |= ENABLE_SPDIF; 896 es->ctrl |= SPDIFEN_B; 897 es->ctrl |= RECEN_B; 898 } else { 899 r &= ~ENABLE_SPDIF; 900 es->ctrl &= ~SPDIFEN_B; 901 es->ctrl &= ~RECEN_B; 902 } 903 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 904 es_wr(es, ES1370_REG_STATUS, r, 4);
| 949 if (new_en) { 950 r |= ENABLE_SPDIF; 951 es->ctrl |= SPDIFEN_B; 952 es->ctrl |= RECEN_B; 953 } else { 954 r &= ~ENABLE_SPDIF; 955 es->ctrl &= ~SPDIFEN_B; 956 es->ctrl &= ~RECEN_B; 957 } 958 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 959 es_wr(es, ES1370_REG_STATUS, r, 4);
|
905 snd_mtxunlock(es->lock); 906 return 0;
| 960 ES_UNLOCK(es); 961 962 return (0);
|
907} 908 909static int
| 963} 964 965static int
|
910sysctl_es1371x_latency_timer(SYSCTL_HANDLER_ARGS)
| 966sysctl_es137x_latency_timer(SYSCTL_HANDLER_ARGS)
|
911{ 912 struct es_info *es; 913 device_t dev;
| 967{ 968 struct es_info *es; 969 device_t dev;
|
914 int err, val;
| 970 uint32_t val; 971 int err;
|
915 916 dev = oidp->oid_arg1; 917 es = pcm_getdevinfo(dev);
| 972 973 dev = oidp->oid_arg1; 974 es = pcm_getdevinfo(dev);
|
918 snd_mtxlock(es->lock);
| 975 ES_LOCK(es);
|
919 val = pci_read_config(dev, PCIR_LATTIMER, 1);
| 976 val = pci_read_config(dev, PCIR_LATTIMER, 1);
|
920 snd_mtxunlock(es->lock);
| 977 ES_UNLOCK(es);
|
921 err = sysctl_handle_int(oidp, &val, sizeof(val), req); 922 923 if (err || req->newptr == NULL)
| 978 err = sysctl_handle_int(oidp, &val, sizeof(val), req); 979 980 if (err || req->newptr == NULL)
|
924 return err; 925 if (val < 0 || val > 255) 926 return EINVAL;
| 981 return (err); 982 if (val > 255) 983 return (EINVAL);
|
927
| 984
|
928 snd_mtxlock(es->lock);
| 985 ES_LOCK(es);
|
929 pci_write_config(dev, PCIR_LATTIMER, val, 1);
| 986 pci_write_config(dev, PCIR_LATTIMER, val, 1);
|
930 snd_mtxunlock(es->lock); 931 return 0;
| 987 ES_UNLOCK(es); 988 989 return (0);
|
932}
| 990}
|
| 991 992static int 993sysctl_es137x_fixed_rate(SYSCTL_HANDLER_ARGS) 994{ 995 struct es_info *es; 996 device_t dev; 997 uint32_t val; 998 int err; 999 1000 dev = oidp->oid_arg1; 1001 es = pcm_getdevinfo(dev); 1002 ES_LOCK(es); 1003 if (es->caps.minspeed == es->caps.maxspeed) 1004 val = es->caps.maxspeed; 1005 else 1006 val = 0; 1007 ES_UNLOCK(es); 1008 err = sysctl_handle_int(oidp, &val, sizeof(val), req); 1009 1010 if (err || req->newptr == NULL) 1011 return (err); 1012 if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed)) 1013 return (EINVAL); 1014 1015 ES_LOCK(es); 1016 if (val) { 1017 es->caps.minspeed = val; 1018 es->caps.maxspeed = val; 1019 es->ctrl &= ~CTRL_PCLKDIV; 1020 es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV; 1021 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1022 } else { 1023 es->caps.minspeed = es_caps.minspeed; 1024 es->caps.maxspeed = es_caps.maxspeed; 1025 } 1026 ES_UNLOCK(es); 1027 1028 return (0); 1029}
|
933#endif /* SND_DYNSYSCTL */ 934 935static void 936es_init_sysctls(device_t dev) 937{ 938#ifdef SND_DYNSYSCTL 939 struct es_info *es; 940 int r, devid, revid; 941 942 devid = pci_get_devid(dev); 943 revid = pci_get_revid(dev); 944 es = pcm_getdevinfo(dev); 945 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 946 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 947 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 948 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 949 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) {
| 1030#endif /* SND_DYNSYSCTL */ 1031 1032static void 1033es_init_sysctls(device_t dev) 1034{ 1035#ifdef SND_DYNSYSCTL 1036 struct es_info *es; 1037 int r, devid, revid; 1038 1039 devid = pci_get_devid(dev); 1040 revid = pci_get_revid(dev); 1041 es = pcm_getdevinfo(dev); 1042 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 1043 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 1044 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 1045 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 1046 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) {
|
950 r = es_rd(es, ES1370_REG_STATUS, 4); 951 es->spdif_en = (r & ENABLE_SPDIF) ? 1 : 0;
| |
952 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 953 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 954 OID_AUTO, "spdif_enabled", 955 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
| 1047 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1048 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1049 OID_AUTO, "spdif_enabled", 1050 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
|
956 sysctl_es1371x_spdif_enable, "I",
| 1051 sysctl_es137x_spdif_enable, "I",
|
957 "Enable S/PDIF output on primary playback channel");
| 1052 "Enable S/PDIF output on primary playback channel");
|
| 1053 } else if (devid == ES1370_PCI_ID) { 1054 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1055 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1056 OID_AUTO, "fixed_rate", 1057 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1058 sysctl_es137x_fixed_rate, "I", 1059 "Enable fixed rate playback/recording");
|
958 } 959 if (resource_int_value(device_get_name(dev), 960 device_get_unit(dev), "latency_timer", &r) == 0 && 961 !(r < 0 || r > 255)) 962 pci_write_config(dev, PCIR_LATTIMER, r, 1); 963 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 964 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 965 OID_AUTO, "latency_timer", 966 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
| 1060 } 1061 if (resource_int_value(device_get_name(dev), 1062 device_get_unit(dev), "latency_timer", &r) == 0 && 1063 !(r < 0 || r > 255)) 1064 pci_write_config(dev, PCIR_LATTIMER, r, 1); 1065 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1066 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1067 OID_AUTO, "latency_timer", 1068 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
|
967 sysctl_es1371x_latency_timer, "I",
| 1069 sysctl_es137x_latency_timer, "I",
|
968 "PCI Latency Timer configuration"); 969#endif /* SND_DYNSYSCTL */ 970} 971 972static int 973es_pci_attach(device_t dev) 974{ 975 u_int32_t data;
| 1070 "PCI Latency Timer configuration"); 1071#endif /* SND_DYNSYSCTL */ 1072} 1073 1074static int 1075es_pci_attach(device_t dev) 1076{ 1077 u_int32_t data;
|
976 struct es_info *es = 0;
| 1078 struct es_info *es = NULL;
|
977 int mapped; 978 char status[SND_STATUSLEN];
| 1079 int mapped; 1080 char status[SND_STATUSLEN];
|
979 struct ac97_info *codec = 0;
| 1081 struct ac97_info *codec = NULL;
|
980 kobj_class_t ct = NULL;
| 1082 kobj_class_t ct = NULL;
|
981 int devid, revid;
| 1083 uint32_t devid;
|
982 983 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) { 984 device_printf(dev, "cannot allocate softc\n"); 985 return ENXIO; 986 } 987 es->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 988 es->dev = dev; 989 mapped = 0;
| 1084 1085 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) { 1086 device_printf(dev, "cannot allocate softc\n"); 1087 return ENXIO; 1088 } 1089 es->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 1090 es->dev = dev; 1091 mapped = 0;
|
| 1092 1093 pci_enable_busmaster(dev);
|
990 data = pci_read_config(dev, PCIR_COMMAND, 2);
| 1094 data = pci_read_config(dev, PCIR_COMMAND, 2);
|
991 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
| 1095 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
|
992 pci_write_config(dev, PCIR_COMMAND, data, 2); 993 data = pci_read_config(dev, PCIR_COMMAND, 2); 994 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 995 es->regid = MEM_MAP_REG; 996 es->regtype = SYS_RES_MEMORY; 997 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 998 RF_ACTIVE);
| 1096 pci_write_config(dev, PCIR_COMMAND, data, 2); 1097 data = pci_read_config(dev, PCIR_COMMAND, 2); 1098 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 1099 es->regid = MEM_MAP_REG; 1100 es->regtype = SYS_RES_MEMORY; 1101 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1102 RF_ACTIVE);
|
999 if (es->reg) { 1000 es->st = rman_get_bustag(es->reg); 1001 es->sh = rman_get_bushandle(es->reg);
| 1103 if (es->reg)
|
1002 mapped++;
| 1104 mapped++;
|
1003 }
| |
1004 } 1005 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 1006 es->regid = PCIR_BAR(0); 1007 es->regtype = SYS_RES_IOPORT; 1008 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1009 RF_ACTIVE);
| 1105 } 1106 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 1107 es->regid = PCIR_BAR(0); 1108 es->regtype = SYS_RES_IOPORT; 1109 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1110 RF_ACTIVE);
|
1010 if (es->reg) { 1011 es->st = rman_get_bustag(es->reg); 1012 es->sh = rman_get_bushandle(es->reg);
| 1111 if (es->reg)
|
1013 mapped++;
| 1112 mapped++;
|
1014 }
| |
1015 } 1016 if (mapped == 0) { 1017 device_printf(dev, "unable to map register space\n"); 1018 goto bad; 1019 } 1020
| 1113 } 1114 if (mapped == 0) { 1115 device_printf(dev, "unable to map register space\n"); 1116 goto bad; 1117 } 1118
|
| 1119 es->st = rman_get_bustag(es->reg); 1120 es->sh = rman_get_bushandle(es->reg);
|
1021 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); 1022 1023 devid = pci_get_devid(dev);
| 1121 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); 1122 1123 devid = pci_get_devid(dev);
|
1024 revid = pci_get_revid(dev); 1025 1026 if (devid == ES1371_PCI_ID || devid == ES1371_PCI_ID2 || 1027 devid == CT5880_PCI_ID || devid == CT4730_PCI_ID) { 1028 if(-1 == es1371_init(es, dev)) { 1029 device_printf(dev, "unable to initialize the card\n"); 1030 goto bad; 1031 }
| 1124 switch (devid) { 1125 case ES1371_PCI_ID: 1126 case ES1371_PCI_ID2: 1127 case CT5880_PCI_ID: 1128 case CT4730_PCI_ID: 1129 es1371_init(es);
|
1032 codec = AC97_CREATE(dev, es, es1371_ac97);
| 1130 codec = AC97_CREATE(dev, es, es1371_ac97);
|
1033 if (codec == NULL) goto bad;
| 1131 if (codec == NULL) 1132 goto bad;
|
1034 /* our init routine does everything for us */ 1035 /* set to NULL; flag mixer_init not to run the ac97_init */ 1036 /* ac97_mixer.init = NULL; */
| 1133 /* our init routine does everything for us */ 1134 /* set to NULL; flag mixer_init not to run the ac97_init */ 1135 /* ac97_mixer.init = NULL; */
|
1037 if (mixer_init(dev, ac97_getmixerclass(), codec)) goto bad;
| 1136 if (mixer_init(dev, ac97_getmixerclass(), codec)) 1137 goto bad;
|
1038 ct = &eschan1371_class;
| 1138 ct = &eschan1371_class;
|
1039 } else if (devid == ES1370_PCI_ID) { 1040 if (-1 == es1370_init(es)) { 1041 device_printf(dev, "unable to initialize the card\n");
| 1139 break; 1140 case ES1370_PCI_ID: 1141 es1370_init(es); 1142 if (mixer_init(dev, &es1370_mixer_class, es))
|
1042 goto bad;
| 1143 goto bad;
|
1043 } 1044 if (mixer_init(dev, &es1370_mixer_class, es)) goto bad;
| |
1045 ct = &eschan1370_class;
| 1144 ct = &eschan1370_class;
|
1046 } else goto bad;
| 1145 break; 1146 default: 1147 goto bad; 1148 /* NOTREACHED */ 1149 }
|
1047 1048 es->irqid = 0; 1049 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid, 1050 RF_ACTIVE | RF_SHAREABLE); 1051 if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr, es, &es->ih)) { 1052 device_printf(dev, "unable to map interrupt\n"); 1053 goto bad; 1054 } 1055 1056 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1057 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 1058 /*highaddr*/BUS_SPACE_MAXADDR, 1059 /*filter*/NULL, /*filterarg*/NULL, 1060 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1061 /*flags*/0, /*lockfunc*/NULL, 1062 /*lockarg*/NULL, &es->parent_dmat) != 0) { 1063 device_printf(dev, "unable to create dma tag\n"); 1064 goto bad; 1065 } 1066 1067 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld %s", 1068 (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 1069 rman_get_start(es->reg), rman_get_start(es->irq),PCM_KLDSTRING(snd_es137x)); 1070
| 1150 1151 es->irqid = 0; 1152 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid, 1153 RF_ACTIVE | RF_SHAREABLE); 1154 if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr, es, &es->ih)) { 1155 device_printf(dev, "unable to map interrupt\n"); 1156 goto bad; 1157 } 1158 1159 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1160 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 1161 /*highaddr*/BUS_SPACE_MAXADDR, 1162 /*filter*/NULL, /*filterarg*/NULL, 1163 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1164 /*flags*/0, /*lockfunc*/NULL, 1165 /*lockarg*/NULL, &es->parent_dmat) != 0) { 1166 device_printf(dev, "unable to create dma tag\n"); 1167 goto bad; 1168 } 1169 1170 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld %s", 1171 (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 1172 rman_get_start(es->reg), rman_get_start(es->irq),PCM_KLDSTRING(snd_es137x)); 1173
|
1071 if (pcm_register(dev, es, 1, 1)) goto bad;
| 1174 if (pcm_register(dev, es, 1, 1)) 1175 goto bad;
|
1072 pcm_addchan(dev, PCMDIR_REC, ct, es); 1073 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 1074 es_init_sysctls(dev); 1075 pcm_setstatus(dev, status); 1076 1077 return 0; 1078 1079 bad: 1080 if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat); 1081 if (es->ih) bus_teardown_intr(dev, es->irq, es->ih); 1082 if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1083 if (codec) ac97_destroy(codec); 1084 if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); 1085 if (es->lock) snd_mtxfree(es->lock); 1086 if (es) free(es, M_DEVBUF); 1087 return ENXIO; 1088} 1089 1090static int 1091es_pci_detach(device_t dev) 1092{ 1093 int r; 1094 struct es_info *es; 1095 1096 r = pcm_unregister(dev); 1097 if (r) return r; 1098 1099 es = pcm_getdevinfo(dev);
| 1176 pcm_addchan(dev, PCMDIR_REC, ct, es); 1177 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 1178 es_init_sysctls(dev); 1179 pcm_setstatus(dev, status); 1180 1181 return 0; 1182 1183 bad: 1184 if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat); 1185 if (es->ih) bus_teardown_intr(dev, es->irq, es->ih); 1186 if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1187 if (codec) ac97_destroy(codec); 1188 if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); 1189 if (es->lock) snd_mtxfree(es->lock); 1190 if (es) free(es, M_DEVBUF); 1191 return ENXIO; 1192} 1193 1194static int 1195es_pci_detach(device_t dev) 1196{ 1197 int r; 1198 struct es_info *es; 1199 1200 r = pcm_unregister(dev); 1201 if (r) return r; 1202 1203 es = pcm_getdevinfo(dev);
|
1100 bus_dma_tag_destroy(es->parent_dmat);
| |
1101 bus_teardown_intr(dev, es->irq, es->ih); 1102 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1103 bus_release_resource(dev, es->regtype, es->regid, es->reg);
| 1204 bus_teardown_intr(dev, es->irq, es->ih); 1205 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1206 bus_release_resource(dev, es->regtype, es->regid, es->reg);
|
| 1207 bus_dma_tag_destroy(es->parent_dmat);
|
1104 snd_mtxfree(es->lock); 1105 free(es, M_DEVBUF); 1106 1107 return 0; 1108} 1109 1110static device_method_t es_methods[] = { 1111 /* Device interface */ 1112 DEVMETHOD(device_probe, es_pci_probe), 1113 DEVMETHOD(device_attach, es_pci_attach), 1114 DEVMETHOD(device_detach, es_pci_detach), 1115 1116 { 0, 0 } 1117}; 1118 1119static driver_t es_driver = { 1120 "pcm", 1121 es_methods, 1122 PCM_SOFTC_SIZE, 1123}; 1124 1125DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 1126MODULE_DEPEND(snd_es137x, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 1127MODULE_VERSION(snd_es137x, 1);
| 1208 snd_mtxfree(es->lock); 1209 free(es, M_DEVBUF); 1210 1211 return 0; 1212} 1213 1214static device_method_t es_methods[] = { 1215 /* Device interface */ 1216 DEVMETHOD(device_probe, es_pci_probe), 1217 DEVMETHOD(device_attach, es_pci_attach), 1218 DEVMETHOD(device_detach, es_pci_detach), 1219 1220 { 0, 0 } 1221}; 1222 1223static driver_t es_driver = { 1224 "pcm", 1225 es_methods, 1226 PCM_SOFTC_SIZE, 1227}; 1228 1229DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 1230MODULE_DEPEND(snd_es137x, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 1231MODULE_VERSION(snd_es137x, 1);
|