39
40/* -------------------------------------------------------------------- */
41
42#define NUM_G 64 /* use all channels */
43#define WAVEOUT_MAXBUFSIZE 32768
44#define EMUPAGESIZE 4096 /* don't change */
45#define EMUMAXPAGES (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE)
46#define EMU10K1_PCI_ID 0x00021102 /* 1102 => Creative Labs Vendor ID */
47#define EMU10K2_PCI_ID 0x00041102
48#define EMU10K3_PCI_ID 0x00081102
49#define EMU_DEFAULT_BUFSZ 4096
50#define EMU_MAX_CHANS 8
51#define EMU_CHANS 4
52
53#define MAXREQVOICES 8
54#define RESERVED 0
55#define NUM_MIDI 16
56#define NUM_FXSENDS 4
57
58#define TMEMSIZE 256*1024
59#define TMEMSIZEREG 4
60
61#define ENABLE 0xffffffff
62#define DISABLE 0x00000000
63#define ENV_ON DCYSUSV_CHANNELENABLE_MASK
64#define ENV_OFF 0x00 /* XXX: should this be 1? */
65
66#define A_IOCFG_GPOUT_A 0x40 /* Analog Output */
67#define A_IOCFG_GPOUT_D 0x04 /* Digital Output */
68#define A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D) /* A_IOCFG_GPOUT0 */
69
70struct emu_memblk {
71 SLIST_ENTRY(emu_memblk) link;
72 void *buf;
73 bus_addr_t buf_addr;
74 u_int32_t pte_start, pte_size;
75};
76
77struct emu_mem {
78 u_int8_t bmap[EMUMAXPAGES / 8];
79 u_int32_t *ptb_pages;
80 void *silent_page;
81 bus_addr_t silent_page_addr;
82 bus_addr_t ptb_pages_addr;
83 SLIST_HEAD(, emu_memblk) blocks;
84};
85
86struct emu_voice {
87 int vnum;
88 int b16:1, stereo:1, busy:1, running:1, ismaster:1;
89 int speed;
90 int start, end, vol;
91 int fxrt1; /* FX routing */
92 int fxrt2; /* FX routing (only for audigy) */
93 u_int32_t buf;
94 struct emu_voice *slave;
95 struct pcm_channel *channel;
96};
97
98struct sc_info;
99
100/* channel registers */
101struct sc_pchinfo {
102 int spd, fmt, blksz, run;
103 struct emu_voice *master, *slave;
104 struct snd_dbuf *buffer;
105 struct pcm_channel *channel;
106 struct sc_info *parent;
107};
108
109struct sc_rchinfo {
110 int spd, fmt, run, blksz, num;
111 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask;
112 struct snd_dbuf *buffer;
113 struct pcm_channel *channel;
114 struct sc_info *parent;
115};
116
117/* device private data */
118struct sc_info {
119 device_t dev;
120 u_int32_t type, rev;
121 u_int32_t tos_link:1, APS:1, audigy:1, audigy2:1;
122 u_int32_t addrmask; /* wider if audigy */
123
124 bus_space_tag_t st;
125 bus_space_handle_t sh;
126 bus_dma_tag_t parent_dmat;
127
128 struct resource *reg, *irq;
129 void *ih;
130 struct mtx *lock;
131
132 unsigned int bufsz;
133 int timer, timerinterval;
134 int pnum, rnum;
135 int nchans;
136 struct emu_mem mem;
137 struct emu_voice voice[64];
138 struct sc_pchinfo pch[EMU_MAX_CHANS];
139 struct sc_rchinfo rch[3];
140};
141
142/* -------------------------------------------------------------------- */
143
144/*
145 * prototypes
146 */
147
148/* stuff */
149static int emu_init(struct sc_info *);
150static void emu_intr(void *);
151static void *emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr);
152static void *emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr);
153static int emu_memfree(struct sc_info *sc, void *buf);
154static int emu_memstart(struct sc_info *sc, void *buf);
155#ifdef EMUDEBUG
156static void emu_vdump(struct sc_info *sc, struct emu_voice *v);
157#endif
158
159/* talk to the card */
160static u_int32_t emu_rd(struct sc_info *, int, int);
161static void emu_wr(struct sc_info *, int, u_int32_t, int);
162
163/* -------------------------------------------------------------------- */
164
165static u_int32_t emu_rfmt_ac97[] = {
166 AFMT_S16_LE,
167 AFMT_STEREO | AFMT_S16_LE,
168 0
169};
170
171static u_int32_t emu_rfmt_mic[] = {
172 AFMT_U8,
173 0
174};
175
176static u_int32_t emu_rfmt_efx[] = {
177 AFMT_STEREO | AFMT_S16_LE,
178 0
179};
180
181static struct pcmchan_caps emu_reccaps[3] = {
182 {8000, 48000, emu_rfmt_ac97, 0},
183 {8000, 8000, emu_rfmt_mic, 0},
184 {48000, 48000, emu_rfmt_efx, 0},
185};
186
187static u_int32_t emu_pfmt[] = {
188 AFMT_U8,
189 AFMT_STEREO | AFMT_U8,
190 AFMT_S16_LE,
191 AFMT_STEREO | AFMT_S16_LE,
192 0
193};
194
195static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0};
196
197static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000};
198/* audigy supports 12kHz. */
199static int audigy_adcspeed[9] = {
200 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000
201};
202
203/* -------------------------------------------------------------------- */
204/* Hardware */
205static u_int32_t
206emu_rd(struct sc_info *sc, int regno, int size)
207{
208 switch (size) {
209 case 1:
210 return bus_space_read_1(sc->st, sc->sh, regno);
211 case 2:
212 return bus_space_read_2(sc->st, sc->sh, regno);
213 case 4:
214 return bus_space_read_4(sc->st, sc->sh, regno);
215 default:
216 return 0xffffffff;
217 }
218}
219
220static void
221emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size)
222{
223 switch (size) {
224 case 1:
225 bus_space_write_1(sc->st, sc->sh, regno, data);
226 break;
227 case 2:
228 bus_space_write_2(sc->st, sc->sh, regno, data);
229 break;
230 case 4:
231 bus_space_write_4(sc->st, sc->sh, regno, data);
232 break;
233 }
234}
235
236static u_int32_t
237emu_rdptr(struct sc_info *sc, int chn, int reg)
238{
239 u_int32_t ptr, val, mask, size, offset;
240
241 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
242 emu_wr(sc, PTR, ptr, 4);
243 val = emu_rd(sc, DATA, 4);
244 if (reg & 0xff000000) {
245 size = (reg >> 24) & 0x3f;
246 offset = (reg >> 16) & 0x1f;
247 mask = ((1 << size) - 1) << offset;
248 val &= mask;
249 val >>= offset;
250 }
251 return val;
252}
253
254static void
255emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data)
256{
257 u_int32_t ptr, mask, size, offset;
258
259 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
260 emu_wr(sc, PTR, ptr, 4);
261 if (reg & 0xff000000) {
262 size = (reg >> 24) & 0x3f;
263 offset = (reg >> 16) & 0x1f;
264 mask = ((1 << size) - 1) << offset;
265 data <<= offset;
266 data &= mask;
267 data |= emu_rd(sc, DATA, 4) & ~mask;
268 }
269 emu_wr(sc, DATA, data, 4);
270}
271
272static void
273emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data)
274{
275 pc += sc->audigy ? AUDIGY_CODEBASE : MICROCODEBASE;
276 emu_wrptr(sc, 0, pc, data);
277}
278
279/* -------------------------------------------------------------------- */
280/* ac97 codec */
281/* no locking needed */
282
283static int
284emu_rdcd(kobj_t obj, void *devinfo, int regno)
285{
286 struct sc_info *sc = (struct sc_info *)devinfo;
287
288 emu_wr(sc, AC97ADDRESS, regno, 1);
289 return emu_rd(sc, AC97DATA, 2);
290}
291
292static int
293emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data)
294{
295 struct sc_info *sc = (struct sc_info *)devinfo;
296
297 emu_wr(sc, AC97ADDRESS, regno, 1);
298 emu_wr(sc, AC97DATA, data, 2);
299 return 0;
300}
301
302static kobj_method_t emu_ac97_methods[] = {
303 KOBJMETHOD(ac97_read, emu_rdcd),
304 KOBJMETHOD(ac97_write, emu_wrcd),
305 { 0, 0 }
306};
307AC97_DECLARE(emu_ac97);
308
309/* -------------------------------------------------------------------- */
310/* stuff */
311static int
312emu_settimer(struct sc_info *sc)
313{
314 struct sc_pchinfo *pch;
315 struct sc_rchinfo *rch;
316 int i, tmp, rate;
317
318 rate = 0;
319 for (i = 0; i < sc->nchans; i++) {
320 pch = &sc->pch[i];
321 if (pch->buffer) {
322 tmp = (pch->spd * sndbuf_getbps(pch->buffer))
323 / pch->blksz;
324 if (tmp > rate)
325 rate = tmp;
326 }
327 }
328
329 for (i = 0; i < 3; i++) {
330 rch = &sc->rch[i];
331 if (rch->buffer) {
332 tmp = (rch->spd * sndbuf_getbps(rch->buffer))
333 / rch->blksz;
334 if (tmp > rate)
335 rate = tmp;
336 }
337 }
338 RANGE(rate, 48, 9600);
339 sc->timerinterval = 48000 / rate;
340 emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
341
342 return sc->timerinterval;
343}
344
345static int
346emu_enatimer(struct sc_info *sc, int go)
347{
348 u_int32_t x;
349 if (go) {
350 if (sc->timer++ == 0) {
351 x = emu_rd(sc, INTE, 4);
352 x |= INTE_INTERVALTIMERENB;
353 emu_wr(sc, INTE, x, 4);
354 }
355 } else {
356 sc->timer = 0;
357 x = emu_rd(sc, INTE, 4);
358 x &= ~INTE_INTERVALTIMERENB;
359 emu_wr(sc, INTE, x, 4);
360 }
361 return 0;
362}
363
364static void
365emu_enastop(struct sc_info *sc, char channel, int enable)
366{
367 int reg = (channel & 0x20) ? SOLEH : SOLEL;
368 channel &= 0x1f;
369 reg |= 1 << 24;
370 reg |= channel << 16;
371 emu_wrptr(sc, 0, reg, enable);
372}
373
374static int
375emu_recval(int speed) {
376 int val;
377
378 val = 0;
379 while (val < 7 && speed < adcspeed[val])
380 val++;
381 return val;
382}
383
384static int
385audigy_recval(int speed) {
386 int val;
387
388 val = 0;
389 while (val < 8 && speed < audigy_adcspeed[val])
390 val++;
391 return val;
392}
393
394static u_int32_t
395emu_rate_to_pitch(u_int32_t rate)
396{
397 static u_int32_t logMagTable[128] = {
398 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
399 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
400 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
401 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
402 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
403 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
404 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
405 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
406 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
407 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
408 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
409 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
410 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
411 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
412 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
413 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
414 };
415 static char logSlopeTable[128] = {
416 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
417 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
418 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
419 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
420 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
421 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
422 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
423 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
424 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
425 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
426 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
427 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
428 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
429 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
430 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
431 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
432 };
433 int i;
434
435 if (rate == 0)
436 return 0; /* Bail out if no leading "1" */
437 rate *= 11185; /* Scale 48000 to 0x20002380 */
438 for (i = 31; i > 0; i--) {
439 if (rate & 0x80000000) { /* Detect leading "1" */
440 return (((u_int32_t) (i - 15) << 20) +
441 logMagTable[0x7f & (rate >> 24)] +
442 (0x7f & (rate >> 17)) *
443 logSlopeTable[0x7f & (rate >> 24)]);
444 }
445 rate <<= 1;
446 }
447
448 return 0; /* Should never reach this point */
449}
450
451static u_int32_t
452emu_rate_to_linearpitch(u_int32_t rate)
453{
454 rate = (rate << 8) / 375;
455 return (rate >> 1) + (rate & 1);
456}
457
458static struct emu_voice *
459emu_valloc(struct sc_info *sc)
460{
461 struct emu_voice *v;
462 int i;
463
464 v = NULL;
465 for (i = 0; i < 64 && sc->voice[i].busy; i++);
466 if (i < 64) {
467 v = &sc->voice[i];
468 v->busy = 1;
469 }
470 return v;
471}
472
473static int
474emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s,
475 u_int32_t sz, struct snd_dbuf *b)
476{
477 void *buf;
478 bus_addr_t tmp_addr;
479
480 buf = emu_memalloc(sc, sz, &tmp_addr);
481 if (buf == NULL)
482 return -1;
483 if (b != NULL)
484 sndbuf_setup(b, buf, sz);
485 m->start = emu_memstart(sc, buf) * EMUPAGESIZE;
486 m->end = m->start + sz;
487 m->channel = NULL;
488 m->speed = 0;
489 m->b16 = 0;
490 m->stereo = 0;
491 m->running = 0;
492 m->ismaster = 1;
493 m->vol = 0xff;
494 m->buf = tmp_addr;
495 m->slave = s;
496 if (sc->audigy) {
| 39
40/* -------------------------------------------------------------------- */
41
42#define NUM_G 64 /* use all channels */
43#define WAVEOUT_MAXBUFSIZE 32768
44#define EMUPAGESIZE 4096 /* don't change */
45#define EMUMAXPAGES (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE)
46#define EMU10K1_PCI_ID 0x00021102 /* 1102 => Creative Labs Vendor ID */
47#define EMU10K2_PCI_ID 0x00041102
48#define EMU10K3_PCI_ID 0x00081102
49#define EMU_DEFAULT_BUFSZ 4096
50#define EMU_MAX_CHANS 8
51#define EMU_CHANS 4
52
53#define MAXREQVOICES 8
54#define RESERVED 0
55#define NUM_MIDI 16
56#define NUM_FXSENDS 4
57
58#define TMEMSIZE 256*1024
59#define TMEMSIZEREG 4
60
61#define ENABLE 0xffffffff
62#define DISABLE 0x00000000
63#define ENV_ON DCYSUSV_CHANNELENABLE_MASK
64#define ENV_OFF 0x00 /* XXX: should this be 1? */
65
66#define A_IOCFG_GPOUT_A 0x40 /* Analog Output */
67#define A_IOCFG_GPOUT_D 0x04 /* Digital Output */
68#define A_IOCFG_GPOUT_AD (A_IOCFG_GPOUT_A|A_IOCFG_GPOUT_D) /* A_IOCFG_GPOUT0 */
69
70struct emu_memblk {
71 SLIST_ENTRY(emu_memblk) link;
72 void *buf;
73 bus_addr_t buf_addr;
74 u_int32_t pte_start, pte_size;
75};
76
77struct emu_mem {
78 u_int8_t bmap[EMUMAXPAGES / 8];
79 u_int32_t *ptb_pages;
80 void *silent_page;
81 bus_addr_t silent_page_addr;
82 bus_addr_t ptb_pages_addr;
83 SLIST_HEAD(, emu_memblk) blocks;
84};
85
86struct emu_voice {
87 int vnum;
88 int b16:1, stereo:1, busy:1, running:1, ismaster:1;
89 int speed;
90 int start, end, vol;
91 int fxrt1; /* FX routing */
92 int fxrt2; /* FX routing (only for audigy) */
93 u_int32_t buf;
94 struct emu_voice *slave;
95 struct pcm_channel *channel;
96};
97
98struct sc_info;
99
100/* channel registers */
101struct sc_pchinfo {
102 int spd, fmt, blksz, run;
103 struct emu_voice *master, *slave;
104 struct snd_dbuf *buffer;
105 struct pcm_channel *channel;
106 struct sc_info *parent;
107};
108
109struct sc_rchinfo {
110 int spd, fmt, run, blksz, num;
111 u_int32_t idxreg, basereg, sizereg, setupreg, irqmask;
112 struct snd_dbuf *buffer;
113 struct pcm_channel *channel;
114 struct sc_info *parent;
115};
116
117/* device private data */
118struct sc_info {
119 device_t dev;
120 u_int32_t type, rev;
121 u_int32_t tos_link:1, APS:1, audigy:1, audigy2:1;
122 u_int32_t addrmask; /* wider if audigy */
123
124 bus_space_tag_t st;
125 bus_space_handle_t sh;
126 bus_dma_tag_t parent_dmat;
127
128 struct resource *reg, *irq;
129 void *ih;
130 struct mtx *lock;
131
132 unsigned int bufsz;
133 int timer, timerinterval;
134 int pnum, rnum;
135 int nchans;
136 struct emu_mem mem;
137 struct emu_voice voice[64];
138 struct sc_pchinfo pch[EMU_MAX_CHANS];
139 struct sc_rchinfo rch[3];
140};
141
142/* -------------------------------------------------------------------- */
143
144/*
145 * prototypes
146 */
147
148/* stuff */
149static int emu_init(struct sc_info *);
150static void emu_intr(void *);
151static void *emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr);
152static void *emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr);
153static int emu_memfree(struct sc_info *sc, void *buf);
154static int emu_memstart(struct sc_info *sc, void *buf);
155#ifdef EMUDEBUG
156static void emu_vdump(struct sc_info *sc, struct emu_voice *v);
157#endif
158
159/* talk to the card */
160static u_int32_t emu_rd(struct sc_info *, int, int);
161static void emu_wr(struct sc_info *, int, u_int32_t, int);
162
163/* -------------------------------------------------------------------- */
164
165static u_int32_t emu_rfmt_ac97[] = {
166 AFMT_S16_LE,
167 AFMT_STEREO | AFMT_S16_LE,
168 0
169};
170
171static u_int32_t emu_rfmt_mic[] = {
172 AFMT_U8,
173 0
174};
175
176static u_int32_t emu_rfmt_efx[] = {
177 AFMT_STEREO | AFMT_S16_LE,
178 0
179};
180
181static struct pcmchan_caps emu_reccaps[3] = {
182 {8000, 48000, emu_rfmt_ac97, 0},
183 {8000, 8000, emu_rfmt_mic, 0},
184 {48000, 48000, emu_rfmt_efx, 0},
185};
186
187static u_int32_t emu_pfmt[] = {
188 AFMT_U8,
189 AFMT_STEREO | AFMT_U8,
190 AFMT_S16_LE,
191 AFMT_STEREO | AFMT_S16_LE,
192 0
193};
194
195static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0};
196
197static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000};
198/* audigy supports 12kHz. */
199static int audigy_adcspeed[9] = {
200 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000
201};
202
203/* -------------------------------------------------------------------- */
204/* Hardware */
205static u_int32_t
206emu_rd(struct sc_info *sc, int regno, int size)
207{
208 switch (size) {
209 case 1:
210 return bus_space_read_1(sc->st, sc->sh, regno);
211 case 2:
212 return bus_space_read_2(sc->st, sc->sh, regno);
213 case 4:
214 return bus_space_read_4(sc->st, sc->sh, regno);
215 default:
216 return 0xffffffff;
217 }
218}
219
220static void
221emu_wr(struct sc_info *sc, int regno, u_int32_t data, int size)
222{
223 switch (size) {
224 case 1:
225 bus_space_write_1(sc->st, sc->sh, regno, data);
226 break;
227 case 2:
228 bus_space_write_2(sc->st, sc->sh, regno, data);
229 break;
230 case 4:
231 bus_space_write_4(sc->st, sc->sh, regno, data);
232 break;
233 }
234}
235
236static u_int32_t
237emu_rdptr(struct sc_info *sc, int chn, int reg)
238{
239 u_int32_t ptr, val, mask, size, offset;
240
241 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
242 emu_wr(sc, PTR, ptr, 4);
243 val = emu_rd(sc, DATA, 4);
244 if (reg & 0xff000000) {
245 size = (reg >> 24) & 0x3f;
246 offset = (reg >> 16) & 0x1f;
247 mask = ((1 << size) - 1) << offset;
248 val &= mask;
249 val >>= offset;
250 }
251 return val;
252}
253
254static void
255emu_wrptr(struct sc_info *sc, int chn, int reg, u_int32_t data)
256{
257 u_int32_t ptr, mask, size, offset;
258
259 ptr = ((reg << 16) & sc->addrmask) | (chn & PTR_CHANNELNUM_MASK);
260 emu_wr(sc, PTR, ptr, 4);
261 if (reg & 0xff000000) {
262 size = (reg >> 24) & 0x3f;
263 offset = (reg >> 16) & 0x1f;
264 mask = ((1 << size) - 1) << offset;
265 data <<= offset;
266 data &= mask;
267 data |= emu_rd(sc, DATA, 4) & ~mask;
268 }
269 emu_wr(sc, DATA, data, 4);
270}
271
272static void
273emu_wrefx(struct sc_info *sc, unsigned int pc, unsigned int data)
274{
275 pc += sc->audigy ? AUDIGY_CODEBASE : MICROCODEBASE;
276 emu_wrptr(sc, 0, pc, data);
277}
278
279/* -------------------------------------------------------------------- */
280/* ac97 codec */
281/* no locking needed */
282
283static int
284emu_rdcd(kobj_t obj, void *devinfo, int regno)
285{
286 struct sc_info *sc = (struct sc_info *)devinfo;
287
288 emu_wr(sc, AC97ADDRESS, regno, 1);
289 return emu_rd(sc, AC97DATA, 2);
290}
291
292static int
293emu_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data)
294{
295 struct sc_info *sc = (struct sc_info *)devinfo;
296
297 emu_wr(sc, AC97ADDRESS, regno, 1);
298 emu_wr(sc, AC97DATA, data, 2);
299 return 0;
300}
301
302static kobj_method_t emu_ac97_methods[] = {
303 KOBJMETHOD(ac97_read, emu_rdcd),
304 KOBJMETHOD(ac97_write, emu_wrcd),
305 { 0, 0 }
306};
307AC97_DECLARE(emu_ac97);
308
309/* -------------------------------------------------------------------- */
310/* stuff */
311static int
312emu_settimer(struct sc_info *sc)
313{
314 struct sc_pchinfo *pch;
315 struct sc_rchinfo *rch;
316 int i, tmp, rate;
317
318 rate = 0;
319 for (i = 0; i < sc->nchans; i++) {
320 pch = &sc->pch[i];
321 if (pch->buffer) {
322 tmp = (pch->spd * sndbuf_getbps(pch->buffer))
323 / pch->blksz;
324 if (tmp > rate)
325 rate = tmp;
326 }
327 }
328
329 for (i = 0; i < 3; i++) {
330 rch = &sc->rch[i];
331 if (rch->buffer) {
332 tmp = (rch->spd * sndbuf_getbps(rch->buffer))
333 / rch->blksz;
334 if (tmp > rate)
335 rate = tmp;
336 }
337 }
338 RANGE(rate, 48, 9600);
339 sc->timerinterval = 48000 / rate;
340 emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
341
342 return sc->timerinterval;
343}
344
345static int
346emu_enatimer(struct sc_info *sc, int go)
347{
348 u_int32_t x;
349 if (go) {
350 if (sc->timer++ == 0) {
351 x = emu_rd(sc, INTE, 4);
352 x |= INTE_INTERVALTIMERENB;
353 emu_wr(sc, INTE, x, 4);
354 }
355 } else {
356 sc->timer = 0;
357 x = emu_rd(sc, INTE, 4);
358 x &= ~INTE_INTERVALTIMERENB;
359 emu_wr(sc, INTE, x, 4);
360 }
361 return 0;
362}
363
364static void
365emu_enastop(struct sc_info *sc, char channel, int enable)
366{
367 int reg = (channel & 0x20) ? SOLEH : SOLEL;
368 channel &= 0x1f;
369 reg |= 1 << 24;
370 reg |= channel << 16;
371 emu_wrptr(sc, 0, reg, enable);
372}
373
374static int
375emu_recval(int speed) {
376 int val;
377
378 val = 0;
379 while (val < 7 && speed < adcspeed[val])
380 val++;
381 return val;
382}
383
384static int
385audigy_recval(int speed) {
386 int val;
387
388 val = 0;
389 while (val < 8 && speed < audigy_adcspeed[val])
390 val++;
391 return val;
392}
393
394static u_int32_t
395emu_rate_to_pitch(u_int32_t rate)
396{
397 static u_int32_t logMagTable[128] = {
398 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
399 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
400 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
401 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
402 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
403 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
404 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
405 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
406 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
407 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
408 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
409 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
410 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
411 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
412 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
413 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
414 };
415 static char logSlopeTable[128] = {
416 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
417 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
418 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
419 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
420 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
421 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
422 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
423 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
424 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
425 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
426 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
427 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
428 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
429 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
430 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
431 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
432 };
433 int i;
434
435 if (rate == 0)
436 return 0; /* Bail out if no leading "1" */
437 rate *= 11185; /* Scale 48000 to 0x20002380 */
438 for (i = 31; i > 0; i--) {
439 if (rate & 0x80000000) { /* Detect leading "1" */
440 return (((u_int32_t) (i - 15) << 20) +
441 logMagTable[0x7f & (rate >> 24)] +
442 (0x7f & (rate >> 17)) *
443 logSlopeTable[0x7f & (rate >> 24)]);
444 }
445 rate <<= 1;
446 }
447
448 return 0; /* Should never reach this point */
449}
450
451static u_int32_t
452emu_rate_to_linearpitch(u_int32_t rate)
453{
454 rate = (rate << 8) / 375;
455 return (rate >> 1) + (rate & 1);
456}
457
458static struct emu_voice *
459emu_valloc(struct sc_info *sc)
460{
461 struct emu_voice *v;
462 int i;
463
464 v = NULL;
465 for (i = 0; i < 64 && sc->voice[i].busy; i++);
466 if (i < 64) {
467 v = &sc->voice[i];
468 v->busy = 1;
469 }
470 return v;
471}
472
473static int
474emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s,
475 u_int32_t sz, struct snd_dbuf *b)
476{
477 void *buf;
478 bus_addr_t tmp_addr;
479
480 buf = emu_memalloc(sc, sz, &tmp_addr);
481 if (buf == NULL)
482 return -1;
483 if (b != NULL)
484 sndbuf_setup(b, buf, sz);
485 m->start = emu_memstart(sc, buf) * EMUPAGESIZE;
486 m->end = m->start + sz;
487 m->channel = NULL;
488 m->speed = 0;
489 m->b16 = 0;
490 m->stereo = 0;
491 m->running = 0;
492 m->ismaster = 1;
493 m->vol = 0xff;
494 m->buf = tmp_addr;
495 m->slave = s;
496 if (sc->audigy) {
|
503 m->fxrt2 = 0;
504 }
505
506 if (s != NULL) {
507 s->start = m->start;
508 s->end = m->end;
509 s->channel = NULL;
510 s->speed = 0;
511 s->b16 = 0;
512 s->stereo = 0;
513 s->running = 0;
514 s->ismaster = 0;
515 s->vol = m->vol;
516 s->buf = m->buf;
517 s->fxrt1 = m->fxrt1;
518 s->fxrt2 = m->fxrt2;
519 s->slave = NULL;
520 }
521 return 0;
522}
523
524static void
525emu_vsetup(struct sc_pchinfo *ch)
526{
527 struct emu_voice *v = ch->master;
528
529 if (ch->fmt) {
530 v->b16 = (ch->fmt & AFMT_16BIT) ? 1 : 0;
531 v->stereo = (ch->fmt & AFMT_STEREO) ? 1 : 0;
532 if (v->slave != NULL) {
533 v->slave->b16 = v->b16;
534 v->slave->stereo = v->stereo;
535 }
536 }
537 if (ch->spd) {
538 v->speed = ch->spd;
539 if (v->slave != NULL)
540 v->slave->speed = v->speed;
541 }
542}
543
544static void
545emu_vwrite(struct sc_info *sc, struct emu_voice *v)
546{
547 int s;
548 int l, r, x, y;
549 u_int32_t sa, ea, start, val, silent_page;
550
551 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0);
552
553 sa = v->start >> s;
554 ea = v->end >> s;
555
556 l = r = x = y = v->vol;
557 if (v->stereo) {
558 l = v->ismaster ? l : 0;
559 r = v->ismaster ? 0 : r;
560 }
561
562 emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0);
563 val = v->stereo ? 28 : 30;
564 val *= v->b16 ? 1 : 2;
565 start = sa + val;
566
567 if (sc->audigy) {
568 emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1);
569 emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2);
570 emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0);
571 }
572 else
573 emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16);
574
575 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r);
576 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24));
577 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24));
578 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
579
580 emu_wrptr(sc, v->vnum, Z1, 0);
581 emu_wrptr(sc, v->vnum, Z2, 0);
582
583 silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1)
584 | MAP_PTI_MASK;
585 emu_wrptr(sc, v->vnum, MAPA, silent_page);
586 emu_wrptr(sc, v->vnum, MAPB, silent_page);
587
588 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
589 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
590 emu_wrptr(sc, v->vnum, ATKHLDM, 0);
591 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
592 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
593 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
594 emu_wrptr(sc, v->vnum, FMMOD, 0);
595 emu_wrptr(sc, v->vnum, TREMFRQ, 0);
596 emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
597 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
598
599 emu_wrptr(sc, v->vnum, ATKHLDV,
600 ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
601 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
602
603 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
604 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
605
606 if (v->slave != NULL)
607 emu_vwrite(sc, v->slave);
608}
609
610static void
611emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go)
612{
613 u_int32_t pitch_target, initial_pitch;
614 u_int32_t cra, cs, ccis;
615 u_int32_t sample, i;
616
617 if (go) {
618 cra = 64;
619 cs = v->stereo ? 4 : 2;
620 ccis = v->stereo ? 28 : 30;
621 ccis *= v->b16 ? 1 : 2;
622 sample = v->b16 ? 0x00000000 : 0x80808080;
623
624 for (i = 0; i < cs; i++)
625 emu_wrptr(sc, v->vnum, CD0 + i, sample);
626 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
627 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
628 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
629
630 emu_wrptr(sc, v->vnum, IFATN, 0xff00);
631 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
632 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
633 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
634 emu_enastop(sc, v->vnum, 0);
635
636 pitch_target = emu_rate_to_linearpitch(v->speed);
637 initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
638 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
639 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
640 emu_wrptr(sc, v->vnum, IP, initial_pitch);
641 } else {
642 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
643 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
644 emu_wrptr(sc, v->vnum, IFATN, 0xffff);
645 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
646 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
647 emu_wrptr(sc, v->vnum, IP, 0);
648 emu_enastop(sc, v->vnum, 1);
649 }
650 if (v->slave != NULL)
651 emu_vtrigger(sc, v->slave, go);
652}
653
654static int
655emu_vpos(struct sc_info *sc, struct emu_voice *v)
656{
657 int s, ptr;
658
659 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
660 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
661 return ptr & ~0x0000001f;
662}
663
664#ifdef EMUDEBUG
665static void
666emu_vdump(struct sc_info *sc, struct emu_voice *v)
667{
668 char *regname[] = {
669 "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl",
670 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL,
671 "envvol", "atkhldv", "dcysusv", "lfoval1",
672 "envval", "atkhldm", "dcysusm", "lfoval2",
673 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2",
674 "tempenv"
675 };
676 char *regname2[] = {
677 "mudata1", "mustat1", "mudata2", "mustat2",
678 "fxwc1", "fxwc2", "spdrate", NULL, NULL,
679 NULL, NULL, NULL, "fxrt2", "sndamnt", "fxrt1",
680 NULL, NULL
681 };
682 int i, x;
683
684 printf("voice number %d\n", v->vnum);
685 for (i = 0, x = 0; i <= 0x1e; i++) {
686 if (regname[i] == NULL)
687 continue;
688 printf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i));
689 printf("%s", (x == 2) ? "\n" : "\t");
690 x++;
691 if (x > 2)
692 x = 0;
693 }
694
695 /* Print out audigy extra registers */
696 if (sc->audigy) {
697 for (i = 0; i <= 0xe; i++) {
698 if (regname2[i] == NULL)
699 continue;
700 printf("%s\t[%08x]", regname2[i],
701 emu_rdptr(sc, v->vnum, i + 0x70));
702 printf("%s", (x == 2)? "\n" : "\t");
703 x++;
704 if (x > 2)
705 x = 0;
706 }
707 }
708 printf("\n\n");
709}
710#endif
711
712/* channel interface */
713static void *
714emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
715 struct pcm_channel *c, int dir)
716{
717 struct sc_info *sc = devinfo;
718 struct sc_pchinfo *ch;
719 void *r;
720
721 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction"));
722 ch = &sc->pch[sc->pnum++];
723 ch->buffer = b;
724 ch->parent = sc;
725 ch->channel = c;
726 ch->blksz = sc->bufsz / 2;
727 ch->fmt = AFMT_U8;
728 ch->spd = 8000;
729 snd_mtxlock(sc->lock);
730 ch->master = emu_valloc(sc);
731 ch->slave = emu_valloc(sc);
732 snd_mtxunlock(sc->lock);
733 r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer))
734 ? NULL : ch;
735
736 return r;
737}
738
739static int
740emupchan_free(kobj_t obj, void *data)
741{
742 struct sc_pchinfo *ch = data;
743 struct sc_info *sc = ch->parent;
744 int r;
745
746 snd_mtxlock(sc->lock);
747 r = emu_memfree(sc, sndbuf_getbuf(ch->buffer));
748 snd_mtxunlock(sc->lock);
749
750 return r;
751}
752
753static int
754emupchan_setformat(kobj_t obj, void *data, u_int32_t format)
755{
756 struct sc_pchinfo *ch = data;
757
758 ch->fmt = format;
759 return 0;
760}
761
762static int
763emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
764{
765 struct sc_pchinfo *ch = data;
766
767 ch->spd = speed;
768 return ch->spd;
769}
770
771static int
772emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
773{
774 struct sc_pchinfo *ch = data;
775 struct sc_info *sc = ch->parent;
776 int irqrate, blksz;
777
778 ch->blksz = blocksize;
779 snd_mtxlock(sc->lock);
780 emu_settimer(sc);
781 irqrate = 48000 / sc->timerinterval;
782 snd_mtxunlock(sc->lock);
783 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate;
784 return blocksize;
785}
786
787static int
788emupchan_trigger(kobj_t obj, void *data, int go)
789{
790 struct sc_pchinfo *ch = data;
791 struct sc_info *sc = ch->parent;
792
793 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD)
794 return 0;
795
796 snd_mtxlock(sc->lock);
797 if (go == PCMTRIG_START) {
798 emu_vsetup(ch);
799 emu_vwrite(sc, ch->master);
800 emu_settimer(sc);
801 emu_enatimer(sc, 1);
802#ifdef EMUDEBUG
803 printf("start [%d bit, %s, %d hz]\n",
804 ch->master->b16 ? 16 : 8,
805 ch->master->stereo ? "stereo" : "mono",
806 ch->master->speed);
807 emu_vdump(sc, ch->master);
808 emu_vdump(sc, ch->slave);
809#endif
810 }
811 ch->run = (go == PCMTRIG_START) ? 1 : 0;
812 emu_vtrigger(sc, ch->master, ch->run);
813 snd_mtxunlock(sc->lock);
814 return 0;
815}
816
817static int
818emupchan_getptr(kobj_t obj, void *data)
819{
820 struct sc_pchinfo *ch = data;
821 struct sc_info *sc = ch->parent;
822 int r;
823
824 snd_mtxlock(sc->lock);
825 r = emu_vpos(sc, ch->master);
826 snd_mtxunlock(sc->lock);
827
828 return r;
829}
830
831static struct pcmchan_caps *
832emupchan_getcaps(kobj_t obj, void *data)
833{
834 return &emu_playcaps;
835}
836
837static kobj_method_t emupchan_methods[] = {
838 KOBJMETHOD(channel_init, emupchan_init),
839 KOBJMETHOD(channel_free, emupchan_free),
840 KOBJMETHOD(channel_setformat, emupchan_setformat),
841 KOBJMETHOD(channel_setspeed, emupchan_setspeed),
842 KOBJMETHOD(channel_setblocksize, emupchan_setblocksize),
843 KOBJMETHOD(channel_trigger, emupchan_trigger),
844 KOBJMETHOD(channel_getptr, emupchan_getptr),
845 KOBJMETHOD(channel_getcaps, emupchan_getcaps),
846 { 0, 0 }
847};
848CHANNEL_DECLARE(emupchan);
849
850/* channel interface */
851static void *
852emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
853 struct pcm_channel *c, int dir)
854{
855 struct sc_info *sc = devinfo;
856 struct sc_rchinfo *ch;
857
858 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction"));
859 ch = &sc->rch[sc->rnum];
860 ch->buffer = b;
861 ch->parent = sc;
862 ch->channel = c;
863 ch->blksz = sc->bufsz / 2;
864 ch->fmt = AFMT_U8;
865 ch->spd = 8000;
866 ch->num = sc->rnum;
867 switch(sc->rnum) {
868 case 0:
869 ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX;
870 ch->basereg = ADCBA;
871 ch->sizereg = ADCBS;
872 ch->setupreg = ADCCR;
873 ch->irqmask = INTE_ADCBUFENABLE;
874 break;
875
876 case 1:
877 ch->idxreg = FXIDX;
878 ch->basereg = FXBA;
879 ch->sizereg = FXBS;
880 ch->setupreg = FXWC;
881 ch->irqmask = INTE_EFXBUFENABLE;
882 break;
883
884 case 2:
885 ch->idxreg = MICIDX;
886 ch->basereg = MICBA;
887 ch->sizereg = MICBS;
888 ch->setupreg = 0;
889 ch->irqmask = INTE_MICBUFENABLE;
890 break;
891 }
892 sc->rnum++;
893 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) != 0)
894 return NULL;
895 else {
896 snd_mtxlock(sc->lock);
897 emu_wrptr(sc, 0, ch->basereg, sndbuf_getbufaddr(ch->buffer));
898 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */
899 snd_mtxunlock(sc->lock);
900 return ch;
901 }
902}
903
904static int
905emurchan_setformat(kobj_t obj, void *data, u_int32_t format)
906{
907 struct sc_rchinfo *ch = data;
908
909 ch->fmt = format;
910 return 0;
911}
912
913static int
914emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
915{
916 struct sc_rchinfo *ch = data;
917
918 if (ch->num == 0) {
919 if (ch->parent->audigy)
920 speed = audigy_adcspeed[audigy_recval(speed)];
921 else
922 speed = adcspeed[emu_recval(speed)];
923 }
924 if (ch->num == 1)
925 speed = 48000;
926 if (ch->num == 2)
927 speed = 8000;
928 ch->spd = speed;
929 return ch->spd;
930}
931
932static int
933emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
934{
935 struct sc_rchinfo *ch = data;
936 struct sc_info *sc = ch->parent;
937 int irqrate, blksz;
938
939 ch->blksz = blocksize;
940 snd_mtxlock(sc->lock);
941 emu_settimer(sc);
942 irqrate = 48000 / sc->timerinterval;
943 snd_mtxunlock(sc->lock);
944 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate;
945 return blocksize;
946}
947
948/* semantic note: must start at beginning of buffer */
949static int
950emurchan_trigger(kobj_t obj, void *data, int go)
951{
952 struct sc_rchinfo *ch = data;
953 struct sc_info *sc = ch->parent;
954 u_int32_t val, sz;
955
956 switch(sc->bufsz) {
957 case 4096:
958 sz = ADCBS_BUFSIZE_4096;
959 break;
960
961 case 8192:
962 sz = ADCBS_BUFSIZE_8192;
963 break;
964
965 case 16384:
966 sz = ADCBS_BUFSIZE_16384;
967 break;
968
969 case 32768:
970 sz = ADCBS_BUFSIZE_32768;
971 break;
972
973 case 65536:
974 sz = ADCBS_BUFSIZE_65536;
975 break;
976
977 default:
978 sz = ADCBS_BUFSIZE_4096;
979 }
980
981 snd_mtxlock(sc->lock);
982 switch(go) {
983 case PCMTRIG_START:
984 ch->run = 1;
985 emu_wrptr(sc, 0, ch->sizereg, sz);
986 if (ch->num == 0) {
987 if (sc->audigy) {
988 val = A_ADCCR_LCHANENABLE;
989 if (ch->fmt & AFMT_STEREO)
990 val |= A_ADCCR_RCHANENABLE;
991 val |= audigy_recval(ch->spd);
992 } else {
993 val = ADCCR_LCHANENABLE;
994 if (ch->fmt & AFMT_STEREO)
995 val |= ADCCR_RCHANENABLE;
996 val |= emu_recval(ch->spd);
997 }
998
999 emu_wrptr(sc, 0, ch->setupreg, 0);
1000 emu_wrptr(sc, 0, ch->setupreg, val);
1001 }
1002 val = emu_rd(sc, INTE, 4);
1003 val |= ch->irqmask;
1004 emu_wr(sc, INTE, val, 4);
1005 break;
1006
1007 case PCMTRIG_STOP:
1008 case PCMTRIG_ABORT:
1009 ch->run = 0;
1010 emu_wrptr(sc, 0, ch->sizereg, 0);
1011 if (ch->setupreg)
1012 emu_wrptr(sc, 0, ch->setupreg, 0);
1013 val = emu_rd(sc, INTE, 4);
1014 val &= ~ch->irqmask;
1015 emu_wr(sc, INTE, val, 4);
1016 break;
1017
1018 case PCMTRIG_EMLDMAWR:
1019 case PCMTRIG_EMLDMARD:
1020 default:
1021 break;
1022 }
1023 snd_mtxunlock(sc->lock);
1024
1025 return 0;
1026}
1027
1028static int
1029emurchan_getptr(kobj_t obj, void *data)
1030{
1031 struct sc_rchinfo *ch = data;
1032 struct sc_info *sc = ch->parent;
1033 int r;
1034
1035 snd_mtxlock(sc->lock);
1036 r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff;
1037 snd_mtxunlock(sc->lock);
1038
1039 return r;
1040}
1041
1042static struct pcmchan_caps *
1043emurchan_getcaps(kobj_t obj, void *data)
1044{
1045 struct sc_rchinfo *ch = data;
1046
1047 return &emu_reccaps[ch->num];
1048}
1049
1050static kobj_method_t emurchan_methods[] = {
1051 KOBJMETHOD(channel_init, emurchan_init),
1052 KOBJMETHOD(channel_setformat, emurchan_setformat),
1053 KOBJMETHOD(channel_setspeed, emurchan_setspeed),
1054 KOBJMETHOD(channel_setblocksize, emurchan_setblocksize),
1055 KOBJMETHOD(channel_trigger, emurchan_trigger),
1056 KOBJMETHOD(channel_getptr, emurchan_getptr),
1057 KOBJMETHOD(channel_getcaps, emurchan_getcaps),
1058 { 0, 0 }
1059};
1060CHANNEL_DECLARE(emurchan);
1061
1062/* -------------------------------------------------------------------- */
1063/* The interrupt handler */
1064static void
1065emu_intr(void *data)
1066{
1067 struct sc_info *sc = data;
1068 u_int32_t stat, ack, i, x;
1069
1070 snd_mtxlock(sc->lock);
1071 while (1) {
1072 stat = emu_rd(sc, IPR, 4);
1073 if (stat == 0)
1074 break;
1075 ack = 0;
1076
1077 /* process irq */
1078 if (stat & IPR_INTERVALTIMER)
1079 ack |= IPR_INTERVALTIMER;
1080
1081 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL))
1082 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
1083
1084 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL))
1085 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
1086
1087 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL))
1088 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL);
1089
1090 if (stat & IPR_PCIERROR) {
1091 ack |= IPR_PCIERROR;
1092 device_printf(sc->dev, "pci error\n");
1093 /* we still get an nmi with ecc ram even if we ack this */
1094 }
1095 if (stat & IPR_SAMPLERATETRACKER) {
1096 ack |= IPR_SAMPLERATETRACKER;
1097#ifdef EMUDEBUG
1098 device_printf(sc->dev,
1099 "sample rate tracker lock status change\n");
1100#endif
1101 }
1102
1103 if (stat & ~ack)
1104 device_printf(sc->dev, "dodgy irq: %x (harmless)\n",
1105 stat & ~ack);
1106
1107 emu_wr(sc, IPR, stat, 4);
1108
1109 if (ack) {
1110 snd_mtxunlock(sc->lock);
1111
1112 if (ack & IPR_INTERVALTIMER) {
1113 x = 0;
1114 for (i = 0; i < sc->nchans; i++) {
1115 if (sc->pch[i].run) {
1116 x = 1;
1117 chn_intr(sc->pch[i].channel);
1118 }
1119 }
1120 if (x == 0)
1121 emu_enatimer(sc, 0);
1122 }
1123
1124
1125 if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
1126 if (sc->rch[0].channel)
1127 chn_intr(sc->rch[0].channel);
1128 }
1129 if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
1130 if (sc->rch[1].channel)
1131 chn_intr(sc->rch[1].channel);
1132 }
1133 if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) {
1134 if (sc->rch[2].channel)
1135 chn_intr(sc->rch[2].channel);
1136 }
1137
1138 snd_mtxlock(sc->lock);
1139 }
1140 }
1141 snd_mtxunlock(sc->lock);
1142}
1143
1144/* -------------------------------------------------------------------- */
1145
1146static void
1147emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1148{
1149 bus_addr_t *phys = arg;
1150
1151 *phys = error ? 0 : (bus_addr_t)segs->ds_addr;
1152
1153 if (bootverbose) {
1154 printf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n",
1155 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len,
1156 nseg, error);
1157 }
1158}
1159
1160static void *
1161emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr)
1162{
1163 void *buf;
1164 bus_dmamap_t map;
1165
1166 *addr = 0;
1167 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map))
1168 return NULL;
1169 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, addr, 0)
1170 || !*addr)
1171 return NULL;
1172 return buf;
1173}
1174
1175static void
1176emu_free(struct sc_info *sc, void *buf)
1177{
1178 bus_dmamem_free(sc->parent_dmat, buf, NULL);
1179}
1180
1181static void *
1182emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr)
1183{
1184 u_int32_t blksz, start, idx, ofs, tmp, found;
1185 struct emu_mem *mem = &sc->mem;
1186 struct emu_memblk *blk;
1187 void *buf;
1188
1189 blksz = sz / EMUPAGESIZE;
1190 if (sz > (blksz * EMUPAGESIZE))
1191 blksz++;
1192 /* find a free block in the bitmap */
1193 found = 0;
1194 start = 1;
1195 while (!found && start + blksz < EMUMAXPAGES) {
1196 found = 1;
1197 for (idx = start; idx < start + blksz; idx++)
1198 if (mem->bmap[idx >> 3] & (1 << (idx & 7)))
1199 found = 0;
1200 if (!found)
1201 start++;
1202 }
1203 if (!found)
1204 return NULL;
1205 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT);
1206 if (blk == NULL)
1207 return NULL;
1208 buf = emu_malloc(sc, sz, &blk->buf_addr);
1209 *addr = blk->buf_addr;
1210 if (buf == NULL) {
1211 free(blk, M_DEVBUF);
1212 return NULL;
1213 }
1214 blk->buf = buf;
1215 blk->pte_start = start;
1216 blk->pte_size = blksz;
1217#ifdef EMUDEBUG
1218 printf("buf %p, pte_start %d, pte_size %d\n", blk->buf,
1219 blk->pte_start, blk->pte_size);
1220#endif
1221 ofs = 0;
1222 for (idx = start; idx < start + blksz; idx++) {
1223 mem->bmap[idx >> 3] |= 1 << (idx & 7);
1224 tmp = (u_int32_t)(u_long)((u_int8_t *)blk->buf_addr + ofs);
1225#ifdef EMUDEBUG
1226 printf("pte[%d] -> %x phys, %x virt\n", idx, tmp,
1227 ((u_int32_t)buf) + ofs);
1228#endif
1229 mem->ptb_pages[idx] = (tmp << 1) | idx;
1230 ofs += EMUPAGESIZE;
1231 }
1232 SLIST_INSERT_HEAD(&mem->blocks, blk, link);
1233 return buf;
1234}
1235
1236static int
1237emu_memfree(struct sc_info *sc, void *buf)
1238{
1239 u_int32_t idx, tmp;
1240 struct emu_mem *mem = &sc->mem;
1241 struct emu_memblk *blk, *i;
1242
1243 blk = NULL;
1244 SLIST_FOREACH(i, &mem->blocks, link) {
1245 if (i->buf == buf)
1246 blk = i;
1247 }
1248 if (blk == NULL)
1249 return EINVAL;
1250 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link);
1251 emu_free(sc, buf);
1252 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1;
1253 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) {
1254 mem->bmap[idx >> 3] &= ~(1 << (idx & 7));
1255 mem->ptb_pages[idx] = tmp | idx;
1256 }
1257 free(blk, M_DEVBUF);
1258 return 0;
1259}
1260
1261static int
1262emu_memstart(struct sc_info *sc, void *buf)
1263{
1264 struct emu_mem *mem = &sc->mem;
1265 struct emu_memblk *blk, *i;
1266
1267 blk = NULL;
1268 SLIST_FOREACH(i, &mem->blocks, link) {
1269 if (i->buf == buf)
1270 blk = i;
1271 }
1272 if (blk == NULL)
1273 return -EINVAL;
1274 return blk->pte_start;
1275}
1276
1277static void
1278emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y,
1279 u_int32_t *pc)
1280{
1281 emu_wrefx(sc, (*pc) * 2, (x << 10) | y);
1282 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w);
1283 (*pc)++;
1284}
1285
1286static void
1287audigy_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y,
1288 u_int32_t *pc)
1289{
1290 emu_wrefx(sc, (*pc) * 2, (x << 12) | y);
1291 emu_wrefx(sc, (*pc) * 2 + 1, (op << 24) | (z << 12) | w);
1292 (*pc)++;
1293}
1294
1295static void
1296audigy_initefx(struct sc_info *sc)
1297{
1298 int i;
1299 u_int32_t pc = 0;
1300
1301 /* skip 0, 0, -1, 0 - NOPs */
1302 for (i = 0; i < 512; i++)
1303 audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc);
1304
1305 for (i = 0; i < 512; i++)
1306 emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0);
1307
1308 pc = 16;
1309
1310 /* stop fx processor */
1311 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
1312
1313 /* Audigy 2 (EMU10K2) DSP Registers:
1314 FX Bus
1315 0x000-0x00f : 16 registers (???)
1316 Input
1317 0x040/0x041 : AC97 Codec (l/r)
1318 0x042/0x043 : ADC, S/PDIF (l/r)
1319 0x044/0x045 : Optical S/PDIF in (l/r)
1320 0x046/0x047 : ???
1321 0x048/0x049 : Line/Mic 2 (l/r)
1322 0x04a/0x04b : RCA S/PDIF (l/r)
1323 0x04c/0x04d : Aux 2 (l/r)
1324 Output
1325 0x060/0x061 : Digital Front (l/r)
1326 0x062/0x063 : Digital Center/LFE
1327 0x064/0x065 : AudigyDrive Heaphone (l/r)
1328 0x066/0x067 : Digital Rear (l/r)
1329 0x068/0x069 : Analog Front (l/r)
1330 0x06a/0x06b : Analog Center/LFE
1331 0x06c/0x06d : ???
1332 0x06e/0x06f : Analog Rear (l/r)
1333 0x070/0x071 : AC97 Output (l/r)
1334 0x072/0x073 : ???
1335 0x074/0x075 : ???
1336 0x076/0x077 : ADC Recording Buffer (l/r)
1337 Constants
1338 0x0c0 - 0x0c4 = 0 - 4
1339 0x0c5 = 0x8, 0x0c6 = 0x10, 0x0c7 = 0x20
1340 0x0c8 = 0x100, 0x0c9 = 0x10000, 0x0ca = 0x80000
1341 0x0cb = 0x10000000, 0x0cc = 0x20000000, 0x0cd = 0x40000000
1342 0x0ce = 0x80000000, 0x0cf = 0x7fffffff, 0x0d0 = 0xffffffff
1343 0x0d1 = 0xfffffffe, 0x0d2 = 0xc0000000, 0x0d3 = 0x41fbbcdc
1344 0x0d4 = 0x5a7ef9db, 0x0d5 = 0x00100000, 0x0dc = 0x00000001 (???)
1345 Temporary Values
1346 0x0d6 : Accumulator (???)
1347 0x0d7 : Condition Register
1348 0x0d8 : Noise source
1349 0x0d9 : Noise source
1350 Tank Memory Data Registers
1351 0x200 - 0x2ff
1352 Tank Memory Address Registers
1353 0x300 - 0x3ff
1354 General Purpose Registers
1355 0x400 - 0x5ff
1356 */
1357
1358 /* AC97Output[l/r] = FXBus PCM[l/r] */
1359 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_L), A_C_00000000,
1360 A_C_00000000, A_FXBUS(FXBUS_PCM_LEFT), &pc);
1361 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_R), A_C_00000000,
1362 A_C_00000000, A_FXBUS(FXBUS_PCM_RIGHT), &pc);
1363
1364 /* GPR[0/1] = RCA S/PDIF[l/r] -- Master volume */
1365 audigy_addefxop(sc, iACC3, A_GPR(0), A_C_00000000,
1366 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_L), &pc);
1367 audigy_addefxop(sc, iACC3, A_GPR(1), A_C_00000000,
1368 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_R), &pc);
1369
1370 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
1371 audigy_addefxop(sc, iINTERP, A_GPR(2), A_GPR(1),
1372 A_C_40000000, A_GPR(0), &pc);
1373
1374 /* Headphones[l/r] = GPR[0/1] */
1375 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_L),
1376 A_C_00000000, A_C_00000000, A_GPR(0), &pc);
1377 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_R),
1378 A_C_00000000, A_C_00000000, A_GPR(1), &pc);
1379
1380 /* Analog Front[l/r] = GPR[0/1] */
1381 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_L), A_C_00000000,
1382 A_C_00000000, A_GPR(0), &pc);
1383 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_R), A_C_00000000,
1384 A_C_00000000, A_GPR(1), &pc);
1385
1386 /* Digital Front[l/r] = GPR[0/1] */
1387 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L), A_C_00000000,
1388 A_C_00000000, A_GPR(0), &pc);
1389 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_R), A_C_00000000,
1390 A_C_00000000, A_GPR(1), &pc);
1391
1392 /* Center and Subwoofer configuration */
1393 /* Analog Center = GPR[0] + GPR[2] */
1394 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ACENTER), A_C_00000000,
1395 A_GPR(0), A_GPR(2), &pc);
1396 /* Analog Sub = GPR[1] + GPR[2] */
1397 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ALFE), A_C_00000000,
1398 A_GPR(1), A_GPR(2), &pc);
1399
1400 /* Digital Center = GPR[0] + GPR[2] */
1401 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_CENTER), A_C_00000000,
1402 A_GPR(0), A_GPR(2), &pc);
1403 /* Digital Sub = GPR[1] + GPR[2] */
1404 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_LFE), A_C_00000000,
1405 A_GPR(1), A_GPR(2), &pc);
1406
1407#if 0
1408 /* Analog Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
1409 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
1410 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000,
1411 A_GPR(16), A_GPR(0), &pc);
1412 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000,
1413 A_GPR(17), A_GPR(1), &pc);
1414
1415 /* Digital Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
1416 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
1417 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000,
1418 A_GPR(16), A_GPR(0), &pc);
1419 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000,
1420 A_GPR(17), A_GPR(1), &pc);
1421#else
1422 /* XXX This is just a copy to the channel, since we do not have
1423 * a patch manager, it is useful for have another output enabled.
1424 */
1425
1426 /* Analog Rear[l/r] = GPR[0/1] */
1427 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000,
1428 A_C_00000000, A_GPR(0), &pc);
1429 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000,
1430 A_C_00000000, A_GPR(1), &pc);
1431
1432 /* Digital Rear[l/r] = GPR[0/1] */
1433 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000,
1434 A_C_00000000, A_GPR(0), &pc);
1435 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000,
1436 A_C_00000000, A_GPR(1), &pc);
1437#endif
1438
1439 /* ADC Recording buffer[l/r] = AC97Input[l/r] */
1440 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_L), A_C_00000000,
1441 A_C_00000000, A_EXTIN(A_EXTIN_AC97_L), &pc);
1442 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_R), A_C_00000000,
1443 A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc);
1444
1445 /* resume normal operations */
1446 emu_wrptr(sc, 0, A_DBG, 0);
1447}
1448
1449static void
1450emu_initefx(struct sc_info *sc)
1451{
1452 int i;
1453 u_int32_t pc = 16;
1454
1455 /* acc3 0,0,0,0 - NOPs */
1456 for (i = 0; i < 512; i++) {
1457 emu_wrefx(sc, i * 2, 0x10040);
1458 emu_wrefx(sc, i * 2 + 1, 0x610040);
1459 }
1460
1461 for (i = 0; i < 256; i++)
1462 emu_wrptr(sc, 0, FXGPREGBASE + i, 0);
1463
1464 /* FX-8010 DSP Registers:
1465 FX Bus
1466 0x000-0x00f : 16 registers
1467 Input
1468 0x010/0x011 : AC97 Codec (l/r)
1469 0x012/0x013 : ADC, S/PDIF (l/r)
1470 0x014/0x015 : Mic(left), Zoom (l/r)
1471 0x016/0x017 : TOS link in (l/r)
1472 0x018/0x019 : Line/Mic 1 (l/r)
1473 0x01a/0x01b : COAX S/PDIF (l/r)
1474 0x01c/0x01d : Line/Mic 2 (l/r)
1475 Output
1476 0x020/0x021 : AC97 Output (l/r)
1477 0x022/0x023 : TOS link out (l/r)
1478 0x024/0x025 : Center/LFE
1479 0x026/0x027 : LiveDrive Headphone (l/r)
1480 0x028/0x029 : Rear Channel (l/r)
1481 0x02a/0x02b : ADC Recording Buffer (l/r)
1482 0x02c : Mic Recording Buffer
1483 0x031/0x032 : Analog Center/LFE
1484 Constants
1485 0x040 - 0x044 = 0 - 4
1486 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20
1487 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000
1488 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000
1489 0x04e = 0x80000000, 0x04f = 0x7fffffff, 0x050 = 0xffffffff
1490 0x051 = 0xfffffffe, 0x052 = 0xc0000000, 0x053 = 0x41fbbcdc
1491 0x054 = 0x5a7ef9db, 0x055 = 0x00100000
1492 Temporary Values
1493 0x056 : Accumulator
1494 0x057 : Condition Register
1495 0x058 : Noise source
1496 0x059 : Noise source
1497 0x05a : IRQ Register
1498 0x05b : TRAM Delay Base Address Count
1499 General Purpose Registers
1500 0x100 - 0x1ff
1501 Tank Memory Data Registers
1502 0x200 - 0x2ff
1503 Tank Memory Address Registers
1504 0x300 - 0x3ff
1505 */
1506
1507 /* Routing - this will be configurable in later version */
1508
1509 /* GPR[0/1] = FX * 4 + SPDIF-in */
1510 emu_addefxop(sc, iMACINT0, GPR(0), EXTIN(EXTIN_SPDIF_CD_L),
1511 FXBUS(FXBUS_PCM_LEFT), C_00000004, &pc);
1512 emu_addefxop(sc, iMACINT0, GPR(1), EXTIN(EXTIN_SPDIF_CD_R),
1513 FXBUS(FXBUS_PCM_RIGHT), C_00000004, &pc);
1514
1515 /* GPR[0/1] += APS-input */
1516 emu_addefxop(sc, iACC3, GPR(0), GPR(0), C_00000000,
1517 sc->APS ? EXTIN(EXTIN_TOSLINK_L) : C_00000000, &pc);
1518 emu_addefxop(sc, iACC3, GPR(1), GPR(1), C_00000000,
1519 sc->APS ? EXTIN(EXTIN_TOSLINK_R) : C_00000000, &pc);
1520
1521 /* FrontOut (AC97) = GPR[0/1] */
1522 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_L), C_00000000,
1523 C_00000000, GPR(0), &pc);
1524 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_R), C_00000000,
1525 C_00000001, GPR(1), &pc);
1526
1527 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
1528 emu_addefxop(sc, iINTERP, GPR(2), GPR(1), C_40000000, GPR(0), &pc);
1529
1530#if 0
1531 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */
1532 /* RearVolume = GPR[0x10/0x11] */
1533 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_L), C_00000000,
1534 GPR(16), GPR(0), &pc);
1535 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_R), C_00000000,
1536 GPR(17), GPR(1), &pc);
1537#else
1538 /* XXX This is just a copy to the channel, since we do not have
1539 * a patch manager, it is useful for have another output enabled.
1540 */
1541
1542 /* Rear[l/r] = GPR[0/1] */
1543 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_L), C_00000000,
1544 C_00000000, GPR(0), &pc);
1545 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_R), C_00000000,
1546 C_00000000, GPR(1), &pc);
1547#endif
1548
1549 /* TOS out[l/r] = GPR[0/1] */
1550 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_L), C_00000000,
1551 C_00000000, GPR(0), &pc);
1552 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_R), C_00000000,
1553 C_00000000, GPR(1), &pc);
1554
1555 /* Center and Subwoofer configuration */
1556 /* Analog Center = GPR[0] + GPR[2] */
1557 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ACENTER), C_00000000,
1558 GPR(0), GPR(2), &pc);
1559 /* Analog Sub = GPR[1] + GPR[2] */
1560 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ALFE), C_00000000,
1561 GPR(1), GPR(2), &pc);
1562 /* Digital Center = GPR[0] + GPR[2] */
1563 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_CENTER), C_00000000,
1564 GPR(0), GPR(2), &pc);
1565 /* Digital Sub = GPR[1] + GPR[2] */
1566 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_LFE), C_00000000,
1567 GPR(1), GPR(2), &pc);
1568
1569 /* Headphones[l/r] = GPR[0/1] */
1570 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_L), C_00000000,
1571 C_00000000, GPR(0), &pc);
1572 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_R), C_00000000,
1573 C_00000000, GPR(1), &pc);
1574
1575 /* ADC Recording buffer[l/r] = AC97Input[l/r] */
1576 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_L), C_00000000,
1577 C_00000000, EXTIN(EXTIN_AC97_L), &pc);
1578 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_R), C_00000000,
1579 C_00000000, EXTIN(EXTIN_AC97_R), &pc);
1580
1581 /* resume normal operations */
1582 emu_wrptr(sc, 0, DBG, 0);
1583}
1584
1585/* Probe and attach the card */
1586static int
1587emu_init(struct sc_info *sc)
1588{
1589 u_int32_t spcs, ch, tmp, i;
1590
1591 if (sc->audigy) {
1592 /* enable additional AC97 slots */
1593 emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE);
1594 }
1595
1596 /* disable audio and lock cache */
1597 emu_wr(sc, HCFG,
1598 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
1599 4);
1600
1601 /* reset recording buffers */
1602 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
1603 emu_wrptr(sc, 0, MICBA, 0);
1604 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
1605 emu_wrptr(sc, 0, FXBA, 0);
1606 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
1607 emu_wrptr(sc, 0, ADCBA, 0);
1608
1609 /* disable channel interrupt */
1610 emu_wr(sc, INTE,
1611 INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE,
1612 4);
1613 emu_wrptr(sc, 0, CLIEL, 0);
1614 emu_wrptr(sc, 0, CLIEH, 0);
1615 emu_wrptr(sc, 0, SOLEL, 0);
1616 emu_wrptr(sc, 0, SOLEH, 0);
1617
1618 /* wonder what these do... */
1619 if (sc->audigy) {
1620 emu_wrptr(sc, 0, SPBYPASS, 0xf00);
1621 emu_wrptr(sc, 0, AC97SLOT, 0x3);
1622 }
1623
1624 /* init envelope engine */
1625 for (ch = 0; ch < NUM_G; ch++) {
1626 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
1627 emu_wrptr(sc, ch, IP, 0);
1628 emu_wrptr(sc, ch, VTFT, 0xffff);
1629 emu_wrptr(sc, ch, CVCF, 0xffff);
1630 emu_wrptr(sc, ch, PTRX, 0);
1631 emu_wrptr(sc, ch, CPF, 0);
1632 emu_wrptr(sc, ch, CCR, 0);
1633
1634 emu_wrptr(sc, ch, PSST, 0);
1635 emu_wrptr(sc, ch, DSL, 0x10);
1636 emu_wrptr(sc, ch, CCCA, 0);
1637 emu_wrptr(sc, ch, Z1, 0);
1638 emu_wrptr(sc, ch, Z2, 0);
1639 emu_wrptr(sc, ch, FXRT, 0xd01c0000);
1640
1641 emu_wrptr(sc, ch, ATKHLDM, 0);
1642 emu_wrptr(sc, ch, DCYSUSM, 0);
1643 emu_wrptr(sc, ch, IFATN, 0xffff);
1644 emu_wrptr(sc, ch, PEFE, 0);
1645 emu_wrptr(sc, ch, FMMOD, 0);
1646 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */
1647 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */
1648 emu_wrptr(sc, ch, TEMPENV, 0);
1649
1650 /*** these are last so OFF prevents writing ***/
1651 emu_wrptr(sc, ch, LFOVAL2, 0);
1652 emu_wrptr(sc, ch, LFOVAL1, 0);
1653 emu_wrptr(sc, ch, ATKHLDV, 0);
1654 emu_wrptr(sc, ch, ENVVOL, 0);
1655 emu_wrptr(sc, ch, ENVVAL, 0);
1656
1657 if (sc->audigy) {
1658 /* audigy cards need this to initialize correctly */
1659 emu_wrptr(sc, ch, 0x4c, 0);
1660 emu_wrptr(sc, ch, 0x4d, 0);
1661 emu_wrptr(sc, ch, 0x4e, 0);
1662 emu_wrptr(sc, ch, 0x4f, 0);
1663 /* set default routing */
1664 emu_wrptr(sc, ch, A_FXRT1, 0x03020100);
1665 emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
1666 emu_wrptr(sc, ch, A_SENDAMOUNTS, 0);
1667 }
1668
1669 sc->voice[ch].vnum = ch;
1670 sc->voice[ch].slave = NULL;
1671 sc->voice[ch].busy = 0;
1672 sc->voice[ch].ismaster = 0;
1673 sc->voice[ch].running = 0;
1674 sc->voice[ch].b16 = 0;
1675 sc->voice[ch].stereo = 0;
1676 sc->voice[ch].speed = 0;
1677 sc->voice[ch].start = 0;
1678 sc->voice[ch].end = 0;
1679 sc->voice[ch].channel = NULL;
1680 }
1681 sc->pnum = sc->rnum = 0;
1682
1683 /*
1684 * Init to 0x02109204 :
1685 * Clock accuracy = 0 (1000ppm)
1686 * Sample Rate = 2 (48kHz)
1687 * Audio Channel = 1 (Left of 2)
1688 * Source Number = 0 (Unspecified)
1689 * Generation Status = 1 (Original for Cat Code 12)
1690 * Cat Code = 12 (Digital Signal Mixer)
1691 * Mode = 0 (Mode 0)
1692 * Emphasis = 0 (None)
1693 * CP = 1 (Copyright unasserted)
1694 * AN = 0 (Audio data)
1695 * P = 0 (Consumer)
1696 */
1697 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1698 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1699 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
1700 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1701 emu_wrptr(sc, 0, SPCS0, spcs);
1702 emu_wrptr(sc, 0, SPCS1, spcs);
1703 emu_wrptr(sc, 0, SPCS2, spcs);
1704
1705 if (!sc->audigy)
1706 emu_initefx(sc);
1707 else if (sc->audigy2) { /* Audigy 2 */
1708 /* from ALSA initialization code: */
1709
1710 /* Hack for Alice3 to work independent of haP16V driver */
1711 u_int32_t tmp;
1712
1713 /* Setup SRCMulti_I2S SamplingRate */
1714 tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff;
1715 emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400);
1716
1717 /* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */
1718 emu_wr(sc, 0x20, 0x00600000, 4);
1719 emu_wr(sc, 0x24, 0x00000014, 4);
1720
1721 /* Setup SRCMulti Input Audio Enable */
1722 emu_wr(sc, 0x20, 0x006e0000, 4);
1723 emu_wr(sc, 0x24, 0xff00ff00, 4);
1724 }
1725
1726 SLIST_INIT(&sc->mem.blocks);
1727 sc->mem.ptb_pages = emu_malloc(sc, EMUMAXPAGES * sizeof(u_int32_t),
1728 &sc->mem.ptb_pages_addr);
1729 if (sc->mem.ptb_pages == NULL)
1730 return -1;
1731
1732 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE,
1733 &sc->mem.silent_page_addr);
1734 if (sc->mem.silent_page == NULL) {
1735 emu_free(sc, sc->mem.ptb_pages);
1736 return -1;
1737 }
1738 /* Clear page with silence & setup all pointers to this page */
1739 bzero(sc->mem.silent_page, EMUPAGESIZE);
1740 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1;
1741 for (i = 0; i < EMUMAXPAGES; i++)
1742 sc->mem.ptb_pages[i] = tmp | i;
1743
1744 emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
1745 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */
1746 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */
1747
1748 for (ch = 0; ch < NUM_G; ch++) {
1749 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
1750 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
1751 }
1752
1753 /* emu_memalloc(sc, EMUPAGESIZE); */
1754 /*
1755 * Hokay, now enable the AUD bit
1756 *
1757 * Audigy
1758 * Enable Audio = 0 (enabled after fx processor initialization)
1759 * Mute Disable Audio = 0
1760 * Joystick = 1
1761 *
1762 * Audigy 2
1763 * Enable Audio = 1
1764 * Mute Disable Audio = 0
1765 * Joystick = 1
1766 * GP S/PDIF AC3 Enable = 1
1767 * CD S/PDIF AC3 Enable = 1
1768 *
1769 * EMU10K1
1770 * Enable Audio = 1
1771 * Mute Disable Audio = 0
1772 * Lock Tank Memory = 1
1773 * Lock Sound Memory = 0
1774 * Auto Mute = 1
1775 */
1776
1777 if (sc->audigy) {
1778 tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE;
1779 if (sc->audigy2) /* Audigy 2 */
1780 tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF |
1781 HCFG_AC3ENABLE_GPSPDIF;
1782 emu_wr(sc, HCFG, tmp, 4);
1783
1784 audigy_initefx(sc);
1785
1786 /* from ALSA initialization code: */
1787
1788 /* enable audio and disable both audio/digital outputs */
1789 emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4);
1790 emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD,
1791 4);
1792 if (sc->audigy2) { /* Audigy 2 */
1793 /* Unmute Analog.
1794 * Set GPO6 to 1 for Apollo. This has to be done after
1795 * init Alice3 I2SOut beyond 48kHz.
1796 * So, sequence is important.
1797 */
1798 emu_wr(sc, A_IOCFG,
1799 emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4);
1800 }
1801 } else {
1802 /* EMU10K1 initialization code */
1803 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK
1804 | HCFG_AUTOMUTE;
1805 if (sc->rev >= 6)
1806 tmp |= HCFG_JOYENABLE;
1807
1808 emu_wr(sc, HCFG, tmp, 4);
1809
1810 /* TOSLink detection */
1811 sc->tos_link = 0;
1812 tmp = emu_rd(sc, HCFG, 4);
1813 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
1814 emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4);
1815 DELAY(50);
1816 if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) {
1817 sc->tos_link = 1;
1818 emu_wr(sc, HCFG, tmp, 4);
1819 }
1820 }
1821 }
1822
1823 return 0;
1824}
1825
1826static int
1827emu_uninit(struct sc_info *sc)
1828{
1829 u_int32_t ch;
1830
1831 emu_wr(sc, INTE, 0, 4);
1832 for (ch = 0; ch < NUM_G; ch++)
1833 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
1834 for (ch = 0; ch < NUM_G; ch++) {
1835 emu_wrptr(sc, ch, VTFT, 0);
1836 emu_wrptr(sc, ch, CVCF, 0);
1837 emu_wrptr(sc, ch, PTRX, 0);
1838 emu_wrptr(sc, ch, CPF, 0);
1839 }
1840
1841 if (sc->audigy) { /* stop fx processor */
1842 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
1843 }
1844
1845 /* disable audio and lock cache */
1846 emu_wr(sc, HCFG,
1847 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
1848 4);
1849
1850 emu_wrptr(sc, 0, PTB, 0);
1851 /* reset recording buffers */
1852 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
1853 emu_wrptr(sc, 0, MICBA, 0);
1854 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
1855 emu_wrptr(sc, 0, FXBA, 0);
1856 emu_wrptr(sc, 0, FXWC, 0);
1857 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
1858 emu_wrptr(sc, 0, ADCBA, 0);
1859 emu_wrptr(sc, 0, TCB, 0);
1860 emu_wrptr(sc, 0, TCBS, 0);
1861
1862 /* disable channel interrupt */
1863 emu_wrptr(sc, 0, CLIEL, 0);
1864 emu_wrptr(sc, 0, CLIEH, 0);
1865 emu_wrptr(sc, 0, SOLEL, 0);
1866 emu_wrptr(sc, 0, SOLEH, 0);
1867
1868 /* init envelope engine */
1869 if (!SLIST_EMPTY(&sc->mem.blocks))
1870 device_printf(sc->dev, "warning: memblock list not empty\n");
1871 emu_free(sc, sc->mem.ptb_pages);
1872 emu_free(sc, sc->mem.silent_page);
1873
1874 return 0;
1875}
1876
1877static int
1878emu_pci_probe(device_t dev)
1879{
1880 char *s = NULL;
1881
1882 switch (pci_get_devid(dev)) {
1883 case EMU10K1_PCI_ID:
1884 s = "Creative EMU10K1";
1885 break;
1886
1887 case EMU10K2_PCI_ID:
1888 if (pci_get_revid(dev) == 0x04)
1889 s = "Creative Audigy 2 (EMU10K2)";
1890 else
1891 s = "Creative Audigy (EMU10K2)";
1892 break;
1893
1894 case EMU10K3_PCI_ID:
1895 s = "Creative Audigy 2 (EMU10K3)";
1896 break;
1897
1898 default:
1899 return ENXIO;
1900 }
1901
1902 device_set_desc(dev, s);
1903 return BUS_PROBE_DEFAULT;
1904}
1905
1906static int
1907emu_pci_attach(device_t dev)
1908{
1909 struct ac97_info *codec = NULL;
1910 struct sc_info *sc;
1911 u_int32_t data;
1912 int i, gotmic;
1913 char status[SND_STATUSLEN];
1914
1915 if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO)) == NULL) {
1916 device_printf(dev, "cannot allocate softc\n");
1917 return ENXIO;
1918 }
1919
1920 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc");
1921 sc->dev = dev;
1922 sc->type = pci_get_devid(dev);
1923 sc->rev = pci_get_revid(dev);
1924 sc->audigy = sc->type == EMU10K2_PCI_ID || sc->type == EMU10K3_PCI_ID;
1925 sc->audigy2 = (sc->audigy && sc->rev == 0x04);
1926 sc->nchans = sc->audigy ? 8 : 4;
1927 sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
1928
1929 data = pci_read_config(dev, PCIR_COMMAND, 2);
1930 data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN);
1931 pci_write_config(dev, PCIR_COMMAND, data, 2);
1932 data = pci_read_config(dev, PCIR_COMMAND, 2);
1933
1934 i = PCIR_BAR(0);
1935 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
1936 if (sc->reg == NULL) {
1937 device_printf(dev, "unable to map register space\n");
1938 goto bad;
1939 }
1940 sc->st = rman_get_bustag(sc->reg);
1941 sc->sh = rman_get_bushandle(sc->reg);
1942
1943 sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536);
1944
1945 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
1946 /*lowaddr*/1 << 31, /* can only access 0-2gb */
1947 /*highaddr*/BUS_SPACE_MAXADDR,
1948 /*filter*/NULL, /*filterarg*/NULL,
1949 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
1950 /*flags*/0, /*lockfunc*/busdma_lock_mutex,
1951 /*lockarg*/&Giant, &sc->parent_dmat) != 0) {
1952 device_printf(dev, "unable to create dma tag\n");
1953 goto bad;
1954 }
1955
1956 if (emu_init(sc) == -1) {
1957 device_printf(dev, "unable to initialize the card\n");
1958 goto bad;
1959 }
1960
1961 codec = AC97_CREATE(dev, sc, emu_ac97);
1962 if (codec == NULL) goto bad;
1963 gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL) ? 1 : 0;
1964 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad;
1965
1966 i = 0;
1967 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
1968 RF_ACTIVE | RF_SHAREABLE);
1969 if (!sc->irq ||
1970 snd_setup_intr(dev, sc->irq, INTR_MPSAFE, emu_intr, sc, &sc->ih)) {
1971 device_printf(dev, "unable to map interrupt\n");
1972 goto bad;
1973 }
1974
1975 snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s",
1976 rman_get_start(sc->reg), rman_get_start(sc->irq),
1977 PCM_KLDSTRING(snd_emu10k1));
1978
1979 if (pcm_register(dev, sc, sc->nchans, gotmic ? 3 : 2)) goto bad;
1980 for (i = 0; i < sc->nchans; i++)
1981 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc);
1982 for (i = 0; i < (gotmic ? 3 : 2); i++)
1983 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc);
1984
1985 pcm_setstatus(dev, status);
1986
1987 return 0;
1988
1989bad:
1990 if (codec) ac97_destroy(codec);
1991 if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
1992 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih);
1993 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
1994 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat);
1995 if (sc->lock) snd_mtxfree(sc->lock);
1996 free(sc, M_DEVBUF);
1997 return ENXIO;
1998}
1999
2000static int
2001emu_pci_detach(device_t dev)
2002{
2003 int r;
2004 struct sc_info *sc;
2005
2006 r = pcm_unregister(dev);
2007 if (r)
2008 return r;
2009
2010 sc = pcm_getdevinfo(dev);
2011 /* shutdown chip */
2012 emu_uninit(sc);
2013
2014 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
2015 bus_teardown_intr(dev, sc->irq, sc->ih);
2016 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
2017 bus_dma_tag_destroy(sc->parent_dmat);
2018 snd_mtxfree(sc->lock);
2019 free(sc, M_DEVBUF);
2020
2021 return 0;
2022}
2023
2024/* add suspend, resume */
2025static device_method_t emu_methods[] = {
2026 /* Device interface */
2027 DEVMETHOD(device_probe, emu_pci_probe),
2028 DEVMETHOD(device_attach, emu_pci_attach),
2029 DEVMETHOD(device_detach, emu_pci_detach),
2030
2031 { 0, 0 }
2032};
2033
2034static driver_t emu_driver = {
2035 "pcm",
2036 emu_methods,
2037 PCM_SOFTC_SIZE,
2038};
2039
2040DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, 0, 0);
2041DRIVER_MODULE(snd_emu10k1, cardbus, emu_driver, pcm_devclass, 0, 0);
2042MODULE_DEPEND(snd_emu10k1, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
2043MODULE_VERSION(snd_emu10k1, 1);
2044
2045/* dummy driver to silence the joystick device */
2046static int
2047emujoy_pci_probe(device_t dev)
2048{
2049 char *s = NULL;
2050
2051 switch (pci_get_devid(dev)) {
2052 case 0x70021102:
2053 s = "Creative EMU10K1 Joystick";
2054 device_quiet(dev);
2055 break;
2056 case 0x70031102:
2057 s = "Creative EMU10K2 Joystick";
2058 device_quiet(dev);
2059 break;
2060 }
2061
2062 if (s) device_set_desc(dev, s);
2063 return s ? -1000 : ENXIO;
2064}
2065
2066static int
2067emujoy_pci_attach(device_t dev)
2068{
2069 return 0;
2070}
2071
2072static int
2073emujoy_pci_detach(device_t dev)
2074{
2075 return 0;
2076}
2077
2078static device_method_t emujoy_methods[] = {
2079 DEVMETHOD(device_probe, emujoy_pci_probe),
2080 DEVMETHOD(device_attach, emujoy_pci_attach),
2081 DEVMETHOD(device_detach, emujoy_pci_detach),
2082
2083 { 0, 0 }
2084};
2085
2086static driver_t emujoy_driver = {
2087 "emujoy",
2088 emujoy_methods,
2089 8,
2090};
2091
2092static devclass_t emujoy_devclass;
2093
2094DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, 0, 0);
2095
| 503 m->fxrt2 = 0;
504 }
505
506 if (s != NULL) {
507 s->start = m->start;
508 s->end = m->end;
509 s->channel = NULL;
510 s->speed = 0;
511 s->b16 = 0;
512 s->stereo = 0;
513 s->running = 0;
514 s->ismaster = 0;
515 s->vol = m->vol;
516 s->buf = m->buf;
517 s->fxrt1 = m->fxrt1;
518 s->fxrt2 = m->fxrt2;
519 s->slave = NULL;
520 }
521 return 0;
522}
523
524static void
525emu_vsetup(struct sc_pchinfo *ch)
526{
527 struct emu_voice *v = ch->master;
528
529 if (ch->fmt) {
530 v->b16 = (ch->fmt & AFMT_16BIT) ? 1 : 0;
531 v->stereo = (ch->fmt & AFMT_STEREO) ? 1 : 0;
532 if (v->slave != NULL) {
533 v->slave->b16 = v->b16;
534 v->slave->stereo = v->stereo;
535 }
536 }
537 if (ch->spd) {
538 v->speed = ch->spd;
539 if (v->slave != NULL)
540 v->slave->speed = v->speed;
541 }
542}
543
544static void
545emu_vwrite(struct sc_info *sc, struct emu_voice *v)
546{
547 int s;
548 int l, r, x, y;
549 u_int32_t sa, ea, start, val, silent_page;
550
551 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0);
552
553 sa = v->start >> s;
554 ea = v->end >> s;
555
556 l = r = x = y = v->vol;
557 if (v->stereo) {
558 l = v->ismaster ? l : 0;
559 r = v->ismaster ? 0 : r;
560 }
561
562 emu_wrptr(sc, v->vnum, CPF, v->stereo ? CPF_STEREO_MASK : 0);
563 val = v->stereo ? 28 : 30;
564 val *= v->b16 ? 1 : 2;
565 start = sa + val;
566
567 if (sc->audigy) {
568 emu_wrptr(sc, v->vnum, A_FXRT1, v->fxrt1);
569 emu_wrptr(sc, v->vnum, A_FXRT2, v->fxrt2);
570 emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, 0);
571 }
572 else
573 emu_wrptr(sc, v->vnum, FXRT, v->fxrt1 << 16);
574
575 emu_wrptr(sc, v->vnum, PTRX, (x << 8) | r);
576 emu_wrptr(sc, v->vnum, DSL, ea | (y << 24));
577 emu_wrptr(sc, v->vnum, PSST, sa | (l << 24));
578 emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
579
580 emu_wrptr(sc, v->vnum, Z1, 0);
581 emu_wrptr(sc, v->vnum, Z2, 0);
582
583 silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1)
584 | MAP_PTI_MASK;
585 emu_wrptr(sc, v->vnum, MAPA, silent_page);
586 emu_wrptr(sc, v->vnum, MAPB, silent_page);
587
588 emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
589 emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
590 emu_wrptr(sc, v->vnum, ATKHLDM, 0);
591 emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
592 emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
593 emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
594 emu_wrptr(sc, v->vnum, FMMOD, 0);
595 emu_wrptr(sc, v->vnum, TREMFRQ, 0);
596 emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
597 emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
598
599 emu_wrptr(sc, v->vnum, ATKHLDV,
600 ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
601 emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
602
603 emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
604 emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
605
606 if (v->slave != NULL)
607 emu_vwrite(sc, v->slave);
608}
609
610static void
611emu_vtrigger(struct sc_info *sc, struct emu_voice *v, int go)
612{
613 u_int32_t pitch_target, initial_pitch;
614 u_int32_t cra, cs, ccis;
615 u_int32_t sample, i;
616
617 if (go) {
618 cra = 64;
619 cs = v->stereo ? 4 : 2;
620 ccis = v->stereo ? 28 : 30;
621 ccis *= v->b16 ? 1 : 2;
622 sample = v->b16 ? 0x00000000 : 0x80808080;
623
624 for (i = 0; i < cs; i++)
625 emu_wrptr(sc, v->vnum, CD0 + i, sample);
626 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
627 emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
628 emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
629
630 emu_wrptr(sc, v->vnum, IFATN, 0xff00);
631 emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
632 emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
633 emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
634 emu_enastop(sc, v->vnum, 0);
635
636 pitch_target = emu_rate_to_linearpitch(v->speed);
637 initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
638 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
639 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
640 emu_wrptr(sc, v->vnum, IP, initial_pitch);
641 } else {
642 emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
643 emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
644 emu_wrptr(sc, v->vnum, IFATN, 0xffff);
645 emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
646 emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
647 emu_wrptr(sc, v->vnum, IP, 0);
648 emu_enastop(sc, v->vnum, 1);
649 }
650 if (v->slave != NULL)
651 emu_vtrigger(sc, v->slave, go);
652}
653
654static int
655emu_vpos(struct sc_info *sc, struct emu_voice *v)
656{
657 int s, ptr;
658
659 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
660 ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
661 return ptr & ~0x0000001f;
662}
663
664#ifdef EMUDEBUG
665static void
666emu_vdump(struct sc_info *sc, struct emu_voice *v)
667{
668 char *regname[] = {
669 "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl",
670 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL,
671 "envvol", "atkhldv", "dcysusv", "lfoval1",
672 "envval", "atkhldm", "dcysusm", "lfoval2",
673 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2",
674 "tempenv"
675 };
676 char *regname2[] = {
677 "mudata1", "mustat1", "mudata2", "mustat2",
678 "fxwc1", "fxwc2", "spdrate", NULL, NULL,
679 NULL, NULL, NULL, "fxrt2", "sndamnt", "fxrt1",
680 NULL, NULL
681 };
682 int i, x;
683
684 printf("voice number %d\n", v->vnum);
685 for (i = 0, x = 0; i <= 0x1e; i++) {
686 if (regname[i] == NULL)
687 continue;
688 printf("%s\t[%08x]", regname[i], emu_rdptr(sc, v->vnum, i));
689 printf("%s", (x == 2) ? "\n" : "\t");
690 x++;
691 if (x > 2)
692 x = 0;
693 }
694
695 /* Print out audigy extra registers */
696 if (sc->audigy) {
697 for (i = 0; i <= 0xe; i++) {
698 if (regname2[i] == NULL)
699 continue;
700 printf("%s\t[%08x]", regname2[i],
701 emu_rdptr(sc, v->vnum, i + 0x70));
702 printf("%s", (x == 2)? "\n" : "\t");
703 x++;
704 if (x > 2)
705 x = 0;
706 }
707 }
708 printf("\n\n");
709}
710#endif
711
712/* channel interface */
713static void *
714emupchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
715 struct pcm_channel *c, int dir)
716{
717 struct sc_info *sc = devinfo;
718 struct sc_pchinfo *ch;
719 void *r;
720
721 KASSERT(dir == PCMDIR_PLAY, ("emupchan_init: bad direction"));
722 ch = &sc->pch[sc->pnum++];
723 ch->buffer = b;
724 ch->parent = sc;
725 ch->channel = c;
726 ch->blksz = sc->bufsz / 2;
727 ch->fmt = AFMT_U8;
728 ch->spd = 8000;
729 snd_mtxlock(sc->lock);
730 ch->master = emu_valloc(sc);
731 ch->slave = emu_valloc(sc);
732 snd_mtxunlock(sc->lock);
733 r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer))
734 ? NULL : ch;
735
736 return r;
737}
738
739static int
740emupchan_free(kobj_t obj, void *data)
741{
742 struct sc_pchinfo *ch = data;
743 struct sc_info *sc = ch->parent;
744 int r;
745
746 snd_mtxlock(sc->lock);
747 r = emu_memfree(sc, sndbuf_getbuf(ch->buffer));
748 snd_mtxunlock(sc->lock);
749
750 return r;
751}
752
753static int
754emupchan_setformat(kobj_t obj, void *data, u_int32_t format)
755{
756 struct sc_pchinfo *ch = data;
757
758 ch->fmt = format;
759 return 0;
760}
761
762static int
763emupchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
764{
765 struct sc_pchinfo *ch = data;
766
767 ch->spd = speed;
768 return ch->spd;
769}
770
771static int
772emupchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
773{
774 struct sc_pchinfo *ch = data;
775 struct sc_info *sc = ch->parent;
776 int irqrate, blksz;
777
778 ch->blksz = blocksize;
779 snd_mtxlock(sc->lock);
780 emu_settimer(sc);
781 irqrate = 48000 / sc->timerinterval;
782 snd_mtxunlock(sc->lock);
783 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate;
784 return blocksize;
785}
786
787static int
788emupchan_trigger(kobj_t obj, void *data, int go)
789{
790 struct sc_pchinfo *ch = data;
791 struct sc_info *sc = ch->parent;
792
793 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD)
794 return 0;
795
796 snd_mtxlock(sc->lock);
797 if (go == PCMTRIG_START) {
798 emu_vsetup(ch);
799 emu_vwrite(sc, ch->master);
800 emu_settimer(sc);
801 emu_enatimer(sc, 1);
802#ifdef EMUDEBUG
803 printf("start [%d bit, %s, %d hz]\n",
804 ch->master->b16 ? 16 : 8,
805 ch->master->stereo ? "stereo" : "mono",
806 ch->master->speed);
807 emu_vdump(sc, ch->master);
808 emu_vdump(sc, ch->slave);
809#endif
810 }
811 ch->run = (go == PCMTRIG_START) ? 1 : 0;
812 emu_vtrigger(sc, ch->master, ch->run);
813 snd_mtxunlock(sc->lock);
814 return 0;
815}
816
817static int
818emupchan_getptr(kobj_t obj, void *data)
819{
820 struct sc_pchinfo *ch = data;
821 struct sc_info *sc = ch->parent;
822 int r;
823
824 snd_mtxlock(sc->lock);
825 r = emu_vpos(sc, ch->master);
826 snd_mtxunlock(sc->lock);
827
828 return r;
829}
830
831static struct pcmchan_caps *
832emupchan_getcaps(kobj_t obj, void *data)
833{
834 return &emu_playcaps;
835}
836
837static kobj_method_t emupchan_methods[] = {
838 KOBJMETHOD(channel_init, emupchan_init),
839 KOBJMETHOD(channel_free, emupchan_free),
840 KOBJMETHOD(channel_setformat, emupchan_setformat),
841 KOBJMETHOD(channel_setspeed, emupchan_setspeed),
842 KOBJMETHOD(channel_setblocksize, emupchan_setblocksize),
843 KOBJMETHOD(channel_trigger, emupchan_trigger),
844 KOBJMETHOD(channel_getptr, emupchan_getptr),
845 KOBJMETHOD(channel_getcaps, emupchan_getcaps),
846 { 0, 0 }
847};
848CHANNEL_DECLARE(emupchan);
849
850/* channel interface */
851static void *
852emurchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
853 struct pcm_channel *c, int dir)
854{
855 struct sc_info *sc = devinfo;
856 struct sc_rchinfo *ch;
857
858 KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction"));
859 ch = &sc->rch[sc->rnum];
860 ch->buffer = b;
861 ch->parent = sc;
862 ch->channel = c;
863 ch->blksz = sc->bufsz / 2;
864 ch->fmt = AFMT_U8;
865 ch->spd = 8000;
866 ch->num = sc->rnum;
867 switch(sc->rnum) {
868 case 0:
869 ch->idxreg = sc->audigy ? A_ADCIDX : ADCIDX;
870 ch->basereg = ADCBA;
871 ch->sizereg = ADCBS;
872 ch->setupreg = ADCCR;
873 ch->irqmask = INTE_ADCBUFENABLE;
874 break;
875
876 case 1:
877 ch->idxreg = FXIDX;
878 ch->basereg = FXBA;
879 ch->sizereg = FXBS;
880 ch->setupreg = FXWC;
881 ch->irqmask = INTE_EFXBUFENABLE;
882 break;
883
884 case 2:
885 ch->idxreg = MICIDX;
886 ch->basereg = MICBA;
887 ch->sizereg = MICBS;
888 ch->setupreg = 0;
889 ch->irqmask = INTE_MICBUFENABLE;
890 break;
891 }
892 sc->rnum++;
893 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, sc->bufsz) != 0)
894 return NULL;
895 else {
896 snd_mtxlock(sc->lock);
897 emu_wrptr(sc, 0, ch->basereg, sndbuf_getbufaddr(ch->buffer));
898 emu_wrptr(sc, 0, ch->sizereg, 0); /* off */
899 snd_mtxunlock(sc->lock);
900 return ch;
901 }
902}
903
904static int
905emurchan_setformat(kobj_t obj, void *data, u_int32_t format)
906{
907 struct sc_rchinfo *ch = data;
908
909 ch->fmt = format;
910 return 0;
911}
912
913static int
914emurchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
915{
916 struct sc_rchinfo *ch = data;
917
918 if (ch->num == 0) {
919 if (ch->parent->audigy)
920 speed = audigy_adcspeed[audigy_recval(speed)];
921 else
922 speed = adcspeed[emu_recval(speed)];
923 }
924 if (ch->num == 1)
925 speed = 48000;
926 if (ch->num == 2)
927 speed = 8000;
928 ch->spd = speed;
929 return ch->spd;
930}
931
932static int
933emurchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
934{
935 struct sc_rchinfo *ch = data;
936 struct sc_info *sc = ch->parent;
937 int irqrate, blksz;
938
939 ch->blksz = blocksize;
940 snd_mtxlock(sc->lock);
941 emu_settimer(sc);
942 irqrate = 48000 / sc->timerinterval;
943 snd_mtxunlock(sc->lock);
944 blksz = (ch->spd * sndbuf_getbps(ch->buffer)) / irqrate;
945 return blocksize;
946}
947
948/* semantic note: must start at beginning of buffer */
949static int
950emurchan_trigger(kobj_t obj, void *data, int go)
951{
952 struct sc_rchinfo *ch = data;
953 struct sc_info *sc = ch->parent;
954 u_int32_t val, sz;
955
956 switch(sc->bufsz) {
957 case 4096:
958 sz = ADCBS_BUFSIZE_4096;
959 break;
960
961 case 8192:
962 sz = ADCBS_BUFSIZE_8192;
963 break;
964
965 case 16384:
966 sz = ADCBS_BUFSIZE_16384;
967 break;
968
969 case 32768:
970 sz = ADCBS_BUFSIZE_32768;
971 break;
972
973 case 65536:
974 sz = ADCBS_BUFSIZE_65536;
975 break;
976
977 default:
978 sz = ADCBS_BUFSIZE_4096;
979 }
980
981 snd_mtxlock(sc->lock);
982 switch(go) {
983 case PCMTRIG_START:
984 ch->run = 1;
985 emu_wrptr(sc, 0, ch->sizereg, sz);
986 if (ch->num == 0) {
987 if (sc->audigy) {
988 val = A_ADCCR_LCHANENABLE;
989 if (ch->fmt & AFMT_STEREO)
990 val |= A_ADCCR_RCHANENABLE;
991 val |= audigy_recval(ch->spd);
992 } else {
993 val = ADCCR_LCHANENABLE;
994 if (ch->fmt & AFMT_STEREO)
995 val |= ADCCR_RCHANENABLE;
996 val |= emu_recval(ch->spd);
997 }
998
999 emu_wrptr(sc, 0, ch->setupreg, 0);
1000 emu_wrptr(sc, 0, ch->setupreg, val);
1001 }
1002 val = emu_rd(sc, INTE, 4);
1003 val |= ch->irqmask;
1004 emu_wr(sc, INTE, val, 4);
1005 break;
1006
1007 case PCMTRIG_STOP:
1008 case PCMTRIG_ABORT:
1009 ch->run = 0;
1010 emu_wrptr(sc, 0, ch->sizereg, 0);
1011 if (ch->setupreg)
1012 emu_wrptr(sc, 0, ch->setupreg, 0);
1013 val = emu_rd(sc, INTE, 4);
1014 val &= ~ch->irqmask;
1015 emu_wr(sc, INTE, val, 4);
1016 break;
1017
1018 case PCMTRIG_EMLDMAWR:
1019 case PCMTRIG_EMLDMARD:
1020 default:
1021 break;
1022 }
1023 snd_mtxunlock(sc->lock);
1024
1025 return 0;
1026}
1027
1028static int
1029emurchan_getptr(kobj_t obj, void *data)
1030{
1031 struct sc_rchinfo *ch = data;
1032 struct sc_info *sc = ch->parent;
1033 int r;
1034
1035 snd_mtxlock(sc->lock);
1036 r = emu_rdptr(sc, 0, ch->idxreg) & 0x0000ffff;
1037 snd_mtxunlock(sc->lock);
1038
1039 return r;
1040}
1041
1042static struct pcmchan_caps *
1043emurchan_getcaps(kobj_t obj, void *data)
1044{
1045 struct sc_rchinfo *ch = data;
1046
1047 return &emu_reccaps[ch->num];
1048}
1049
1050static kobj_method_t emurchan_methods[] = {
1051 KOBJMETHOD(channel_init, emurchan_init),
1052 KOBJMETHOD(channel_setformat, emurchan_setformat),
1053 KOBJMETHOD(channel_setspeed, emurchan_setspeed),
1054 KOBJMETHOD(channel_setblocksize, emurchan_setblocksize),
1055 KOBJMETHOD(channel_trigger, emurchan_trigger),
1056 KOBJMETHOD(channel_getptr, emurchan_getptr),
1057 KOBJMETHOD(channel_getcaps, emurchan_getcaps),
1058 { 0, 0 }
1059};
1060CHANNEL_DECLARE(emurchan);
1061
1062/* -------------------------------------------------------------------- */
1063/* The interrupt handler */
1064static void
1065emu_intr(void *data)
1066{
1067 struct sc_info *sc = data;
1068 u_int32_t stat, ack, i, x;
1069
1070 snd_mtxlock(sc->lock);
1071 while (1) {
1072 stat = emu_rd(sc, IPR, 4);
1073 if (stat == 0)
1074 break;
1075 ack = 0;
1076
1077 /* process irq */
1078 if (stat & IPR_INTERVALTIMER)
1079 ack |= IPR_INTERVALTIMER;
1080
1081 if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL))
1082 ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
1083
1084 if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL))
1085 ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
1086
1087 if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL))
1088 ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL);
1089
1090 if (stat & IPR_PCIERROR) {
1091 ack |= IPR_PCIERROR;
1092 device_printf(sc->dev, "pci error\n");
1093 /* we still get an nmi with ecc ram even if we ack this */
1094 }
1095 if (stat & IPR_SAMPLERATETRACKER) {
1096 ack |= IPR_SAMPLERATETRACKER;
1097#ifdef EMUDEBUG
1098 device_printf(sc->dev,
1099 "sample rate tracker lock status change\n");
1100#endif
1101 }
1102
1103 if (stat & ~ack)
1104 device_printf(sc->dev, "dodgy irq: %x (harmless)\n",
1105 stat & ~ack);
1106
1107 emu_wr(sc, IPR, stat, 4);
1108
1109 if (ack) {
1110 snd_mtxunlock(sc->lock);
1111
1112 if (ack & IPR_INTERVALTIMER) {
1113 x = 0;
1114 for (i = 0; i < sc->nchans; i++) {
1115 if (sc->pch[i].run) {
1116 x = 1;
1117 chn_intr(sc->pch[i].channel);
1118 }
1119 }
1120 if (x == 0)
1121 emu_enatimer(sc, 0);
1122 }
1123
1124
1125 if (ack & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
1126 if (sc->rch[0].channel)
1127 chn_intr(sc->rch[0].channel);
1128 }
1129 if (ack & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
1130 if (sc->rch[1].channel)
1131 chn_intr(sc->rch[1].channel);
1132 }
1133 if (ack & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) {
1134 if (sc->rch[2].channel)
1135 chn_intr(sc->rch[2].channel);
1136 }
1137
1138 snd_mtxlock(sc->lock);
1139 }
1140 }
1141 snd_mtxunlock(sc->lock);
1142}
1143
1144/* -------------------------------------------------------------------- */
1145
1146static void
1147emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1148{
1149 bus_addr_t *phys = arg;
1150
1151 *phys = error ? 0 : (bus_addr_t)segs->ds_addr;
1152
1153 if (bootverbose) {
1154 printf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n",
1155 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len,
1156 nseg, error);
1157 }
1158}
1159
1160static void *
1161emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr)
1162{
1163 void *buf;
1164 bus_dmamap_t map;
1165
1166 *addr = 0;
1167 if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, &map))
1168 return NULL;
1169 if (bus_dmamap_load(sc->parent_dmat, map, buf, sz, emu_setmap, addr, 0)
1170 || !*addr)
1171 return NULL;
1172 return buf;
1173}
1174
1175static void
1176emu_free(struct sc_info *sc, void *buf)
1177{
1178 bus_dmamem_free(sc->parent_dmat, buf, NULL);
1179}
1180
1181static void *
1182emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr)
1183{
1184 u_int32_t blksz, start, idx, ofs, tmp, found;
1185 struct emu_mem *mem = &sc->mem;
1186 struct emu_memblk *blk;
1187 void *buf;
1188
1189 blksz = sz / EMUPAGESIZE;
1190 if (sz > (blksz * EMUPAGESIZE))
1191 blksz++;
1192 /* find a free block in the bitmap */
1193 found = 0;
1194 start = 1;
1195 while (!found && start + blksz < EMUMAXPAGES) {
1196 found = 1;
1197 for (idx = start; idx < start + blksz; idx++)
1198 if (mem->bmap[idx >> 3] & (1 << (idx & 7)))
1199 found = 0;
1200 if (!found)
1201 start++;
1202 }
1203 if (!found)
1204 return NULL;
1205 blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT);
1206 if (blk == NULL)
1207 return NULL;
1208 buf = emu_malloc(sc, sz, &blk->buf_addr);
1209 *addr = blk->buf_addr;
1210 if (buf == NULL) {
1211 free(blk, M_DEVBUF);
1212 return NULL;
1213 }
1214 blk->buf = buf;
1215 blk->pte_start = start;
1216 blk->pte_size = blksz;
1217#ifdef EMUDEBUG
1218 printf("buf %p, pte_start %d, pte_size %d\n", blk->buf,
1219 blk->pte_start, blk->pte_size);
1220#endif
1221 ofs = 0;
1222 for (idx = start; idx < start + blksz; idx++) {
1223 mem->bmap[idx >> 3] |= 1 << (idx & 7);
1224 tmp = (u_int32_t)(u_long)((u_int8_t *)blk->buf_addr + ofs);
1225#ifdef EMUDEBUG
1226 printf("pte[%d] -> %x phys, %x virt\n", idx, tmp,
1227 ((u_int32_t)buf) + ofs);
1228#endif
1229 mem->ptb_pages[idx] = (tmp << 1) | idx;
1230 ofs += EMUPAGESIZE;
1231 }
1232 SLIST_INSERT_HEAD(&mem->blocks, blk, link);
1233 return buf;
1234}
1235
1236static int
1237emu_memfree(struct sc_info *sc, void *buf)
1238{
1239 u_int32_t idx, tmp;
1240 struct emu_mem *mem = &sc->mem;
1241 struct emu_memblk *blk, *i;
1242
1243 blk = NULL;
1244 SLIST_FOREACH(i, &mem->blocks, link) {
1245 if (i->buf == buf)
1246 blk = i;
1247 }
1248 if (blk == NULL)
1249 return EINVAL;
1250 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link);
1251 emu_free(sc, buf);
1252 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1;
1253 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) {
1254 mem->bmap[idx >> 3] &= ~(1 << (idx & 7));
1255 mem->ptb_pages[idx] = tmp | idx;
1256 }
1257 free(blk, M_DEVBUF);
1258 return 0;
1259}
1260
1261static int
1262emu_memstart(struct sc_info *sc, void *buf)
1263{
1264 struct emu_mem *mem = &sc->mem;
1265 struct emu_memblk *blk, *i;
1266
1267 blk = NULL;
1268 SLIST_FOREACH(i, &mem->blocks, link) {
1269 if (i->buf == buf)
1270 blk = i;
1271 }
1272 if (blk == NULL)
1273 return -EINVAL;
1274 return blk->pte_start;
1275}
1276
1277static void
1278emu_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y,
1279 u_int32_t *pc)
1280{
1281 emu_wrefx(sc, (*pc) * 2, (x << 10) | y);
1282 emu_wrefx(sc, (*pc) * 2 + 1, (op << 20) | (z << 10) | w);
1283 (*pc)++;
1284}
1285
1286static void
1287audigy_addefxop(struct sc_info *sc, int op, int z, int w, int x, int y,
1288 u_int32_t *pc)
1289{
1290 emu_wrefx(sc, (*pc) * 2, (x << 12) | y);
1291 emu_wrefx(sc, (*pc) * 2 + 1, (op << 24) | (z << 12) | w);
1292 (*pc)++;
1293}
1294
1295static void
1296audigy_initefx(struct sc_info *sc)
1297{
1298 int i;
1299 u_int32_t pc = 0;
1300
1301 /* skip 0, 0, -1, 0 - NOPs */
1302 for (i = 0; i < 512; i++)
1303 audigy_addefxop(sc, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc);
1304
1305 for (i = 0; i < 512; i++)
1306 emu_wrptr(sc, 0, A_FXGPREGBASE + i, 0x0);
1307
1308 pc = 16;
1309
1310 /* stop fx processor */
1311 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
1312
1313 /* Audigy 2 (EMU10K2) DSP Registers:
1314 FX Bus
1315 0x000-0x00f : 16 registers (???)
1316 Input
1317 0x040/0x041 : AC97 Codec (l/r)
1318 0x042/0x043 : ADC, S/PDIF (l/r)
1319 0x044/0x045 : Optical S/PDIF in (l/r)
1320 0x046/0x047 : ???
1321 0x048/0x049 : Line/Mic 2 (l/r)
1322 0x04a/0x04b : RCA S/PDIF (l/r)
1323 0x04c/0x04d : Aux 2 (l/r)
1324 Output
1325 0x060/0x061 : Digital Front (l/r)
1326 0x062/0x063 : Digital Center/LFE
1327 0x064/0x065 : AudigyDrive Heaphone (l/r)
1328 0x066/0x067 : Digital Rear (l/r)
1329 0x068/0x069 : Analog Front (l/r)
1330 0x06a/0x06b : Analog Center/LFE
1331 0x06c/0x06d : ???
1332 0x06e/0x06f : Analog Rear (l/r)
1333 0x070/0x071 : AC97 Output (l/r)
1334 0x072/0x073 : ???
1335 0x074/0x075 : ???
1336 0x076/0x077 : ADC Recording Buffer (l/r)
1337 Constants
1338 0x0c0 - 0x0c4 = 0 - 4
1339 0x0c5 = 0x8, 0x0c6 = 0x10, 0x0c7 = 0x20
1340 0x0c8 = 0x100, 0x0c9 = 0x10000, 0x0ca = 0x80000
1341 0x0cb = 0x10000000, 0x0cc = 0x20000000, 0x0cd = 0x40000000
1342 0x0ce = 0x80000000, 0x0cf = 0x7fffffff, 0x0d0 = 0xffffffff
1343 0x0d1 = 0xfffffffe, 0x0d2 = 0xc0000000, 0x0d3 = 0x41fbbcdc
1344 0x0d4 = 0x5a7ef9db, 0x0d5 = 0x00100000, 0x0dc = 0x00000001 (???)
1345 Temporary Values
1346 0x0d6 : Accumulator (???)
1347 0x0d7 : Condition Register
1348 0x0d8 : Noise source
1349 0x0d9 : Noise source
1350 Tank Memory Data Registers
1351 0x200 - 0x2ff
1352 Tank Memory Address Registers
1353 0x300 - 0x3ff
1354 General Purpose Registers
1355 0x400 - 0x5ff
1356 */
1357
1358 /* AC97Output[l/r] = FXBus PCM[l/r] */
1359 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_L), A_C_00000000,
1360 A_C_00000000, A_FXBUS(FXBUS_PCM_LEFT), &pc);
1361 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_R), A_C_00000000,
1362 A_C_00000000, A_FXBUS(FXBUS_PCM_RIGHT), &pc);
1363
1364 /* GPR[0/1] = RCA S/PDIF[l/r] -- Master volume */
1365 audigy_addefxop(sc, iACC3, A_GPR(0), A_C_00000000,
1366 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_L), &pc);
1367 audigy_addefxop(sc, iACC3, A_GPR(1), A_C_00000000,
1368 A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_R), &pc);
1369
1370 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
1371 audigy_addefxop(sc, iINTERP, A_GPR(2), A_GPR(1),
1372 A_C_40000000, A_GPR(0), &pc);
1373
1374 /* Headphones[l/r] = GPR[0/1] */
1375 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_L),
1376 A_C_00000000, A_C_00000000, A_GPR(0), &pc);
1377 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_R),
1378 A_C_00000000, A_C_00000000, A_GPR(1), &pc);
1379
1380 /* Analog Front[l/r] = GPR[0/1] */
1381 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_L), A_C_00000000,
1382 A_C_00000000, A_GPR(0), &pc);
1383 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_R), A_C_00000000,
1384 A_C_00000000, A_GPR(1), &pc);
1385
1386 /* Digital Front[l/r] = GPR[0/1] */
1387 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L), A_C_00000000,
1388 A_C_00000000, A_GPR(0), &pc);
1389 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_R), A_C_00000000,
1390 A_C_00000000, A_GPR(1), &pc);
1391
1392 /* Center and Subwoofer configuration */
1393 /* Analog Center = GPR[0] + GPR[2] */
1394 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ACENTER), A_C_00000000,
1395 A_GPR(0), A_GPR(2), &pc);
1396 /* Analog Sub = GPR[1] + GPR[2] */
1397 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ALFE), A_C_00000000,
1398 A_GPR(1), A_GPR(2), &pc);
1399
1400 /* Digital Center = GPR[0] + GPR[2] */
1401 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_CENTER), A_C_00000000,
1402 A_GPR(0), A_GPR(2), &pc);
1403 /* Digital Sub = GPR[1] + GPR[2] */
1404 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_LFE), A_C_00000000,
1405 A_GPR(1), A_GPR(2), &pc);
1406
1407#if 0
1408 /* Analog Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
1409 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
1410 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000,
1411 A_GPR(16), A_GPR(0), &pc);
1412 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000,
1413 A_GPR(17), A_GPR(1), &pc);
1414
1415 /* Digital Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
1416 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
1417 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000,
1418 A_GPR(16), A_GPR(0), &pc);
1419 audigy_addefxop(sc, iMAC0, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000,
1420 A_GPR(17), A_GPR(1), &pc);
1421#else
1422 /* XXX This is just a copy to the channel, since we do not have
1423 * a patch manager, it is useful for have another output enabled.
1424 */
1425
1426 /* Analog Rear[l/r] = GPR[0/1] */
1427 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000,
1428 A_C_00000000, A_GPR(0), &pc);
1429 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000,
1430 A_C_00000000, A_GPR(1), &pc);
1431
1432 /* Digital Rear[l/r] = GPR[0/1] */
1433 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000,
1434 A_C_00000000, A_GPR(0), &pc);
1435 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000,
1436 A_C_00000000, A_GPR(1), &pc);
1437#endif
1438
1439 /* ADC Recording buffer[l/r] = AC97Input[l/r] */
1440 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_L), A_C_00000000,
1441 A_C_00000000, A_EXTIN(A_EXTIN_AC97_L), &pc);
1442 audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_R), A_C_00000000,
1443 A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc);
1444
1445 /* resume normal operations */
1446 emu_wrptr(sc, 0, A_DBG, 0);
1447}
1448
1449static void
1450emu_initefx(struct sc_info *sc)
1451{
1452 int i;
1453 u_int32_t pc = 16;
1454
1455 /* acc3 0,0,0,0 - NOPs */
1456 for (i = 0; i < 512; i++) {
1457 emu_wrefx(sc, i * 2, 0x10040);
1458 emu_wrefx(sc, i * 2 + 1, 0x610040);
1459 }
1460
1461 for (i = 0; i < 256; i++)
1462 emu_wrptr(sc, 0, FXGPREGBASE + i, 0);
1463
1464 /* FX-8010 DSP Registers:
1465 FX Bus
1466 0x000-0x00f : 16 registers
1467 Input
1468 0x010/0x011 : AC97 Codec (l/r)
1469 0x012/0x013 : ADC, S/PDIF (l/r)
1470 0x014/0x015 : Mic(left), Zoom (l/r)
1471 0x016/0x017 : TOS link in (l/r)
1472 0x018/0x019 : Line/Mic 1 (l/r)
1473 0x01a/0x01b : COAX S/PDIF (l/r)
1474 0x01c/0x01d : Line/Mic 2 (l/r)
1475 Output
1476 0x020/0x021 : AC97 Output (l/r)
1477 0x022/0x023 : TOS link out (l/r)
1478 0x024/0x025 : Center/LFE
1479 0x026/0x027 : LiveDrive Headphone (l/r)
1480 0x028/0x029 : Rear Channel (l/r)
1481 0x02a/0x02b : ADC Recording Buffer (l/r)
1482 0x02c : Mic Recording Buffer
1483 0x031/0x032 : Analog Center/LFE
1484 Constants
1485 0x040 - 0x044 = 0 - 4
1486 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20
1487 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000
1488 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000
1489 0x04e = 0x80000000, 0x04f = 0x7fffffff, 0x050 = 0xffffffff
1490 0x051 = 0xfffffffe, 0x052 = 0xc0000000, 0x053 = 0x41fbbcdc
1491 0x054 = 0x5a7ef9db, 0x055 = 0x00100000
1492 Temporary Values
1493 0x056 : Accumulator
1494 0x057 : Condition Register
1495 0x058 : Noise source
1496 0x059 : Noise source
1497 0x05a : IRQ Register
1498 0x05b : TRAM Delay Base Address Count
1499 General Purpose Registers
1500 0x100 - 0x1ff
1501 Tank Memory Data Registers
1502 0x200 - 0x2ff
1503 Tank Memory Address Registers
1504 0x300 - 0x3ff
1505 */
1506
1507 /* Routing - this will be configurable in later version */
1508
1509 /* GPR[0/1] = FX * 4 + SPDIF-in */
1510 emu_addefxop(sc, iMACINT0, GPR(0), EXTIN(EXTIN_SPDIF_CD_L),
1511 FXBUS(FXBUS_PCM_LEFT), C_00000004, &pc);
1512 emu_addefxop(sc, iMACINT0, GPR(1), EXTIN(EXTIN_SPDIF_CD_R),
1513 FXBUS(FXBUS_PCM_RIGHT), C_00000004, &pc);
1514
1515 /* GPR[0/1] += APS-input */
1516 emu_addefxop(sc, iACC3, GPR(0), GPR(0), C_00000000,
1517 sc->APS ? EXTIN(EXTIN_TOSLINK_L) : C_00000000, &pc);
1518 emu_addefxop(sc, iACC3, GPR(1), GPR(1), C_00000000,
1519 sc->APS ? EXTIN(EXTIN_TOSLINK_R) : C_00000000, &pc);
1520
1521 /* FrontOut (AC97) = GPR[0/1] */
1522 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_L), C_00000000,
1523 C_00000000, GPR(0), &pc);
1524 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_R), C_00000000,
1525 C_00000001, GPR(1), &pc);
1526
1527 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
1528 emu_addefxop(sc, iINTERP, GPR(2), GPR(1), C_40000000, GPR(0), &pc);
1529
1530#if 0
1531 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */
1532 /* RearVolume = GPR[0x10/0x11] */
1533 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_L), C_00000000,
1534 GPR(16), GPR(0), &pc);
1535 emu_addefxop(sc, iMAC0, EXTOUT(EXTOUT_REAR_R), C_00000000,
1536 GPR(17), GPR(1), &pc);
1537#else
1538 /* XXX This is just a copy to the channel, since we do not have
1539 * a patch manager, it is useful for have another output enabled.
1540 */
1541
1542 /* Rear[l/r] = GPR[0/1] */
1543 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_L), C_00000000,
1544 C_00000000, GPR(0), &pc);
1545 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_R), C_00000000,
1546 C_00000000, GPR(1), &pc);
1547#endif
1548
1549 /* TOS out[l/r] = GPR[0/1] */
1550 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_L), C_00000000,
1551 C_00000000, GPR(0), &pc);
1552 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_R), C_00000000,
1553 C_00000000, GPR(1), &pc);
1554
1555 /* Center and Subwoofer configuration */
1556 /* Analog Center = GPR[0] + GPR[2] */
1557 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ACENTER), C_00000000,
1558 GPR(0), GPR(2), &pc);
1559 /* Analog Sub = GPR[1] + GPR[2] */
1560 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ALFE), C_00000000,
1561 GPR(1), GPR(2), &pc);
1562 /* Digital Center = GPR[0] + GPR[2] */
1563 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_CENTER), C_00000000,
1564 GPR(0), GPR(2), &pc);
1565 /* Digital Sub = GPR[1] + GPR[2] */
1566 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_LFE), C_00000000,
1567 GPR(1), GPR(2), &pc);
1568
1569 /* Headphones[l/r] = GPR[0/1] */
1570 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_L), C_00000000,
1571 C_00000000, GPR(0), &pc);
1572 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_R), C_00000000,
1573 C_00000000, GPR(1), &pc);
1574
1575 /* ADC Recording buffer[l/r] = AC97Input[l/r] */
1576 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_L), C_00000000,
1577 C_00000000, EXTIN(EXTIN_AC97_L), &pc);
1578 emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_R), C_00000000,
1579 C_00000000, EXTIN(EXTIN_AC97_R), &pc);
1580
1581 /* resume normal operations */
1582 emu_wrptr(sc, 0, DBG, 0);
1583}
1584
1585/* Probe and attach the card */
1586static int
1587emu_init(struct sc_info *sc)
1588{
1589 u_int32_t spcs, ch, tmp, i;
1590
1591 if (sc->audigy) {
1592 /* enable additional AC97 slots */
1593 emu_wrptr(sc, 0, AC97SLOT, AC97SLOT_CNTR | AC97SLOT_LFE);
1594 }
1595
1596 /* disable audio and lock cache */
1597 emu_wr(sc, HCFG,
1598 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
1599 4);
1600
1601 /* reset recording buffers */
1602 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
1603 emu_wrptr(sc, 0, MICBA, 0);
1604 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
1605 emu_wrptr(sc, 0, FXBA, 0);
1606 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
1607 emu_wrptr(sc, 0, ADCBA, 0);
1608
1609 /* disable channel interrupt */
1610 emu_wr(sc, INTE,
1611 INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE,
1612 4);
1613 emu_wrptr(sc, 0, CLIEL, 0);
1614 emu_wrptr(sc, 0, CLIEH, 0);
1615 emu_wrptr(sc, 0, SOLEL, 0);
1616 emu_wrptr(sc, 0, SOLEH, 0);
1617
1618 /* wonder what these do... */
1619 if (sc->audigy) {
1620 emu_wrptr(sc, 0, SPBYPASS, 0xf00);
1621 emu_wrptr(sc, 0, AC97SLOT, 0x3);
1622 }
1623
1624 /* init envelope engine */
1625 for (ch = 0; ch < NUM_G; ch++) {
1626 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
1627 emu_wrptr(sc, ch, IP, 0);
1628 emu_wrptr(sc, ch, VTFT, 0xffff);
1629 emu_wrptr(sc, ch, CVCF, 0xffff);
1630 emu_wrptr(sc, ch, PTRX, 0);
1631 emu_wrptr(sc, ch, CPF, 0);
1632 emu_wrptr(sc, ch, CCR, 0);
1633
1634 emu_wrptr(sc, ch, PSST, 0);
1635 emu_wrptr(sc, ch, DSL, 0x10);
1636 emu_wrptr(sc, ch, CCCA, 0);
1637 emu_wrptr(sc, ch, Z1, 0);
1638 emu_wrptr(sc, ch, Z2, 0);
1639 emu_wrptr(sc, ch, FXRT, 0xd01c0000);
1640
1641 emu_wrptr(sc, ch, ATKHLDM, 0);
1642 emu_wrptr(sc, ch, DCYSUSM, 0);
1643 emu_wrptr(sc, ch, IFATN, 0xffff);
1644 emu_wrptr(sc, ch, PEFE, 0);
1645 emu_wrptr(sc, ch, FMMOD, 0);
1646 emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */
1647 emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */
1648 emu_wrptr(sc, ch, TEMPENV, 0);
1649
1650 /*** these are last so OFF prevents writing ***/
1651 emu_wrptr(sc, ch, LFOVAL2, 0);
1652 emu_wrptr(sc, ch, LFOVAL1, 0);
1653 emu_wrptr(sc, ch, ATKHLDV, 0);
1654 emu_wrptr(sc, ch, ENVVOL, 0);
1655 emu_wrptr(sc, ch, ENVVAL, 0);
1656
1657 if (sc->audigy) {
1658 /* audigy cards need this to initialize correctly */
1659 emu_wrptr(sc, ch, 0x4c, 0);
1660 emu_wrptr(sc, ch, 0x4d, 0);
1661 emu_wrptr(sc, ch, 0x4e, 0);
1662 emu_wrptr(sc, ch, 0x4f, 0);
1663 /* set default routing */
1664 emu_wrptr(sc, ch, A_FXRT1, 0x03020100);
1665 emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
1666 emu_wrptr(sc, ch, A_SENDAMOUNTS, 0);
1667 }
1668
1669 sc->voice[ch].vnum = ch;
1670 sc->voice[ch].slave = NULL;
1671 sc->voice[ch].busy = 0;
1672 sc->voice[ch].ismaster = 0;
1673 sc->voice[ch].running = 0;
1674 sc->voice[ch].b16 = 0;
1675 sc->voice[ch].stereo = 0;
1676 sc->voice[ch].speed = 0;
1677 sc->voice[ch].start = 0;
1678 sc->voice[ch].end = 0;
1679 sc->voice[ch].channel = NULL;
1680 }
1681 sc->pnum = sc->rnum = 0;
1682
1683 /*
1684 * Init to 0x02109204 :
1685 * Clock accuracy = 0 (1000ppm)
1686 * Sample Rate = 2 (48kHz)
1687 * Audio Channel = 1 (Left of 2)
1688 * Source Number = 0 (Unspecified)
1689 * Generation Status = 1 (Original for Cat Code 12)
1690 * Cat Code = 12 (Digital Signal Mixer)
1691 * Mode = 0 (Mode 0)
1692 * Emphasis = 0 (None)
1693 * CP = 1 (Copyright unasserted)
1694 * AN = 0 (Audio data)
1695 * P = 0 (Consumer)
1696 */
1697 spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1698 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1699 SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
1700 SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1701 emu_wrptr(sc, 0, SPCS0, spcs);
1702 emu_wrptr(sc, 0, SPCS1, spcs);
1703 emu_wrptr(sc, 0, SPCS2, spcs);
1704
1705 if (!sc->audigy)
1706 emu_initefx(sc);
1707 else if (sc->audigy2) { /* Audigy 2 */
1708 /* from ALSA initialization code: */
1709
1710 /* Hack for Alice3 to work independent of haP16V driver */
1711 u_int32_t tmp;
1712
1713 /* Setup SRCMulti_I2S SamplingRate */
1714 tmp = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE) & 0xfffff1ff;
1715 emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, tmp | 0x400);
1716
1717 /* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */
1718 emu_wr(sc, 0x20, 0x00600000, 4);
1719 emu_wr(sc, 0x24, 0x00000014, 4);
1720
1721 /* Setup SRCMulti Input Audio Enable */
1722 emu_wr(sc, 0x20, 0x006e0000, 4);
1723 emu_wr(sc, 0x24, 0xff00ff00, 4);
1724 }
1725
1726 SLIST_INIT(&sc->mem.blocks);
1727 sc->mem.ptb_pages = emu_malloc(sc, EMUMAXPAGES * sizeof(u_int32_t),
1728 &sc->mem.ptb_pages_addr);
1729 if (sc->mem.ptb_pages == NULL)
1730 return -1;
1731
1732 sc->mem.silent_page = emu_malloc(sc, EMUPAGESIZE,
1733 &sc->mem.silent_page_addr);
1734 if (sc->mem.silent_page == NULL) {
1735 emu_free(sc, sc->mem.ptb_pages);
1736 return -1;
1737 }
1738 /* Clear page with silence & setup all pointers to this page */
1739 bzero(sc->mem.silent_page, EMUPAGESIZE);
1740 tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1;
1741 for (i = 0; i < EMUMAXPAGES; i++)
1742 sc->mem.ptb_pages[i] = tmp | i;
1743
1744 emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
1745 emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */
1746 emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */
1747
1748 for (ch = 0; ch < NUM_G; ch++) {
1749 emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
1750 emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
1751 }
1752
1753 /* emu_memalloc(sc, EMUPAGESIZE); */
1754 /*
1755 * Hokay, now enable the AUD bit
1756 *
1757 * Audigy
1758 * Enable Audio = 0 (enabled after fx processor initialization)
1759 * Mute Disable Audio = 0
1760 * Joystick = 1
1761 *
1762 * Audigy 2
1763 * Enable Audio = 1
1764 * Mute Disable Audio = 0
1765 * Joystick = 1
1766 * GP S/PDIF AC3 Enable = 1
1767 * CD S/PDIF AC3 Enable = 1
1768 *
1769 * EMU10K1
1770 * Enable Audio = 1
1771 * Mute Disable Audio = 0
1772 * Lock Tank Memory = 1
1773 * Lock Sound Memory = 0
1774 * Auto Mute = 1
1775 */
1776
1777 if (sc->audigy) {
1778 tmp = HCFG_AUTOMUTE | HCFG_JOYENABLE;
1779 if (sc->audigy2) /* Audigy 2 */
1780 tmp = HCFG_AUDIOENABLE | HCFG_AC3ENABLE_CDSPDIF |
1781 HCFG_AC3ENABLE_GPSPDIF;
1782 emu_wr(sc, HCFG, tmp, 4);
1783
1784 audigy_initefx(sc);
1785
1786 /* from ALSA initialization code: */
1787
1788 /* enable audio and disable both audio/digital outputs */
1789 emu_wr(sc, HCFG, emu_rd(sc, HCFG, 4) | HCFG_AUDIOENABLE, 4);
1790 emu_wr(sc, A_IOCFG, emu_rd(sc, A_IOCFG, 4) & ~A_IOCFG_GPOUT_AD,
1791 4);
1792 if (sc->audigy2) { /* Audigy 2 */
1793 /* Unmute Analog.
1794 * Set GPO6 to 1 for Apollo. This has to be done after
1795 * init Alice3 I2SOut beyond 48kHz.
1796 * So, sequence is important.
1797 */
1798 emu_wr(sc, A_IOCFG,
1799 emu_rd(sc, A_IOCFG, 4) | A_IOCFG_GPOUT_A, 4);
1800 }
1801 } else {
1802 /* EMU10K1 initialization code */
1803 tmp = HCFG_AUDIOENABLE | HCFG_LOCKTANKCACHE_MASK
1804 | HCFG_AUTOMUTE;
1805 if (sc->rev >= 6)
1806 tmp |= HCFG_JOYENABLE;
1807
1808 emu_wr(sc, HCFG, tmp, 4);
1809
1810 /* TOSLink detection */
1811 sc->tos_link = 0;
1812 tmp = emu_rd(sc, HCFG, 4);
1813 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
1814 emu_wr(sc, HCFG, tmp | HCFG_GPOUT1, 4);
1815 DELAY(50);
1816 if (tmp != (emu_rd(sc, HCFG, 4) & ~HCFG_GPOUT1)) {
1817 sc->tos_link = 1;
1818 emu_wr(sc, HCFG, tmp, 4);
1819 }
1820 }
1821 }
1822
1823 return 0;
1824}
1825
1826static int
1827emu_uninit(struct sc_info *sc)
1828{
1829 u_int32_t ch;
1830
1831 emu_wr(sc, INTE, 0, 4);
1832 for (ch = 0; ch < NUM_G; ch++)
1833 emu_wrptr(sc, ch, DCYSUSV, ENV_OFF);
1834 for (ch = 0; ch < NUM_G; ch++) {
1835 emu_wrptr(sc, ch, VTFT, 0);
1836 emu_wrptr(sc, ch, CVCF, 0);
1837 emu_wrptr(sc, ch, PTRX, 0);
1838 emu_wrptr(sc, ch, CPF, 0);
1839 }
1840
1841 if (sc->audigy) { /* stop fx processor */
1842 emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
1843 }
1844
1845 /* disable audio and lock cache */
1846 emu_wr(sc, HCFG,
1847 HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
1848 4);
1849
1850 emu_wrptr(sc, 0, PTB, 0);
1851 /* reset recording buffers */
1852 emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
1853 emu_wrptr(sc, 0, MICBA, 0);
1854 emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
1855 emu_wrptr(sc, 0, FXBA, 0);
1856 emu_wrptr(sc, 0, FXWC, 0);
1857 emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
1858 emu_wrptr(sc, 0, ADCBA, 0);
1859 emu_wrptr(sc, 0, TCB, 0);
1860 emu_wrptr(sc, 0, TCBS, 0);
1861
1862 /* disable channel interrupt */
1863 emu_wrptr(sc, 0, CLIEL, 0);
1864 emu_wrptr(sc, 0, CLIEH, 0);
1865 emu_wrptr(sc, 0, SOLEL, 0);
1866 emu_wrptr(sc, 0, SOLEH, 0);
1867
1868 /* init envelope engine */
1869 if (!SLIST_EMPTY(&sc->mem.blocks))
1870 device_printf(sc->dev, "warning: memblock list not empty\n");
1871 emu_free(sc, sc->mem.ptb_pages);
1872 emu_free(sc, sc->mem.silent_page);
1873
1874 return 0;
1875}
1876
1877static int
1878emu_pci_probe(device_t dev)
1879{
1880 char *s = NULL;
1881
1882 switch (pci_get_devid(dev)) {
1883 case EMU10K1_PCI_ID:
1884 s = "Creative EMU10K1";
1885 break;
1886
1887 case EMU10K2_PCI_ID:
1888 if (pci_get_revid(dev) == 0x04)
1889 s = "Creative Audigy 2 (EMU10K2)";
1890 else
1891 s = "Creative Audigy (EMU10K2)";
1892 break;
1893
1894 case EMU10K3_PCI_ID:
1895 s = "Creative Audigy 2 (EMU10K3)";
1896 break;
1897
1898 default:
1899 return ENXIO;
1900 }
1901
1902 device_set_desc(dev, s);
1903 return BUS_PROBE_DEFAULT;
1904}
1905
1906static int
1907emu_pci_attach(device_t dev)
1908{
1909 struct ac97_info *codec = NULL;
1910 struct sc_info *sc;
1911 u_int32_t data;
1912 int i, gotmic;
1913 char status[SND_STATUSLEN];
1914
1915 if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO)) == NULL) {
1916 device_printf(dev, "cannot allocate softc\n");
1917 return ENXIO;
1918 }
1919
1920 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc");
1921 sc->dev = dev;
1922 sc->type = pci_get_devid(dev);
1923 sc->rev = pci_get_revid(dev);
1924 sc->audigy = sc->type == EMU10K2_PCI_ID || sc->type == EMU10K3_PCI_ID;
1925 sc->audigy2 = (sc->audigy && sc->rev == 0x04);
1926 sc->nchans = sc->audigy ? 8 : 4;
1927 sc->addrmask = sc->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
1928
1929 data = pci_read_config(dev, PCIR_COMMAND, 2);
1930 data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN);
1931 pci_write_config(dev, PCIR_COMMAND, data, 2);
1932 data = pci_read_config(dev, PCIR_COMMAND, 2);
1933
1934 i = PCIR_BAR(0);
1935 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
1936 if (sc->reg == NULL) {
1937 device_printf(dev, "unable to map register space\n");
1938 goto bad;
1939 }
1940 sc->st = rman_get_bustag(sc->reg);
1941 sc->sh = rman_get_bushandle(sc->reg);
1942
1943 sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536);
1944
1945 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
1946 /*lowaddr*/1 << 31, /* can only access 0-2gb */
1947 /*highaddr*/BUS_SPACE_MAXADDR,
1948 /*filter*/NULL, /*filterarg*/NULL,
1949 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
1950 /*flags*/0, /*lockfunc*/busdma_lock_mutex,
1951 /*lockarg*/&Giant, &sc->parent_dmat) != 0) {
1952 device_printf(dev, "unable to create dma tag\n");
1953 goto bad;
1954 }
1955
1956 if (emu_init(sc) == -1) {
1957 device_printf(dev, "unable to initialize the card\n");
1958 goto bad;
1959 }
1960
1961 codec = AC97_CREATE(dev, sc, emu_ac97);
1962 if (codec == NULL) goto bad;
1963 gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL) ? 1 : 0;
1964 if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad;
1965
1966 i = 0;
1967 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
1968 RF_ACTIVE | RF_SHAREABLE);
1969 if (!sc->irq ||
1970 snd_setup_intr(dev, sc->irq, INTR_MPSAFE, emu_intr, sc, &sc->ih)) {
1971 device_printf(dev, "unable to map interrupt\n");
1972 goto bad;
1973 }
1974
1975 snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s",
1976 rman_get_start(sc->reg), rman_get_start(sc->irq),
1977 PCM_KLDSTRING(snd_emu10k1));
1978
1979 if (pcm_register(dev, sc, sc->nchans, gotmic ? 3 : 2)) goto bad;
1980 for (i = 0; i < sc->nchans; i++)
1981 pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc);
1982 for (i = 0; i < (gotmic ? 3 : 2); i++)
1983 pcm_addchan(dev, PCMDIR_REC, &emurchan_class, sc);
1984
1985 pcm_setstatus(dev, status);
1986
1987 return 0;
1988
1989bad:
1990 if (codec) ac97_destroy(codec);
1991 if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
1992 if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih);
1993 if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
1994 if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat);
1995 if (sc->lock) snd_mtxfree(sc->lock);
1996 free(sc, M_DEVBUF);
1997 return ENXIO;
1998}
1999
2000static int
2001emu_pci_detach(device_t dev)
2002{
2003 int r;
2004 struct sc_info *sc;
2005
2006 r = pcm_unregister(dev);
2007 if (r)
2008 return r;
2009
2010 sc = pcm_getdevinfo(dev);
2011 /* shutdown chip */
2012 emu_uninit(sc);
2013
2014 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
2015 bus_teardown_intr(dev, sc->irq, sc->ih);
2016 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
2017 bus_dma_tag_destroy(sc->parent_dmat);
2018 snd_mtxfree(sc->lock);
2019 free(sc, M_DEVBUF);
2020
2021 return 0;
2022}
2023
2024/* add suspend, resume */
2025static device_method_t emu_methods[] = {
2026 /* Device interface */
2027 DEVMETHOD(device_probe, emu_pci_probe),
2028 DEVMETHOD(device_attach, emu_pci_attach),
2029 DEVMETHOD(device_detach, emu_pci_detach),
2030
2031 { 0, 0 }
2032};
2033
2034static driver_t emu_driver = {
2035 "pcm",
2036 emu_methods,
2037 PCM_SOFTC_SIZE,
2038};
2039
2040DRIVER_MODULE(snd_emu10k1, pci, emu_driver, pcm_devclass, 0, 0);
2041DRIVER_MODULE(snd_emu10k1, cardbus, emu_driver, pcm_devclass, 0, 0);
2042MODULE_DEPEND(snd_emu10k1, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
2043MODULE_VERSION(snd_emu10k1, 1);
2044
2045/* dummy driver to silence the joystick device */
2046static int
2047emujoy_pci_probe(device_t dev)
2048{
2049 char *s = NULL;
2050
2051 switch (pci_get_devid(dev)) {
2052 case 0x70021102:
2053 s = "Creative EMU10K1 Joystick";
2054 device_quiet(dev);
2055 break;
2056 case 0x70031102:
2057 s = "Creative EMU10K2 Joystick";
2058 device_quiet(dev);
2059 break;
2060 }
2061
2062 if (s) device_set_desc(dev, s);
2063 return s ? -1000 : ENXIO;
2064}
2065
2066static int
2067emujoy_pci_attach(device_t dev)
2068{
2069 return 0;
2070}
2071
2072static int
2073emujoy_pci_detach(device_t dev)
2074{
2075 return 0;
2076}
2077
2078static device_method_t emujoy_methods[] = {
2079 DEVMETHOD(device_probe, emujoy_pci_probe),
2080 DEVMETHOD(device_attach, emujoy_pci_attach),
2081 DEVMETHOD(device_detach, emujoy_pci_detach),
2082
2083 { 0, 0 }
2084};
2085
2086static driver_t emujoy_driver = {
2087 "emujoy",
2088 emujoy_methods,
2089 8,
2090};
2091
2092static devclass_t emujoy_devclass;
2093
2094DRIVER_MODULE(emujoy, pci, emujoy_driver, emujoy_devclass, 0, 0);
2095
|