| if_sisreg.h (72200) | if_sisreg.h (72813) |
|---|---|
| 1/* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/pci/if_sisreg.h 72200 2001-02-09 06:11:45Z bmilekic $ | 32 * $FreeBSD: head/sys/pci/if_sisreg.h 72813 2001-02-21 20:54:22Z wpaul $ |
| 33 */ 34 35/* 36 * Register definitions for the SiS 900 and SiS 7016 chipsets. The 37 * 7016 is actually an older chip and some of its registers differ 38 * from the 900, however the core operational registers are the same: 39 * the differences lie in the OnNow/Wake on LAN stuff which we don't 40 * use anyway. The 7016 needs an external MII compliant PHY while the --- 29 unchanged lines hidden (view full) --- 70#define SIS_MIB_CTL2 0x68 71#define SIS_MIB_CTL3 0x6C 72#define SIS_MIB 0x80 73#define SIS_LINKSTS 0xA0 74#define SIS_TIMEUNIT 0xA4 75#define SIS_GPIO 0xB8 76 77/* NS DP83815 registers */ | 33 */ 34 35/* 36 * Register definitions for the SiS 900 and SiS 7016 chipsets. The 37 * 7016 is actually an older chip and some of its registers differ 38 * from the 900, however the core operational registers are the same: 39 * the differences lie in the OnNow/Wake on LAN stuff which we don't 40 * use anyway. The 7016 needs an external MII compliant PHY while the --- 29 unchanged lines hidden (view full) --- 70#define SIS_MIB_CTL2 0x68 71#define SIS_MIB_CTL3 0x6C 72#define SIS_MIB 0x80 73#define SIS_LINKSTS 0xA0 74#define SIS_TIMEUNIT 0xA4 75#define SIS_GPIO 0xB8 76 77/* NS DP83815 registers */ |
| 78#define NS_CLKRUN 0x3C |
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| 78#define NS_BMCR 0x80 79#define NS_BMSR 0x84 80#define NS_PHYIDR1 0x88 81#define NS_PHYIDR2 0x8C 82#define NS_ANAR 0x90 83#define NS_ANLPAR 0x94 84#define NS_ANER 0x98 85#define NS_ANNPTR 0x9C 86 87#define NS_PHY_CR 0xE4 88#define NS_PHY_10BTSCR 0xE8 89#define NS_PHY_PAGE 0xCC 90#define NS_PHY_EXTCFG 0xF0 91#define NS_PHY_DSPCFG 0xF4 92#define NS_PHY_SDCFG 0xF8 93#define NS_PHY_TDATA 0xFC 94 | 79#define NS_BMCR 0x80 80#define NS_BMSR 0x84 81#define NS_PHYIDR1 0x88 82#define NS_PHYIDR2 0x8C 83#define NS_ANAR 0x90 84#define NS_ANLPAR 0x94 85#define NS_ANER 0x98 86#define NS_ANNPTR 0x9C 87 88#define NS_PHY_CR 0xE4 89#define NS_PHY_10BTSCR 0xE8 90#define NS_PHY_PAGE 0xCC 91#define NS_PHY_EXTCFG 0xF0 92#define NS_PHY_DSPCFG 0xF4 93#define NS_PHY_SDCFG 0xF8 94#define NS_PHY_TDATA 0xFC 95 |
| 96#define NS_CLKRUN_PMESTS 0x00008000 97#define NS_CLKRUN_PMEENB 0x00000100 98#define NS_CLNRUN_CLKRUN_ENB 0x00000001 99 |
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| 95#define SIS_CSR_TX_ENABLE 0x00000001 96#define SIS_CSR_TX_DISABLE 0x00000002 97#define SIS_CSR_RX_ENABLE 0x00000004 98#define SIS_CSR_RX_DISABLE 0x00000008 99#define SIS_CSR_TX_RESET 0x00000010 100#define SIS_CSR_RX_RESET 0x00000020 101#define SIS_CSR_SOFTINTR 0x00000080 102#define SIS_CSR_RESET 0x00000100 --- 358 unchanged lines hidden --- | 100#define SIS_CSR_TX_ENABLE 0x00000001 101#define SIS_CSR_TX_DISABLE 0x00000002 102#define SIS_CSR_RX_ENABLE 0x00000004 103#define SIS_CSR_RX_DISABLE 0x00000008 104#define SIS_CSR_TX_RESET 0x00000010 105#define SIS_CSR_RX_RESET 0x00000020 106#define SIS_CSR_SOFTINTR 0x00000080 107#define SIS_CSR_RESET 0x00000100 --- 358 unchanged lines hidden --- |