1/*-
2 * Copyright (c) 2010-2011 Solarflare Communications, Inc.
3 * All rights reserved.
4 *
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30/* Theory of operation:
31 *
32 * Tx queues allocation and mapping
33 *
34 * One Tx queue with enabled checksum offload is allocated per Rx channel
35 * (event queue). Also 2 Tx queues (one without checksum offload and one
36 * with IP checksum offload only) are allocated and bound to event queue 0.
37 * sfxge_txq_type is used as Tx queue label.
38 *
39 * So, event queue plus label mapping to Tx queue index is:
40 * if event queue index is 0, TxQ-index = TxQ-label * [0..SFXGE_TXQ_NTYPES)
41 * else TxQ-index = SFXGE_TXQ_NTYPES + EvQ-index - 1
42 * See sfxge_get_txq_by_label() sfxge_ev.c
43 */
44
45#include <sys/cdefs.h>
46__FBSDID("$FreeBSD: stable/10/sys/dev/sfxge/sfxge_tx.c 280592 2015-03-25 13:14:50Z arybchik $");
47
48#include <sys/types.h>
49#include <sys/mbuf.h>
50#include <sys/smp.h>
51#include <sys/socket.h>
52#include <sys/sysctl.h>
53#include <sys/syslog.h>
54
55#include <net/bpf.h>
56#include <net/ethernet.h>
57#include <net/if.h>
58#include <net/if_vlan_var.h>
59
60#include <netinet/in.h>
61#include <netinet/ip.h>
62#include <netinet/ip6.h>
63#include <netinet/tcp.h>
64
65#include "common/efx.h"
66
67#include "sfxge.h"
68#include "sfxge_tx.h"
69
70/*
71 * Estimate maximum number of Tx descriptors required for TSO packet.
72 * With minimum MSS and maximum mbuf length we might need more (even
73 * than a ring-ful of descriptors), but this should not happen in
74 * practice except due to deliberate attack. In that case we will
75 * truncate the output at a packet boundary.
76 */
77#define SFXGE_TSO_MAX_DESC \
78 (SFXGE_TSO_MAX_SEGS * 2 + SFXGE_TX_MAPPING_MAX_SEG - 1)
79
80/*
81 * Set the block level to ensure there is space to generate a
82 * large number of descriptors for TSO.
83 */
84#define SFXGE_TXQ_BLOCK_LEVEL(_entries) \
85 (EFX_TXQ_LIMIT(_entries) - SFXGE_TSO_MAX_DESC)
86
87#ifdef SFXGE_HAVE_MQ
88
89#define SFXGE_PARAM_TX_DPL_GET_MAX SFXGE_PARAM(tx_dpl_get_max)
90static int sfxge_tx_dpl_get_max = SFXGE_TX_DPL_GET_PKT_LIMIT_DEFAULT;
91TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_MAX, &sfxge_tx_dpl_get_max);
92SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_max, CTLFLAG_RDTUN,
93 &sfxge_tx_dpl_get_max, 0,
94 "Maximum number of any packets in deferred packet get-list");
95
96#define SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX \
97 SFXGE_PARAM(tx_dpl_get_non_tcp_max)
98static int sfxge_tx_dpl_get_non_tcp_max =
99 SFXGE_TX_DPL_GET_NON_TCP_PKT_LIMIT_DEFAULT;
100TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX, &sfxge_tx_dpl_get_non_tcp_max);
101SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_non_tcp_max, CTLFLAG_RDTUN,
102 &sfxge_tx_dpl_get_non_tcp_max, 0,
103 "Maximum number of non-TCP packets in deferred packet get-list");
104
105#define SFXGE_PARAM_TX_DPL_PUT_MAX SFXGE_PARAM(tx_dpl_put_max)
106static int sfxge_tx_dpl_put_max = SFXGE_TX_DPL_PUT_PKT_LIMIT_DEFAULT;
107TUNABLE_INT(SFXGE_PARAM_TX_DPL_PUT_MAX, &sfxge_tx_dpl_put_max);
108SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_put_max, CTLFLAG_RDTUN,
109 &sfxge_tx_dpl_put_max, 0,
110 "Maximum number of any packets in deferred packet put-list");
111
112#endif
113
114
115/* Forward declarations. */
116static void sfxge_tx_qdpl_service(struct sfxge_txq *txq);
117static void sfxge_tx_qlist_post(struct sfxge_txq *txq);
118static void sfxge_tx_qunblock(struct sfxge_txq *txq);
119static int sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf,
120 const bus_dma_segment_t *dma_seg, int n_dma_seg);
121
122void
123sfxge_tx_qcomplete(struct sfxge_txq *txq, struct sfxge_evq *evq)
124{
125 unsigned int completed;
126
127 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq);
128
129 completed = txq->completed;
130 while (completed != txq->pending) {
131 struct sfxge_tx_mapping *stmp;
132 unsigned int id;
133
134 id = completed++ & txq->ptr_mask;
135
136 stmp = &txq->stmp[id];
137 if (stmp->flags & TX_BUF_UNMAP) {
138 bus_dmamap_unload(txq->packet_dma_tag, stmp->map);
139 if (stmp->flags & TX_BUF_MBUF) {
140 struct mbuf *m = stmp->u.mbuf;
141 do
142 m = m_free(m);
143 while (m != NULL);
144 } else {
145 free(stmp->u.heap_buf, M_SFXGE);
146 }
147 stmp->flags = 0;
148 }
149 }
150 txq->completed = completed;
151
152 /* Check whether we need to unblock the queue. */
153 mb();
154 if (txq->blocked) {
155 unsigned int level;
156
157 level = txq->added - txq->completed;
158 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries))
159 sfxge_tx_qunblock(txq);
160 }
161}
162
163#ifdef SFXGE_HAVE_MQ
164
165static unsigned int
166sfxge_is_mbuf_non_tcp(struct mbuf *mbuf)
167{
168 /* Absense of TCP checksum flags does not mean that it is non-TCP
169 * but it should be true if user wants to achieve high throughput.
170 */
171 return (!(mbuf->m_pkthdr.csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP)));
172}
173
174/*
175 * Reorder the put list and append it to the get list.
176 */
177static void
178sfxge_tx_qdpl_swizzle(struct sfxge_txq *txq)
179{
180 struct sfxge_tx_dpl *stdp;
181 struct mbuf *mbuf, *get_next, **get_tailp;
182 volatile uintptr_t *putp;
183 uintptr_t put;
184 unsigned int count;
185 unsigned int non_tcp_count;
186
187 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
188
189 stdp = &txq->dpl;
190
191 /* Acquire the put list. */
192 putp = &stdp->std_put;
193 put = atomic_readandclear_ptr(putp);
194 mbuf = (void *)put;
195
196 if (mbuf == NULL)
197 return;
198
199 /* Reverse the put list. */
200 get_tailp = &mbuf->m_nextpkt;
201 get_next = NULL;
202
203 count = 0;
204 non_tcp_count = 0;
205 do {
206 struct mbuf *put_next;
207
208 non_tcp_count += sfxge_is_mbuf_non_tcp(mbuf);
209 put_next = mbuf->m_nextpkt;
210 mbuf->m_nextpkt = get_next;
211 get_next = mbuf;
212 mbuf = put_next;
213
214 count++;
215 } while (mbuf != NULL);
216
217 if (count > stdp->std_put_hiwat)
218 stdp->std_put_hiwat = count;
219
220 /* Append the reversed put list to the get list. */
221 KASSERT(*get_tailp == NULL, ("*get_tailp != NULL"));
222 *stdp->std_getp = get_next;
223 stdp->std_getp = get_tailp;
224 stdp->std_get_count += count;
225 stdp->std_get_non_tcp_count += non_tcp_count;
226}
227
228#endif /* SFXGE_HAVE_MQ */
229
230static void
231sfxge_tx_qreap(struct sfxge_txq *txq)
232{
233 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
234
235 txq->reaped = txq->completed;
236}
237
238static void
239sfxge_tx_qlist_post(struct sfxge_txq *txq)
240{
241 unsigned int old_added;
242 unsigned int level;
243 int rc;
244
245 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
246
247 KASSERT(txq->n_pend_desc != 0, ("txq->n_pend_desc == 0"));
248 KASSERT(txq->n_pend_desc <= SFXGE_TSO_MAX_DESC,
249 ("txq->n_pend_desc too large"));
250 KASSERT(!txq->blocked, ("txq->blocked"));
251
252 old_added = txq->added;
253
254 /* Post the fragment list. */
255 rc = efx_tx_qpost(txq->common, txq->pend_desc, txq->n_pend_desc,
256 txq->reaped, &txq->added);
257 KASSERT(rc == 0, ("efx_tx_qpost() failed"));
258
259 /* If efx_tx_qpost() had to refragment, our information about
260 * buffers to free may be associated with the wrong
261 * descriptors.
262 */
263 KASSERT(txq->added - old_added == txq->n_pend_desc,
264 ("efx_tx_qpost() refragmented descriptors"));
265
266 level = txq->added - txq->reaped;
267 KASSERT(level <= txq->entries, ("overfilled TX queue"));
268
269 /* Clear the fragment list. */
270 txq->n_pend_desc = 0;
271
272 /* Have we reached the block level? */
273 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries))
274 return;
275
276 /* Reap, and check again */
277 sfxge_tx_qreap(txq);
278 level = txq->added - txq->reaped;
279 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries))
280 return;
281
282 txq->blocked = 1;
283
284 /*
285 * Avoid a race with completion interrupt handling that could leave
286 * the queue blocked.
287 */
288 mb();
289 sfxge_tx_qreap(txq);
290 level = txq->added - txq->reaped;
291 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries)) {
292 mb();
293 txq->blocked = 0;
294 }
295}
296
297static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq, struct mbuf *mbuf)
298{
299 bus_dmamap_t *used_map;
300 bus_dmamap_t map;
301 bus_dma_segment_t dma_seg[SFXGE_TX_MAPPING_MAX_SEG];
302 unsigned int id;
303 struct sfxge_tx_mapping *stmp;
304 efx_buffer_t *desc;
305 int n_dma_seg;
306 int rc;
307 int i;
308
309 KASSERT(!txq->blocked, ("txq->blocked"));
310
311 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO)
312 prefetch_read_many(mbuf->m_data);
313
314 if (txq->init_state != SFXGE_TXQ_STARTED) {
315 rc = EINTR;
316 goto reject;
317 }
318
319 /* Load the packet for DMA. */
320 id = txq->added & txq->ptr_mask;
321 stmp = &txq->stmp[id];
322 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag, stmp->map,
323 mbuf, dma_seg, &n_dma_seg, 0);
324 if (rc == EFBIG) {
325 /* Try again. */
326 struct mbuf *new_mbuf = m_collapse(mbuf, M_NOWAIT,
327 SFXGE_TX_MAPPING_MAX_SEG);
328 if (new_mbuf == NULL)
329 goto reject;
330 ++txq->collapses;
331 mbuf = new_mbuf;
332 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag,
333 stmp->map, mbuf,
334 dma_seg, &n_dma_seg, 0);
335 }
336 if (rc != 0)
337 goto reject;
338
339 /* Make the packet visible to the hardware. */
340 bus_dmamap_sync(txq->packet_dma_tag, stmp->map, BUS_DMASYNC_PREWRITE);
341
342 used_map = &stmp->map;
343
344 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO) {
345 rc = sfxge_tx_queue_tso(txq, mbuf, dma_seg, n_dma_seg);
346 if (rc < 0)
347 goto reject_mapped;
348 stmp = &txq->stmp[rc];
349 } else {
350 /* Add the mapping to the fragment list, and set flags
351 * for the buffer.
352 */
353 i = 0;
354 for (;;) {
355 desc = &txq->pend_desc[i];
356 desc->eb_addr = dma_seg[i].ds_addr;
357 desc->eb_size = dma_seg[i].ds_len;
358 if (i == n_dma_seg - 1) {
359 desc->eb_eop = 1;
360 break;
361 }
362 desc->eb_eop = 0;
363 i++;
364
365 stmp->flags = 0;
366 if (__predict_false(stmp ==
367 &txq->stmp[txq->ptr_mask]))
368 stmp = &txq->stmp[0];
369 else
370 stmp++;
371 }
372 txq->n_pend_desc = n_dma_seg;
373 }
374
375 /*
376 * If the mapping required more than one descriptor
377 * then we need to associate the DMA map with the last
378 * descriptor, not the first.
379 */
380 if (used_map != &stmp->map) {
381 map = stmp->map;
382 stmp->map = *used_map;
383 *used_map = map;
384 }
385
386 stmp->u.mbuf = mbuf;
387 stmp->flags = TX_BUF_UNMAP | TX_BUF_MBUF;
388
389 /* Post the fragment list. */
390 sfxge_tx_qlist_post(txq);
391
392 return (0);
393
394reject_mapped:
395 bus_dmamap_unload(txq->packet_dma_tag, *used_map);
396reject:
397 /* Drop the packet on the floor. */
398 m_freem(mbuf);
399 ++txq->drops;
400
401 return (rc);
402}
403
404#ifdef SFXGE_HAVE_MQ
405
406/*
407 * Drain the deferred packet list into the transmit queue.
408 */
409static void
410sfxge_tx_qdpl_drain(struct sfxge_txq *txq)
411{
412 struct sfxge_softc *sc;
413 struct sfxge_tx_dpl *stdp;
414 struct mbuf *mbuf, *next;
415 unsigned int count;
416 unsigned int non_tcp_count;
417 unsigned int pushed;
418 int rc;
419
420 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
421
422 sc = txq->sc;
423 stdp = &txq->dpl;
424 pushed = txq->added;
425
426 prefetch_read_many(sc->enp);
427 prefetch_read_many(txq->common);
428
429 mbuf = stdp->std_get;
430 count = stdp->std_get_count;
431 non_tcp_count = stdp->std_get_non_tcp_count;
432
433 if (count > stdp->std_get_hiwat)
434 stdp->std_get_hiwat = count;
435
436 while (count != 0) {
437 KASSERT(mbuf != NULL, ("mbuf == NULL"));
438
439 next = mbuf->m_nextpkt;
440 mbuf->m_nextpkt = NULL;
441
442 ETHER_BPF_MTAP(sc->ifnet, mbuf); /* packet capture */
443
444 if (next != NULL)
445 prefetch_read_many(next);
446
447 rc = sfxge_tx_queue_mbuf(txq, mbuf);
448 --count;
449 non_tcp_count -= sfxge_is_mbuf_non_tcp(mbuf);
450 mbuf = next;
451 if (rc != 0)
452 continue;
453
454 if (txq->blocked)
455 break;
456
457 /* Push the fragments to the hardware in batches. */
458 if (txq->added - pushed >= SFXGE_TX_BATCH) {
459 efx_tx_qpush(txq->common, txq->added);
460 pushed = txq->added;
461 }
462 }
463
464 if (count == 0) {
465 KASSERT(mbuf == NULL, ("mbuf != NULL"));
466 KASSERT(non_tcp_count == 0,
467 ("inconsistent TCP/non-TCP detection"));
468 stdp->std_get = NULL;
469 stdp->std_get_count = 0;
470 stdp->std_get_non_tcp_count = 0;
471 stdp->std_getp = &stdp->std_get;
472 } else {
473 stdp->std_get = mbuf;
474 stdp->std_get_count = count;
475 stdp->std_get_non_tcp_count = non_tcp_count;
476 }
477
478 if (txq->added != pushed)
479 efx_tx_qpush(txq->common, txq->added);
480
481 KASSERT(txq->blocked || stdp->std_get_count == 0,
482 ("queue unblocked but count is non-zero"));
483}
484
485#define SFXGE_TX_QDPL_PENDING(_txq) \
486 ((_txq)->dpl.std_put != 0)
487
488/*
489 * Service the deferred packet list.
490 *
491 * NOTE: drops the txq mutex!
492 */
493static void
494sfxge_tx_qdpl_service(struct sfxge_txq *txq)
495{
496 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
497
498 do {
499 if (SFXGE_TX_QDPL_PENDING(txq))
500 sfxge_tx_qdpl_swizzle(txq);
501
502 if (!txq->blocked)
503 sfxge_tx_qdpl_drain(txq);
504
505 SFXGE_TXQ_UNLOCK(txq);
506 } while (SFXGE_TX_QDPL_PENDING(txq) &&
507 SFXGE_TXQ_TRYLOCK(txq));
508}
509
510/*
511 * Put a packet on the deferred packet list.
512 *
513 * If we are called with the txq lock held, we put the packet on the "get
514 * list", otherwise we atomically push it on the "put list". The swizzle
515 * function takes care of ordering.
516 *
517 * The length of the put list is bounded by SFXGE_TX_MAX_DEFERRED. We
518 * overload the csum_data field in the mbuf to keep track of this length
519 * because there is no cheap alternative to avoid races.
520 */
521static int
522sfxge_tx_qdpl_put(struct sfxge_txq *txq, struct mbuf *mbuf, int locked)
523{
524 struct sfxge_tx_dpl *stdp;
525
526 stdp = &txq->dpl;
527
528 KASSERT(mbuf->m_nextpkt == NULL, ("mbuf->m_nextpkt != NULL"));
529
530 if (locked) {
531 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
532
533 sfxge_tx_qdpl_swizzle(txq);
534
535 if (stdp->std_get_count >= stdp->std_get_max) {
536 txq->get_overflow++;
537 return (ENOBUFS);
538 }
539 if (sfxge_is_mbuf_non_tcp(mbuf)) {
540 if (stdp->std_get_non_tcp_count >=
541 stdp->std_get_non_tcp_max) {
542 txq->get_non_tcp_overflow++;
543 return (ENOBUFS);
544 }
545 stdp->std_get_non_tcp_count++;
546 }
547
548 *(stdp->std_getp) = mbuf;
549 stdp->std_getp = &mbuf->m_nextpkt;
550 stdp->std_get_count++;
551 } else {
552 volatile uintptr_t *putp;
553 uintptr_t old;
554 uintptr_t new;
555 unsigned old_len;
556
557 putp = &stdp->std_put;
558 new = (uintptr_t)mbuf;
559
560 do {
561 old = *putp;
562 if (old != 0) {
563 struct mbuf *mp = (struct mbuf *)old;
564 old_len = mp->m_pkthdr.csum_data;
565 } else
566 old_len = 0;
567 if (old_len >= stdp->std_put_max) {
568 atomic_add_long(&txq->put_overflow, 1);
569 return (ENOBUFS);
570 }
571 mbuf->m_pkthdr.csum_data = old_len + 1;
572 mbuf->m_nextpkt = (void *)old;
573 } while (atomic_cmpset_ptr(putp, old, new) == 0);
574 }
575
576 return (0);
577}
578
579/*
580 * Called from if_transmit - will try to grab the txq lock and enqueue to the
581 * put list if it succeeds, otherwise try to push onto the defer list if space.
582 */
583int
584sfxge_tx_packet_add(struct sfxge_txq *txq, struct mbuf *m)
585{
586 int locked;
587 int rc;
588
589 if (!SFXGE_LINK_UP(txq->sc)) {
590 rc = ENETDOWN;
591 atomic_add_long(&txq->netdown_drops, 1);
592 goto fail;
593 }
594
595 /*
596 * Try to grab the txq lock. If we are able to get the lock,
597 * the packet will be appended to the "get list" of the deferred
598 * packet list. Otherwise, it will be pushed on the "put list".
599 */
600 locked = SFXGE_TXQ_TRYLOCK(txq);
601
602 if (sfxge_tx_qdpl_put(txq, m, locked) != 0) {
603 if (locked)
604 SFXGE_TXQ_UNLOCK(txq);
605 rc = ENOBUFS;
606 goto fail;
607 }
608
609 /*
610 * Try to grab the lock again.
611 *
612 * If we are able to get the lock, we need to process the deferred
613 * packet list. If we are not able to get the lock, another thread
614 * is processing the list.
615 */
616 if (!locked)
617 locked = SFXGE_TXQ_TRYLOCK(txq);
618
619 if (locked) {
620 /* Try to service the list. */
621 sfxge_tx_qdpl_service(txq);
622 /* Lock has been dropped. */
623 }
624
625 return (0);
626
627fail:
628 m_freem(m);
629 return (rc);
630}
631
632static void
633sfxge_tx_qdpl_flush(struct sfxge_txq *txq)
634{
635 struct sfxge_tx_dpl *stdp = &txq->dpl;
636 struct mbuf *mbuf, *next;
637
638 SFXGE_TXQ_LOCK(txq);
639
640 sfxge_tx_qdpl_swizzle(txq);
641 for (mbuf = stdp->std_get; mbuf != NULL; mbuf = next) {
642 next = mbuf->m_nextpkt;
643 m_freem(mbuf);
644 }
645 stdp->std_get = NULL;
646 stdp->std_get_count = 0;
647 stdp->std_get_non_tcp_count = 0;
648 stdp->std_getp = &stdp->std_get;
649
650 SFXGE_TXQ_UNLOCK(txq);
651}
652
653void
654sfxge_if_qflush(struct ifnet *ifp)
655{
656 struct sfxge_softc *sc;
657 int i;
658
659 sc = ifp->if_softc;
660
661 for (i = 0; i < sc->txq_count; i++)
662 sfxge_tx_qdpl_flush(sc->txq[i]);
663}
664
665/*
666 * TX start -- called by the stack.
667 */
668int
669sfxge_if_transmit(struct ifnet *ifp, struct mbuf *m)
670{
671 struct sfxge_softc *sc;
672 struct sfxge_txq *txq;
673 int rc;
674
675 sc = (struct sfxge_softc *)ifp->if_softc;
676
677 KASSERT(ifp->if_flags & IFF_UP, ("interface not up"));
678
679 /* Pick the desired transmit queue. */
680 if (m->m_pkthdr.csum_flags & (CSUM_DELAY_DATA | CSUM_TSO)) {
681 int index = 0;
682
683 if (m->m_flags & M_FLOWID) {
684 uint32_t hash = m->m_pkthdr.flowid;
685
686 index = sc->rx_indir_table[hash % SFXGE_RX_SCALE_MAX];
687 }
688 txq = sc->txq[SFXGE_TXQ_IP_TCP_UDP_CKSUM + index];
689 } else if (m->m_pkthdr.csum_flags & CSUM_DELAY_IP) {
690 txq = sc->txq[SFXGE_TXQ_IP_CKSUM];
691 } else {
692 txq = sc->txq[SFXGE_TXQ_NON_CKSUM];
693 }
694
695 rc = sfxge_tx_packet_add(txq, m);
696
697 return (rc);
698}
699
700#else /* !SFXGE_HAVE_MQ */
701
702static void sfxge_if_start_locked(struct ifnet *ifp)
703{
704 struct sfxge_softc *sc = ifp->if_softc;
705 struct sfxge_txq *txq;
706 struct mbuf *mbuf;
707 unsigned int pushed[SFXGE_TXQ_NTYPES];
708 unsigned int q_index;
709
710 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) !=
711 IFF_DRV_RUNNING)
712 return;
713
714 if (!sc->port.link_up)
715 return;
716
717 for (q_index = 0; q_index < SFXGE_TXQ_NTYPES; q_index++) {
718 txq = sc->txq[q_index];
719 pushed[q_index] = txq->added;
720 }
721
722 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
723 IFQ_DRV_DEQUEUE(&ifp->if_snd, mbuf);
724 if (mbuf == NULL)
725 break;
726
727 ETHER_BPF_MTAP(ifp, mbuf); /* packet capture */
728
729 /* Pick the desired transmit queue. */
730 if (mbuf->m_pkthdr.csum_flags & (CSUM_DELAY_DATA | CSUM_TSO))
731 q_index = SFXGE_TXQ_IP_TCP_UDP_CKSUM;
732 else if (mbuf->m_pkthdr.csum_flags & CSUM_DELAY_IP)
733 q_index = SFXGE_TXQ_IP_CKSUM;
734 else
735 q_index = SFXGE_TXQ_NON_CKSUM;
736 txq = sc->txq[q_index];
737
738 if (sfxge_tx_queue_mbuf(txq, mbuf) != 0)
739 continue;
740
741 if (txq->blocked) {
742 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
743 break;
744 }
745
746 /* Push the fragments to the hardware in batches. */
747 if (txq->added - pushed[q_index] >= SFXGE_TX_BATCH) {
748 efx_tx_qpush(txq->common, txq->added);
749 pushed[q_index] = txq->added;
750 }
751 }
752
753 for (q_index = 0; q_index < SFXGE_TXQ_NTYPES; q_index++) {
754 txq = sc->txq[q_index];
755 if (txq->added != pushed[q_index])
756 efx_tx_qpush(txq->common, txq->added);
757 }
758}
759
760void sfxge_if_start(struct ifnet *ifp)
761{
762 struct sfxge_softc *sc = ifp->if_softc;
763
764 SFXGE_TXQ_LOCK(sc->txq[0]);
765 sfxge_if_start_locked(ifp);
766 SFXGE_TXQ_UNLOCK(sc->txq[0]);
767}
768
769static void
770sfxge_tx_qdpl_service(struct sfxge_txq *txq)
771{
772 struct ifnet *ifp = txq->sc->ifnet;
773
774 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
775 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
776 sfxge_if_start_locked(ifp);
777 SFXGE_TXQ_UNLOCK(txq);
778}
779
780#endif /* SFXGE_HAVE_MQ */
781
782/*
783 * Software "TSO". Not quite as good as doing it in hardware, but
784 * still faster than segmenting in the stack.
785 */
786
787struct sfxge_tso_state {
788 /* Output position */
789 unsigned out_len; /* Remaining length in current segment */
790 unsigned seqnum; /* Current sequence number */
791 unsigned packet_space; /* Remaining space in current packet */
792
793 /* Input position */
794 uint64_t dma_addr; /* DMA address of current position */
795 unsigned in_len; /* Remaining length in current mbuf */
796
797 const struct mbuf *mbuf; /* Input mbuf (head of chain) */
798 u_short protocol; /* Network protocol (after VLAN decap) */
799 ssize_t nh_off; /* Offset of network header */
800 ssize_t tcph_off; /* Offset of TCP header */
801 unsigned header_len; /* Number of bytes of header */
802 unsigned seg_size; /* TCP segment size */
803};
804
805static const struct ip *tso_iph(const struct sfxge_tso_state *tso)
806{
807 KASSERT(tso->protocol == htons(ETHERTYPE_IP),
808 ("tso_iph() in non-IPv4 state"));
809 return (const struct ip *)(tso->mbuf->m_data + tso->nh_off);
810}
811static __unused const struct ip6_hdr *tso_ip6h(const struct sfxge_tso_state *tso)
812{
813 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6),
814 ("tso_ip6h() in non-IPv6 state"));
815 return (const struct ip6_hdr *)(tso->mbuf->m_data + tso->nh_off);
816}
817static const struct tcphdr *tso_tcph(const struct sfxge_tso_state *tso)
818{
819 return (const struct tcphdr *)(tso->mbuf->m_data + tso->tcph_off);
820}
821
822/* Size of preallocated TSO header buffers. Larger blocks must be
823 * allocated from the heap.
824 */
825#define TSOH_STD_SIZE 128
826
827/* At most half the descriptors in the queue at any time will refer to
828 * a TSO header buffer, since they must always be followed by a
829 * payload descriptor referring to an mbuf.
830 */
831#define TSOH_COUNT(_txq_entries) ((_txq_entries) / 2u)
832#define TSOH_PER_PAGE (PAGE_SIZE / TSOH_STD_SIZE)
833#define TSOH_PAGE_COUNT(_txq_entries) \
834 ((TSOH_COUNT(_txq_entries) + TSOH_PER_PAGE - 1) / TSOH_PER_PAGE)
835
836static int tso_init(struct sfxge_txq *txq)
837{
838 struct sfxge_softc *sc = txq->sc;
839 unsigned int tsoh_page_count = TSOH_PAGE_COUNT(sc->txq_entries);
840 int i, rc;
841
842 /* Allocate TSO header buffers */
843 txq->tsoh_buffer = malloc(tsoh_page_count * sizeof(txq->tsoh_buffer[0]),
844 M_SFXGE, M_WAITOK);
845
846 for (i = 0; i < tsoh_page_count; i++) {
847 rc = sfxge_dma_alloc(sc, PAGE_SIZE, &txq->tsoh_buffer[i]);
848 if (rc != 0)
849 goto fail;
850 }
851
852 return (0);
853
854fail:
855 while (i-- > 0)
856 sfxge_dma_free(&txq->tsoh_buffer[i]);
857 free(txq->tsoh_buffer, M_SFXGE);
858 txq->tsoh_buffer = NULL;
859 return (rc);
860}
861
862static void tso_fini(struct sfxge_txq *txq)
863{
864 int i;
865
866 if (txq->tsoh_buffer != NULL) {
867 for (i = 0; i < TSOH_PAGE_COUNT(txq->sc->txq_entries); i++)
868 sfxge_dma_free(&txq->tsoh_buffer[i]);
869 free(txq->tsoh_buffer, M_SFXGE);
870 }
871}
872
873static void tso_start(struct sfxge_tso_state *tso, struct mbuf *mbuf)
874{
875 struct ether_header *eh = mtod(mbuf, struct ether_header *);
876 const struct tcphdr *th;
877 struct tcphdr th_copy;
878
879 tso->mbuf = mbuf;
880
881 /* Find network protocol and header */
882 tso->protocol = eh->ether_type;
883 if (tso->protocol == htons(ETHERTYPE_VLAN)) {
884 struct ether_vlan_header *veh =
885 mtod(mbuf, struct ether_vlan_header *);
886 tso->protocol = veh->evl_proto;
887 tso->nh_off = sizeof(*veh);
888 } else {
889 tso->nh_off = sizeof(*eh);
890 }
891
892 /* Find TCP header */
893 if (tso->protocol == htons(ETHERTYPE_IP)) {
894 KASSERT(tso_iph(tso)->ip_p == IPPROTO_TCP,
895 ("TSO required on non-TCP packet"));
896 tso->tcph_off = tso->nh_off + 4 * tso_iph(tso)->ip_hl;
897 } else {
898 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6),
899 ("TSO required on non-IP packet"));
900 KASSERT(tso_ip6h(tso)->ip6_nxt == IPPROTO_TCP,
901 ("TSO required on non-TCP packet"));
902 tso->tcph_off = tso->nh_off + sizeof(struct ip6_hdr);
903 }
904
905 KASSERT(mbuf->m_len >= tso->tcph_off,
906 ("network header is fragmented in mbuf"));
907 /* We need TCP header including flags (window is the next) */
908 if (mbuf->m_len < tso->tcph_off + offsetof(struct tcphdr, th_win)) {
909 m_copydata(tso->mbuf, tso->tcph_off, sizeof(th_copy),
910 (caddr_t)&th_copy);
911 th = &th_copy;
912 } else {
913 th = tso_tcph(tso);
914 }
915
916 tso->header_len = tso->tcph_off + 4 * th->th_off;
917 tso->seg_size = mbuf->m_pkthdr.tso_segsz;
918
919 tso->seqnum = ntohl(th->th_seq);
920
921 /* These flags must not be duplicated */
922 KASSERT(!(th->th_flags & (TH_URG | TH_SYN | TH_RST)),
923 ("incompatible TCP flag on TSO packet"));
924
925 tso->out_len = mbuf->m_pkthdr.len - tso->header_len;
926}
927
928/*
929 * tso_fill_packet_with_fragment - form descriptors for the current fragment
930 *
931 * Form descriptors for the current fragment, until we reach the end
932 * of fragment or end-of-packet. Return 0 on success, 1 if not enough
933 * space.
934 */
935static void tso_fill_packet_with_fragment(struct sfxge_txq *txq,
936 struct sfxge_tso_state *tso)
937{
938 efx_buffer_t *desc;
939 int n;
940
941 if (tso->in_len == 0 || tso->packet_space == 0)
942 return;
943
944 KASSERT(tso->in_len > 0, ("TSO input length went negative"));
945 KASSERT(tso->packet_space > 0, ("TSO packet space went negative"));
946
947 n = min(tso->in_len, tso->packet_space);
948
949 tso->packet_space -= n;
950 tso->out_len -= n;
951 tso->in_len -= n;
952
953 desc = &txq->pend_desc[txq->n_pend_desc++];
954 desc->eb_addr = tso->dma_addr;
955 desc->eb_size = n;
956 desc->eb_eop = tso->out_len == 0 || tso->packet_space == 0;
957
958 tso->dma_addr += n;
959}
960
961/* Callback from bus_dmamap_load() for long TSO headers. */
962static void tso_map_long_header(void *dma_addr_ret,
963 bus_dma_segment_t *segs, int nseg,
964 int error)
965{
966 *(uint64_t *)dma_addr_ret = ((__predict_true(error == 0) &&
967 __predict_true(nseg == 1)) ?
968 segs->ds_addr : 0);
969}
970
971/*
972 * tso_start_new_packet - generate a new header and prepare for the new packet
973 *
974 * Generate a new header and prepare for the new packet. Return 0 on
975 * success, or an error code if failed to alloc header.
976 */
977static int tso_start_new_packet(struct sfxge_txq *txq,
978 struct sfxge_tso_state *tso,
979 unsigned int id)
980{
981 struct sfxge_tx_mapping *stmp = &txq->stmp[id];
982 struct tcphdr *tsoh_th;
983 unsigned ip_length;
984 caddr_t header;
985 uint64_t dma_addr;
986 bus_dmamap_t map;
987 efx_buffer_t *desc;
988 int rc;
989
990 /* Allocate a DMA-mapped header buffer. */
991 if (__predict_true(tso->header_len <= TSOH_STD_SIZE)) {
992 unsigned int page_index = (id / 2) / TSOH_PER_PAGE;
993 unsigned int buf_index = (id / 2) % TSOH_PER_PAGE;
994
995 header = (txq->tsoh_buffer[page_index].esm_base +
996 buf_index * TSOH_STD_SIZE);
997 dma_addr = (txq->tsoh_buffer[page_index].esm_addr +
998 buf_index * TSOH_STD_SIZE);
999 map = txq->tsoh_buffer[page_index].esm_map;
1000
1001 stmp->flags = 0;
1002 } else {
1003 /* We cannot use bus_dmamem_alloc() as that may sleep */
1004 header = malloc(tso->header_len, M_SFXGE, M_NOWAIT);
1005 if (__predict_false(!header))
1006 return (ENOMEM);
1007 rc = bus_dmamap_load(txq->packet_dma_tag, stmp->map,
1008 header, tso->header_len,
1009 tso_map_long_header, &dma_addr,
1010 BUS_DMA_NOWAIT);
1011 if (__predict_false(dma_addr == 0)) {
1012 if (rc == 0) {
1013 /* Succeeded but got >1 segment */
1014 bus_dmamap_unload(txq->packet_dma_tag,
1015 stmp->map);
1016 rc = EINVAL;
1017 }
1018 free(header, M_SFXGE);
1019 return (rc);
1020 }
1021 map = stmp->map;
1022
1023 txq->tso_long_headers++;
1024 stmp->u.heap_buf = header;
1025 stmp->flags = TX_BUF_UNMAP;
1026 }
1027
1028 tsoh_th = (struct tcphdr *)(header + tso->tcph_off);
1029
1030 /* Copy and update the headers. */
1031 m_copydata(tso->mbuf, 0, tso->header_len, header);
1032
1033 tsoh_th->th_seq = htonl(tso->seqnum);
1034 tso->seqnum += tso->seg_size;
1035 if (tso->out_len > tso->seg_size) {
1036 /* This packet will not finish the TSO burst. */
1037 ip_length = tso->header_len - tso->nh_off + tso->seg_size;
1038 tsoh_th->th_flags &= ~(TH_FIN | TH_PUSH);
1039 } else {
1040 /* This packet will be the last in the TSO burst. */
1041 ip_length = tso->header_len - tso->nh_off + tso->out_len;
1042 }
1043
1044 if (tso->protocol == htons(ETHERTYPE_IP)) {
1045 struct ip *tsoh_iph = (struct ip *)(header + tso->nh_off);
1046 tsoh_iph->ip_len = htons(ip_length);
1047 /* XXX We should increment ip_id, but FreeBSD doesn't
1048 * currently allocate extra IDs for multiple segments.
1049 */
1050 } else {
1051 struct ip6_hdr *tsoh_iph =
1052 (struct ip6_hdr *)(header + tso->nh_off);
1053 tsoh_iph->ip6_plen = htons(ip_length - sizeof(*tsoh_iph));
1054 }
1055
1056 /* Make the header visible to the hardware. */
1057 bus_dmamap_sync(txq->packet_dma_tag, map, BUS_DMASYNC_PREWRITE);
1058
1059 tso->packet_space = tso->seg_size;
1060 txq->tso_packets++;
1061
1062 /* Form a descriptor for this header. */
1063 desc = &txq->pend_desc[txq->n_pend_desc++];
1064 desc->eb_addr = dma_addr;
1065 desc->eb_size = tso->header_len;
1066 desc->eb_eop = 0;
1067
1068 return (0);
1069}
1070
1071static int
1072sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf,
1073 const bus_dma_segment_t *dma_seg, int n_dma_seg)
1074{
1075 struct sfxge_tso_state tso;
1076 unsigned int id, next_id;
1077 unsigned skipped = 0;
1078
1079 tso_start(&tso, mbuf);
1080
1081 while (dma_seg->ds_len + skipped <= tso.header_len) {
1082 skipped += dma_seg->ds_len;
1083 --n_dma_seg;
1084 KASSERT(n_dma_seg, ("no payload found in TSO packet"));
1085 ++dma_seg;
1086 }
1087 tso.in_len = dma_seg->ds_len + (tso.header_len - skipped);
1088 tso.dma_addr = dma_seg->ds_addr + (tso.header_len - skipped);
1089
1090 id = txq->added & txq->ptr_mask;
1091 if (__predict_false(tso_start_new_packet(txq, &tso, id)))
1092 return (-1);
1093
1094 while (1) {
1095 id = (id + 1) & txq->ptr_mask;
1096 tso_fill_packet_with_fragment(txq, &tso);
1097
1098 /* Move onto the next fragment? */
1099 if (tso.in_len == 0) {
1100 --n_dma_seg;
1101 if (n_dma_seg == 0)
1102 break;
1103 ++dma_seg;
1104 tso.in_len = dma_seg->ds_len;
1105 tso.dma_addr = dma_seg->ds_addr;
1106 }
1107
1108 /* End of packet? */
1109 if (tso.packet_space == 0) {
1110 /* If the queue is now full due to tiny MSS,
1111 * or we can't create another header, discard
1112 * the remainder of the input mbuf but do not
1113 * roll back the work we have done.
1114 */
1115 if (txq->n_pend_desc + 1 /* header */ + n_dma_seg >
1116 SFXGE_TSO_MAX_DESC) {
1117 txq->tso_pdrop_too_many++;
1118 break;
1119 }
1120 next_id = (id + 1) & txq->ptr_mask;
1121 if (__predict_false(tso_start_new_packet(txq, &tso,
1122 next_id))) {
1123 txq->tso_pdrop_no_rsrc++;
1124 break;
1125 }
1126 id = next_id;
1127 }
1128 }
1129
1130 txq->tso_bursts++;
1131 return (id);
1132}
1133
1134static void
1135sfxge_tx_qunblock(struct sfxge_txq *txq)
1136{
1137 struct sfxge_softc *sc;
1138 struct sfxge_evq *evq;
1139
1140 sc = txq->sc;
1141 evq = sc->evq[txq->evq_index];
1142
1143 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq);
1144
1145 if (txq->init_state != SFXGE_TXQ_STARTED)
1146 return;
1147
1148 SFXGE_TXQ_LOCK(txq);
1149
1150 if (txq->blocked) {
1151 unsigned int level;
1152
1153 level = txq->added - txq->completed;
1154 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries)) {
1155 /* reaped must be in sync with blocked */
1156 sfxge_tx_qreap(txq);
1157 txq->blocked = 0;
1158 }
1159 }
1160
1161 sfxge_tx_qdpl_service(txq);
1162 /* note: lock has been dropped */
1163}
1164
1165void
1166sfxge_tx_qflush_done(struct sfxge_txq *txq)
1167{
1168
1169 txq->flush_state = SFXGE_FLUSH_DONE;
1170}
1171
1172static void
1173sfxge_tx_qstop(struct sfxge_softc *sc, unsigned int index)
1174{
1175 struct sfxge_txq *txq;
1176 struct sfxge_evq *evq;
1177 unsigned int count;
1178
1179 txq = sc->txq[index];
1180 evq = sc->evq[txq->evq_index];
1181
1182 SFXGE_TXQ_LOCK(txq);
1183
1184 KASSERT(txq->init_state == SFXGE_TXQ_STARTED,
1185 ("txq->init_state != SFXGE_TXQ_STARTED"));
1186
1187 txq->init_state = SFXGE_TXQ_INITIALIZED;
1188 txq->flush_state = SFXGE_FLUSH_PENDING;
1189
1190 /* Flush the transmit queue. */
1191 efx_tx_qflush(txq->common);
1192
1193 SFXGE_TXQ_UNLOCK(txq);
1194
1195 count = 0;
1196 do {
1197 /* Spin for 100ms. */
1198 DELAY(100000);
1199
1200 if (txq->flush_state != SFXGE_FLUSH_PENDING)
1201 break;
1202 } while (++count < 20);
1203
1204 SFXGE_EVQ_LOCK(evq);
1205 SFXGE_TXQ_LOCK(txq);
1206
1207 KASSERT(txq->flush_state != SFXGE_FLUSH_FAILED,
1208 ("txq->flush_state == SFXGE_FLUSH_FAILED"));
1209
1210 txq->flush_state = SFXGE_FLUSH_DONE;
1211
1212 txq->blocked = 0;
1213 txq->pending = txq->added;
1214
1215 sfxge_tx_qcomplete(txq, evq);
1216 KASSERT(txq->completed == txq->added,
1217 ("txq->completed != txq->added"));
1218
1219 sfxge_tx_qreap(txq);
1220 KASSERT(txq->reaped == txq->completed,
1221 ("txq->reaped != txq->completed"));
1222
1223 txq->added = 0;
1224 txq->pending = 0;
1225 txq->completed = 0;
1226 txq->reaped = 0;
1227
1228 /* Destroy the common code transmit queue. */
1229 efx_tx_qdestroy(txq->common);
1230 txq->common = NULL;
1231
1232 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id,
1233 EFX_TXQ_NBUFS(sc->txq_entries));
1234
1235 SFXGE_EVQ_UNLOCK(evq);
1236 SFXGE_TXQ_UNLOCK(txq);
1237}
1238
1239static int
1240sfxge_tx_qstart(struct sfxge_softc *sc, unsigned int index)
1241{
1242 struct sfxge_txq *txq;
1243 efsys_mem_t *esmp;
1244 uint16_t flags;
1245 struct sfxge_evq *evq;
1246 int rc;
1247
1248 txq = sc->txq[index];
1249 esmp = &txq->mem;
1250 evq = sc->evq[txq->evq_index];
1251
1252 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED,
1253 ("txq->init_state != SFXGE_TXQ_INITIALIZED"));
1254 KASSERT(evq->init_state == SFXGE_EVQ_STARTED,
1255 ("evq->init_state != SFXGE_EVQ_STARTED"));
1256
1257 /* Program the buffer table. */
1258 if ((rc = efx_sram_buf_tbl_set(sc->enp, txq->buf_base_id, esmp,
1259 EFX_TXQ_NBUFS(sc->txq_entries))) != 0)
1260 return (rc);
1261
1262 /* Determine the kind of queue we are creating. */
1263 switch (txq->type) {
1264 case SFXGE_TXQ_NON_CKSUM:
1265 flags = 0;
1266 break;
1267 case SFXGE_TXQ_IP_CKSUM:
1268 flags = EFX_CKSUM_IPV4;
1269 break;
1270 case SFXGE_TXQ_IP_TCP_UDP_CKSUM:
1271 flags = EFX_CKSUM_IPV4 | EFX_CKSUM_TCPUDP;
1272 break;
1273 default:
1274 KASSERT(0, ("Impossible TX queue"));
1275 flags = 0;
1276 break;
1277 }
1278
1279 /* Create the common code transmit queue. */
1280 if ((rc = efx_tx_qcreate(sc->enp, index, txq->type, esmp,
1281 sc->txq_entries, txq->buf_base_id, flags, evq->common,
1282 &txq->common)) != 0)
1283 goto fail;
1284
1285 SFXGE_TXQ_LOCK(txq);
1286
1287 /* Enable the transmit queue. */
1288 efx_tx_qenable(txq->common);
1289
1290 txq->init_state = SFXGE_TXQ_STARTED;
1291
1292 SFXGE_TXQ_UNLOCK(txq);
1293
1294 return (0);
1295
1296fail:
1297 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id,
1298 EFX_TXQ_NBUFS(sc->txq_entries));
1299 return (rc);
1300}
1301
1302void
1303sfxge_tx_stop(struct sfxge_softc *sc)
1304{
1305 int index;
1306
1307 index = sc->txq_count;
1308 while (--index >= 0)
1309 sfxge_tx_qstop(sc, index);
1310
1311 /* Tear down the transmit module */
1312 efx_tx_fini(sc->enp);
1313}
1314
1315int
1316sfxge_tx_start(struct sfxge_softc *sc)
1317{
1318 int index;
1319 int rc;
1320
1321 /* Initialize the common code transmit module. */
1322 if ((rc = efx_tx_init(sc->enp)) != 0)
1323 return (rc);
1324
1325 for (index = 0; index < sc->txq_count; index++) {
1326 if ((rc = sfxge_tx_qstart(sc, index)) != 0)
1327 goto fail;
1328 }
1329
1330 return (0);
1331
1332fail:
1333 while (--index >= 0)
1334 sfxge_tx_qstop(sc, index);
1335
1336 efx_tx_fini(sc->enp);
1337
1338 return (rc);
1339}
1340
1341/**
1342 * Destroy a transmit queue.
1343 */
1344static void
1345sfxge_tx_qfini(struct sfxge_softc *sc, unsigned int index)
1346{
1347 struct sfxge_txq *txq;
1348 unsigned int nmaps;
1349
1350 txq = sc->txq[index];
1351
1352 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED,
1353 ("txq->init_state != SFXGE_TXQ_INITIALIZED"));
1354
1355 if (txq->type == SFXGE_TXQ_IP_TCP_UDP_CKSUM)
1356 tso_fini(txq);
1357
1358 /* Free the context arrays. */
1359 free(txq->pend_desc, M_SFXGE);
1360 nmaps = sc->txq_entries;
1361 while (nmaps-- != 0)
1362 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map);
1363 free(txq->stmp, M_SFXGE);
1364
1365 /* Release DMA memory mapping. */
1366 sfxge_dma_free(&txq->mem);
1367
1368 sc->txq[index] = NULL;
1369
1370#ifdef SFXGE_HAVE_MQ
1371 SFXGE_TXQ_LOCK_DESTROY(txq);
1372#endif
1373
1374 free(txq, M_SFXGE);
1375}
1376
1377static int
1378sfxge_tx_qinit(struct sfxge_softc *sc, unsigned int txq_index,
1379 enum sfxge_txq_type type, unsigned int evq_index)
1380{
1381 char name[16];
1382 struct sysctl_oid *txq_node;
1383 struct sfxge_txq *txq;
1384 struct sfxge_evq *evq;
1385#ifdef SFXGE_HAVE_MQ
1386 struct sfxge_tx_dpl *stdp;
1387#endif
1388 efsys_mem_t *esmp;
1389 unsigned int nmaps;
1390 int rc;
1391
1392 txq = malloc(sizeof(struct sfxge_txq), M_SFXGE, M_ZERO | M_WAITOK);
1393 txq->sc = sc;
1394 txq->entries = sc->txq_entries;
1395 txq->ptr_mask = txq->entries - 1;
1396
1397 sc->txq[txq_index] = txq;
1398 esmp = &txq->mem;
1399
1400 evq = sc->evq[evq_index];
1401
1402 /* Allocate and zero DMA space for the descriptor ring. */
1403 if ((rc = sfxge_dma_alloc(sc, EFX_TXQ_SIZE(sc->txq_entries), esmp)) != 0)
1404 return (rc);
1405
1406 /* Allocate buffer table entries. */
1407 sfxge_sram_buf_tbl_alloc(sc, EFX_TXQ_NBUFS(sc->txq_entries),
1408 &txq->buf_base_id);
1409
1410 /* Create a DMA tag for packet mappings. */
1411 if (bus_dma_tag_create(sc->parent_dma_tag, 1, 0x1000,
1412 MIN(0x3FFFFFFFFFFFUL, BUS_SPACE_MAXADDR), BUS_SPACE_MAXADDR, NULL,
1413 NULL, 0x11000, SFXGE_TX_MAPPING_MAX_SEG, 0x1000, 0, NULL, NULL,
1414 &txq->packet_dma_tag) != 0) {
1415 device_printf(sc->dev, "Couldn't allocate txq DMA tag\n");
1416 rc = ENOMEM;
1417 goto fail;
1418 }
1419
1420 /* Allocate pending descriptor array for batching writes. */
1421 txq->pend_desc = malloc(sizeof(efx_buffer_t) * sc->txq_entries,
1422 M_SFXGE, M_ZERO | M_WAITOK);
1423
1424 /* Allocate and initialise mbuf DMA mapping array. */
1425 txq->stmp = malloc(sizeof(struct sfxge_tx_mapping) * sc->txq_entries,
1426 M_SFXGE, M_ZERO | M_WAITOK);
1427 for (nmaps = 0; nmaps < sc->txq_entries; nmaps++) {
1428 rc = bus_dmamap_create(txq->packet_dma_tag, 0,
1429 &txq->stmp[nmaps].map);
1430 if (rc != 0)
1431 goto fail2;
1432 }
1433
1434 snprintf(name, sizeof(name), "%u", txq_index);
1435 txq_node = SYSCTL_ADD_NODE(
1436 device_get_sysctl_ctx(sc->dev),
1437 SYSCTL_CHILDREN(sc->txqs_node),
1438 OID_AUTO, name, CTLFLAG_RD, NULL, "");
1439 if (txq_node == NULL) {
1440 rc = ENOMEM;
1441 goto fail_txq_node;
1442 }
1443
1444 if (type == SFXGE_TXQ_IP_TCP_UDP_CKSUM &&
1445 (rc = tso_init(txq)) != 0)
1446 goto fail3;
1447
1448#ifdef SFXGE_HAVE_MQ
1449 if (sfxge_tx_dpl_get_max <= 0) {
1450 log(LOG_ERR, "%s=%d must be greater than 0",
1451 SFXGE_PARAM_TX_DPL_GET_MAX, sfxge_tx_dpl_get_max);
1452 rc = EINVAL;
1453 goto fail_tx_dpl_get_max;
1454 }
1455 if (sfxge_tx_dpl_get_non_tcp_max <= 0) {
1456 log(LOG_ERR, "%s=%d must be greater than 0",
1457 SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX,
1458 sfxge_tx_dpl_get_non_tcp_max);
1459 rc = EINVAL;
1460 goto fail_tx_dpl_get_max;
1461 }
1462 if (sfxge_tx_dpl_put_max < 0) {
1463 log(LOG_ERR, "%s=%d must be greater or equal to 0",
1464 SFXGE_PARAM_TX_DPL_PUT_MAX, sfxge_tx_dpl_put_max);
1465 rc = EINVAL;
1466 goto fail_tx_dpl_put_max;
1467 }
1468
1469 /* Initialize the deferred packet list. */
1470 stdp = &txq->dpl;
1471 stdp->std_put_max = sfxge_tx_dpl_put_max;
1472 stdp->std_get_max = sfxge_tx_dpl_get_max;
1473 stdp->std_get_non_tcp_max = sfxge_tx_dpl_get_non_tcp_max;
1474 stdp->std_getp = &stdp->std_get;
1475
1476 SFXGE_TXQ_LOCK_INIT(txq, device_get_nameunit(sc->dev), txq_index);
1477
1478 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev),
1479 SYSCTL_CHILDREN(txq_node), OID_AUTO,
1480 "dpl_get_count", CTLFLAG_RD | CTLFLAG_STATS,
1481 &stdp->std_get_count, 0, "");
1482 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev),
1483 SYSCTL_CHILDREN(txq_node), OID_AUTO,
1484 "dpl_get_non_tcp_count", CTLFLAG_RD | CTLFLAG_STATS,
1485 &stdp->std_get_non_tcp_count, 0, "");
1486 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev),
1487 SYSCTL_CHILDREN(txq_node), OID_AUTO,
1488 "dpl_get_hiwat", CTLFLAG_RD | CTLFLAG_STATS,
1489 &stdp->std_get_hiwat, 0, "");
1490 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev),
1491 SYSCTL_CHILDREN(txq_node), OID_AUTO,
1492 "dpl_put_hiwat", CTLFLAG_RD | CTLFLAG_STATS,
1493 &stdp->std_put_hiwat, 0, "");
1494#endif
1495
1496 txq->type = type;
1497 txq->evq_index = evq_index;
1498 txq->txq_index = txq_index;
1499 txq->init_state = SFXGE_TXQ_INITIALIZED;
1500
1501 return (0);
1502
1503fail_tx_dpl_put_max:
1504fail_tx_dpl_get_max:
1505fail3:
1506fail_txq_node:
1507 free(txq->pend_desc, M_SFXGE);
1508fail2:
1509 while (nmaps-- != 0)
1510 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map);
1511 free(txq->stmp, M_SFXGE);
1512 bus_dma_tag_destroy(txq->packet_dma_tag);
1513
1514fail:
1515 sfxge_dma_free(esmp);
1516
1517 return (rc);
1518}
1519
1520static const struct {
1521 const char *name;
1522 size_t offset;
1523} sfxge_tx_stats[] = {
1524#define SFXGE_TX_STAT(name, member) \
1525 { #name, offsetof(struct sfxge_txq, member) }
1526 SFXGE_TX_STAT(tso_bursts, tso_bursts),
1527 SFXGE_TX_STAT(tso_packets, tso_packets),
1528 SFXGE_TX_STAT(tso_long_headers, tso_long_headers),
1529 SFXGE_TX_STAT(tso_pdrop_too_many, tso_pdrop_too_many),
1530 SFXGE_TX_STAT(tso_pdrop_no_rsrc, tso_pdrop_no_rsrc),
1531 SFXGE_TX_STAT(tx_collapses, collapses),
1532 SFXGE_TX_STAT(tx_drops, drops),
1533 SFXGE_TX_STAT(tx_get_overflow, get_overflow),
1534 SFXGE_TX_STAT(tx_get_non_tcp_overflow, get_non_tcp_overflow),
1535 SFXGE_TX_STAT(tx_put_overflow, put_overflow),
1536 SFXGE_TX_STAT(tx_netdown_drops, netdown_drops),
1537};
1538
1539static int
1540sfxge_tx_stat_handler(SYSCTL_HANDLER_ARGS)
1541{
1542 struct sfxge_softc *sc = arg1;
1543 unsigned int id = arg2;
1544 unsigned long sum;
1545 unsigned int index;
1546
1547 /* Sum across all TX queues */
1548 sum = 0;
1549 for (index = 0; index < sc->txq_count; index++)
1550 sum += *(unsigned long *)((caddr_t)sc->txq[index] +
1551 sfxge_tx_stats[id].offset);
1552
1553 return (SYSCTL_OUT(req, &sum, sizeof(sum)));
1554}
1555
1556static void
1557sfxge_tx_stat_init(struct sfxge_softc *sc)
1558{
1559 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
1560 struct sysctl_oid_list *stat_list;
1561 unsigned int id;
1562
1563 stat_list = SYSCTL_CHILDREN(sc->stats_node);
1564
1565 for (id = 0; id < nitems(sfxge_tx_stats); id++) {
1566 SYSCTL_ADD_PROC(
1567 ctx, stat_list,
1568 OID_AUTO, sfxge_tx_stats[id].name,
1569 CTLTYPE_ULONG|CTLFLAG_RD,
1570 sc, id, sfxge_tx_stat_handler, "LU",
1571 "");
1572 }
1573}
1574
1575void
1576sfxge_tx_fini(struct sfxge_softc *sc)
1577{
1578 int index;
1579
1580 index = sc->txq_count;
1581 while (--index >= 0)
1582 sfxge_tx_qfini(sc, index);
1583
1584 sc->txq_count = 0;
1585}
1586
1587
1588int
1589sfxge_tx_init(struct sfxge_softc *sc)
1590{
1591 struct sfxge_intr *intr;
1592 int index;
1593 int rc;
1594
1595 intr = &sc->intr;
1596
1597 KASSERT(intr->state == SFXGE_INTR_INITIALIZED,
1598 ("intr->state != SFXGE_INTR_INITIALIZED"));
1599
1600#ifdef SFXGE_HAVE_MQ
1601 sc->txq_count = SFXGE_TXQ_NTYPES - 1 + sc->intr.n_alloc;
1602#else
1603 sc->txq_count = SFXGE_TXQ_NTYPES;
1604#endif
1605
1606 sc->txqs_node = SYSCTL_ADD_NODE(
1607 device_get_sysctl_ctx(sc->dev),
1608 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)),
1609 OID_AUTO, "txq", CTLFLAG_RD, NULL, "Tx queues");
1610 if (sc->txqs_node == NULL) {
1611 rc = ENOMEM;
1612 goto fail_txq_node;
1613 }
1614
1615 /* Initialize the transmit queues */
1616 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NON_CKSUM,
1617 SFXGE_TXQ_NON_CKSUM, 0)) != 0)
1618 goto fail;
1619
1620 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_IP_CKSUM,
1621 SFXGE_TXQ_IP_CKSUM, 0)) != 0)
1622 goto fail2;
1623
1624 for (index = 0;
1625 index < sc->txq_count - SFXGE_TXQ_NTYPES + 1;
1626 index++) {
1627 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NTYPES - 1 + index,
1628 SFXGE_TXQ_IP_TCP_UDP_CKSUM, index)) != 0)
1629 goto fail3;
1630 }
1631
1632 sfxge_tx_stat_init(sc);
1633
1634 return (0);
1635
1636fail3:
1637 while (--index >= 0)
1638 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index);
1639
1640 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_CKSUM);
1641
1642fail2:
1643 sfxge_tx_qfini(sc, SFXGE_TXQ_NON_CKSUM);
1644
1645fail:
1646fail_txq_node:
1647 sc->txq_count = 0;
1648 return (rc);
1649}
2 * Copyright (c) 2010-2011 Solarflare Communications, Inc.
3 * All rights reserved.
4 *
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30/* Theory of operation:
31 *
32 * Tx queues allocation and mapping
33 *
34 * One Tx queue with enabled checksum offload is allocated per Rx channel
35 * (event queue). Also 2 Tx queues (one without checksum offload and one
36 * with IP checksum offload only) are allocated and bound to event queue 0.
37 * sfxge_txq_type is used as Tx queue label.
38 *
39 * So, event queue plus label mapping to Tx queue index is:
40 * if event queue index is 0, TxQ-index = TxQ-label * [0..SFXGE_TXQ_NTYPES)
41 * else TxQ-index = SFXGE_TXQ_NTYPES + EvQ-index - 1
42 * See sfxge_get_txq_by_label() sfxge_ev.c
43 */
44
45#include <sys/cdefs.h>
46__FBSDID("$FreeBSD: stable/10/sys/dev/sfxge/sfxge_tx.c 280592 2015-03-25 13:14:50Z arybchik $");
47
48#include <sys/types.h>
49#include <sys/mbuf.h>
50#include <sys/smp.h>
51#include <sys/socket.h>
52#include <sys/sysctl.h>
53#include <sys/syslog.h>
54
55#include <net/bpf.h>
56#include <net/ethernet.h>
57#include <net/if.h>
58#include <net/if_vlan_var.h>
59
60#include <netinet/in.h>
61#include <netinet/ip.h>
62#include <netinet/ip6.h>
63#include <netinet/tcp.h>
64
65#include "common/efx.h"
66
67#include "sfxge.h"
68#include "sfxge_tx.h"
69
70/*
71 * Estimate maximum number of Tx descriptors required for TSO packet.
72 * With minimum MSS and maximum mbuf length we might need more (even
73 * than a ring-ful of descriptors), but this should not happen in
74 * practice except due to deliberate attack. In that case we will
75 * truncate the output at a packet boundary.
76 */
77#define SFXGE_TSO_MAX_DESC \
78 (SFXGE_TSO_MAX_SEGS * 2 + SFXGE_TX_MAPPING_MAX_SEG - 1)
79
80/*
81 * Set the block level to ensure there is space to generate a
82 * large number of descriptors for TSO.
83 */
84#define SFXGE_TXQ_BLOCK_LEVEL(_entries) \
85 (EFX_TXQ_LIMIT(_entries) - SFXGE_TSO_MAX_DESC)
86
87#ifdef SFXGE_HAVE_MQ
88
89#define SFXGE_PARAM_TX_DPL_GET_MAX SFXGE_PARAM(tx_dpl_get_max)
90static int sfxge_tx_dpl_get_max = SFXGE_TX_DPL_GET_PKT_LIMIT_DEFAULT;
91TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_MAX, &sfxge_tx_dpl_get_max);
92SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_max, CTLFLAG_RDTUN,
93 &sfxge_tx_dpl_get_max, 0,
94 "Maximum number of any packets in deferred packet get-list");
95
96#define SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX \
97 SFXGE_PARAM(tx_dpl_get_non_tcp_max)
98static int sfxge_tx_dpl_get_non_tcp_max =
99 SFXGE_TX_DPL_GET_NON_TCP_PKT_LIMIT_DEFAULT;
100TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX, &sfxge_tx_dpl_get_non_tcp_max);
101SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_non_tcp_max, CTLFLAG_RDTUN,
102 &sfxge_tx_dpl_get_non_tcp_max, 0,
103 "Maximum number of non-TCP packets in deferred packet get-list");
104
105#define SFXGE_PARAM_TX_DPL_PUT_MAX SFXGE_PARAM(tx_dpl_put_max)
106static int sfxge_tx_dpl_put_max = SFXGE_TX_DPL_PUT_PKT_LIMIT_DEFAULT;
107TUNABLE_INT(SFXGE_PARAM_TX_DPL_PUT_MAX, &sfxge_tx_dpl_put_max);
108SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_put_max, CTLFLAG_RDTUN,
109 &sfxge_tx_dpl_put_max, 0,
110 "Maximum number of any packets in deferred packet put-list");
111
112#endif
113
114
115/* Forward declarations. */
116static void sfxge_tx_qdpl_service(struct sfxge_txq *txq);
117static void sfxge_tx_qlist_post(struct sfxge_txq *txq);
118static void sfxge_tx_qunblock(struct sfxge_txq *txq);
119static int sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf,
120 const bus_dma_segment_t *dma_seg, int n_dma_seg);
121
122void
123sfxge_tx_qcomplete(struct sfxge_txq *txq, struct sfxge_evq *evq)
124{
125 unsigned int completed;
126
127 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq);
128
129 completed = txq->completed;
130 while (completed != txq->pending) {
131 struct sfxge_tx_mapping *stmp;
132 unsigned int id;
133
134 id = completed++ & txq->ptr_mask;
135
136 stmp = &txq->stmp[id];
137 if (stmp->flags & TX_BUF_UNMAP) {
138 bus_dmamap_unload(txq->packet_dma_tag, stmp->map);
139 if (stmp->flags & TX_BUF_MBUF) {
140 struct mbuf *m = stmp->u.mbuf;
141 do
142 m = m_free(m);
143 while (m != NULL);
144 } else {
145 free(stmp->u.heap_buf, M_SFXGE);
146 }
147 stmp->flags = 0;
148 }
149 }
150 txq->completed = completed;
151
152 /* Check whether we need to unblock the queue. */
153 mb();
154 if (txq->blocked) {
155 unsigned int level;
156
157 level = txq->added - txq->completed;
158 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries))
159 sfxge_tx_qunblock(txq);
160 }
161}
162
163#ifdef SFXGE_HAVE_MQ
164
165static unsigned int
166sfxge_is_mbuf_non_tcp(struct mbuf *mbuf)
167{
168 /* Absense of TCP checksum flags does not mean that it is non-TCP
169 * but it should be true if user wants to achieve high throughput.
170 */
171 return (!(mbuf->m_pkthdr.csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP)));
172}
173
174/*
175 * Reorder the put list and append it to the get list.
176 */
177static void
178sfxge_tx_qdpl_swizzle(struct sfxge_txq *txq)
179{
180 struct sfxge_tx_dpl *stdp;
181 struct mbuf *mbuf, *get_next, **get_tailp;
182 volatile uintptr_t *putp;
183 uintptr_t put;
184 unsigned int count;
185 unsigned int non_tcp_count;
186
187 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
188
189 stdp = &txq->dpl;
190
191 /* Acquire the put list. */
192 putp = &stdp->std_put;
193 put = atomic_readandclear_ptr(putp);
194 mbuf = (void *)put;
195
196 if (mbuf == NULL)
197 return;
198
199 /* Reverse the put list. */
200 get_tailp = &mbuf->m_nextpkt;
201 get_next = NULL;
202
203 count = 0;
204 non_tcp_count = 0;
205 do {
206 struct mbuf *put_next;
207
208 non_tcp_count += sfxge_is_mbuf_non_tcp(mbuf);
209 put_next = mbuf->m_nextpkt;
210 mbuf->m_nextpkt = get_next;
211 get_next = mbuf;
212 mbuf = put_next;
213
214 count++;
215 } while (mbuf != NULL);
216
217 if (count > stdp->std_put_hiwat)
218 stdp->std_put_hiwat = count;
219
220 /* Append the reversed put list to the get list. */
221 KASSERT(*get_tailp == NULL, ("*get_tailp != NULL"));
222 *stdp->std_getp = get_next;
223 stdp->std_getp = get_tailp;
224 stdp->std_get_count += count;
225 stdp->std_get_non_tcp_count += non_tcp_count;
226}
227
228#endif /* SFXGE_HAVE_MQ */
229
230static void
231sfxge_tx_qreap(struct sfxge_txq *txq)
232{
233 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
234
235 txq->reaped = txq->completed;
236}
237
238static void
239sfxge_tx_qlist_post(struct sfxge_txq *txq)
240{
241 unsigned int old_added;
242 unsigned int level;
243 int rc;
244
245 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
246
247 KASSERT(txq->n_pend_desc != 0, ("txq->n_pend_desc == 0"));
248 KASSERT(txq->n_pend_desc <= SFXGE_TSO_MAX_DESC,
249 ("txq->n_pend_desc too large"));
250 KASSERT(!txq->blocked, ("txq->blocked"));
251
252 old_added = txq->added;
253
254 /* Post the fragment list. */
255 rc = efx_tx_qpost(txq->common, txq->pend_desc, txq->n_pend_desc,
256 txq->reaped, &txq->added);
257 KASSERT(rc == 0, ("efx_tx_qpost() failed"));
258
259 /* If efx_tx_qpost() had to refragment, our information about
260 * buffers to free may be associated with the wrong
261 * descriptors.
262 */
263 KASSERT(txq->added - old_added == txq->n_pend_desc,
264 ("efx_tx_qpost() refragmented descriptors"));
265
266 level = txq->added - txq->reaped;
267 KASSERT(level <= txq->entries, ("overfilled TX queue"));
268
269 /* Clear the fragment list. */
270 txq->n_pend_desc = 0;
271
272 /* Have we reached the block level? */
273 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries))
274 return;
275
276 /* Reap, and check again */
277 sfxge_tx_qreap(txq);
278 level = txq->added - txq->reaped;
279 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries))
280 return;
281
282 txq->blocked = 1;
283
284 /*
285 * Avoid a race with completion interrupt handling that could leave
286 * the queue blocked.
287 */
288 mb();
289 sfxge_tx_qreap(txq);
290 level = txq->added - txq->reaped;
291 if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries)) {
292 mb();
293 txq->blocked = 0;
294 }
295}
296
297static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq, struct mbuf *mbuf)
298{
299 bus_dmamap_t *used_map;
300 bus_dmamap_t map;
301 bus_dma_segment_t dma_seg[SFXGE_TX_MAPPING_MAX_SEG];
302 unsigned int id;
303 struct sfxge_tx_mapping *stmp;
304 efx_buffer_t *desc;
305 int n_dma_seg;
306 int rc;
307 int i;
308
309 KASSERT(!txq->blocked, ("txq->blocked"));
310
311 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO)
312 prefetch_read_many(mbuf->m_data);
313
314 if (txq->init_state != SFXGE_TXQ_STARTED) {
315 rc = EINTR;
316 goto reject;
317 }
318
319 /* Load the packet for DMA. */
320 id = txq->added & txq->ptr_mask;
321 stmp = &txq->stmp[id];
322 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag, stmp->map,
323 mbuf, dma_seg, &n_dma_seg, 0);
324 if (rc == EFBIG) {
325 /* Try again. */
326 struct mbuf *new_mbuf = m_collapse(mbuf, M_NOWAIT,
327 SFXGE_TX_MAPPING_MAX_SEG);
328 if (new_mbuf == NULL)
329 goto reject;
330 ++txq->collapses;
331 mbuf = new_mbuf;
332 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag,
333 stmp->map, mbuf,
334 dma_seg, &n_dma_seg, 0);
335 }
336 if (rc != 0)
337 goto reject;
338
339 /* Make the packet visible to the hardware. */
340 bus_dmamap_sync(txq->packet_dma_tag, stmp->map, BUS_DMASYNC_PREWRITE);
341
342 used_map = &stmp->map;
343
344 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO) {
345 rc = sfxge_tx_queue_tso(txq, mbuf, dma_seg, n_dma_seg);
346 if (rc < 0)
347 goto reject_mapped;
348 stmp = &txq->stmp[rc];
349 } else {
350 /* Add the mapping to the fragment list, and set flags
351 * for the buffer.
352 */
353 i = 0;
354 for (;;) {
355 desc = &txq->pend_desc[i];
356 desc->eb_addr = dma_seg[i].ds_addr;
357 desc->eb_size = dma_seg[i].ds_len;
358 if (i == n_dma_seg - 1) {
359 desc->eb_eop = 1;
360 break;
361 }
362 desc->eb_eop = 0;
363 i++;
364
365 stmp->flags = 0;
366 if (__predict_false(stmp ==
367 &txq->stmp[txq->ptr_mask]))
368 stmp = &txq->stmp[0];
369 else
370 stmp++;
371 }
372 txq->n_pend_desc = n_dma_seg;
373 }
374
375 /*
376 * If the mapping required more than one descriptor
377 * then we need to associate the DMA map with the last
378 * descriptor, not the first.
379 */
380 if (used_map != &stmp->map) {
381 map = stmp->map;
382 stmp->map = *used_map;
383 *used_map = map;
384 }
385
386 stmp->u.mbuf = mbuf;
387 stmp->flags = TX_BUF_UNMAP | TX_BUF_MBUF;
388
389 /* Post the fragment list. */
390 sfxge_tx_qlist_post(txq);
391
392 return (0);
393
394reject_mapped:
395 bus_dmamap_unload(txq->packet_dma_tag, *used_map);
396reject:
397 /* Drop the packet on the floor. */
398 m_freem(mbuf);
399 ++txq->drops;
400
401 return (rc);
402}
403
404#ifdef SFXGE_HAVE_MQ
405
406/*
407 * Drain the deferred packet list into the transmit queue.
408 */
409static void
410sfxge_tx_qdpl_drain(struct sfxge_txq *txq)
411{
412 struct sfxge_softc *sc;
413 struct sfxge_tx_dpl *stdp;
414 struct mbuf *mbuf, *next;
415 unsigned int count;
416 unsigned int non_tcp_count;
417 unsigned int pushed;
418 int rc;
419
420 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
421
422 sc = txq->sc;
423 stdp = &txq->dpl;
424 pushed = txq->added;
425
426 prefetch_read_many(sc->enp);
427 prefetch_read_many(txq->common);
428
429 mbuf = stdp->std_get;
430 count = stdp->std_get_count;
431 non_tcp_count = stdp->std_get_non_tcp_count;
432
433 if (count > stdp->std_get_hiwat)
434 stdp->std_get_hiwat = count;
435
436 while (count != 0) {
437 KASSERT(mbuf != NULL, ("mbuf == NULL"));
438
439 next = mbuf->m_nextpkt;
440 mbuf->m_nextpkt = NULL;
441
442 ETHER_BPF_MTAP(sc->ifnet, mbuf); /* packet capture */
443
444 if (next != NULL)
445 prefetch_read_many(next);
446
447 rc = sfxge_tx_queue_mbuf(txq, mbuf);
448 --count;
449 non_tcp_count -= sfxge_is_mbuf_non_tcp(mbuf);
450 mbuf = next;
451 if (rc != 0)
452 continue;
453
454 if (txq->blocked)
455 break;
456
457 /* Push the fragments to the hardware in batches. */
458 if (txq->added - pushed >= SFXGE_TX_BATCH) {
459 efx_tx_qpush(txq->common, txq->added);
460 pushed = txq->added;
461 }
462 }
463
464 if (count == 0) {
465 KASSERT(mbuf == NULL, ("mbuf != NULL"));
466 KASSERT(non_tcp_count == 0,
467 ("inconsistent TCP/non-TCP detection"));
468 stdp->std_get = NULL;
469 stdp->std_get_count = 0;
470 stdp->std_get_non_tcp_count = 0;
471 stdp->std_getp = &stdp->std_get;
472 } else {
473 stdp->std_get = mbuf;
474 stdp->std_get_count = count;
475 stdp->std_get_non_tcp_count = non_tcp_count;
476 }
477
478 if (txq->added != pushed)
479 efx_tx_qpush(txq->common, txq->added);
480
481 KASSERT(txq->blocked || stdp->std_get_count == 0,
482 ("queue unblocked but count is non-zero"));
483}
484
485#define SFXGE_TX_QDPL_PENDING(_txq) \
486 ((_txq)->dpl.std_put != 0)
487
488/*
489 * Service the deferred packet list.
490 *
491 * NOTE: drops the txq mutex!
492 */
493static void
494sfxge_tx_qdpl_service(struct sfxge_txq *txq)
495{
496 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
497
498 do {
499 if (SFXGE_TX_QDPL_PENDING(txq))
500 sfxge_tx_qdpl_swizzle(txq);
501
502 if (!txq->blocked)
503 sfxge_tx_qdpl_drain(txq);
504
505 SFXGE_TXQ_UNLOCK(txq);
506 } while (SFXGE_TX_QDPL_PENDING(txq) &&
507 SFXGE_TXQ_TRYLOCK(txq));
508}
509
510/*
511 * Put a packet on the deferred packet list.
512 *
513 * If we are called with the txq lock held, we put the packet on the "get
514 * list", otherwise we atomically push it on the "put list". The swizzle
515 * function takes care of ordering.
516 *
517 * The length of the put list is bounded by SFXGE_TX_MAX_DEFERRED. We
518 * overload the csum_data field in the mbuf to keep track of this length
519 * because there is no cheap alternative to avoid races.
520 */
521static int
522sfxge_tx_qdpl_put(struct sfxge_txq *txq, struct mbuf *mbuf, int locked)
523{
524 struct sfxge_tx_dpl *stdp;
525
526 stdp = &txq->dpl;
527
528 KASSERT(mbuf->m_nextpkt == NULL, ("mbuf->m_nextpkt != NULL"));
529
530 if (locked) {
531 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
532
533 sfxge_tx_qdpl_swizzle(txq);
534
535 if (stdp->std_get_count >= stdp->std_get_max) {
536 txq->get_overflow++;
537 return (ENOBUFS);
538 }
539 if (sfxge_is_mbuf_non_tcp(mbuf)) {
540 if (stdp->std_get_non_tcp_count >=
541 stdp->std_get_non_tcp_max) {
542 txq->get_non_tcp_overflow++;
543 return (ENOBUFS);
544 }
545 stdp->std_get_non_tcp_count++;
546 }
547
548 *(stdp->std_getp) = mbuf;
549 stdp->std_getp = &mbuf->m_nextpkt;
550 stdp->std_get_count++;
551 } else {
552 volatile uintptr_t *putp;
553 uintptr_t old;
554 uintptr_t new;
555 unsigned old_len;
556
557 putp = &stdp->std_put;
558 new = (uintptr_t)mbuf;
559
560 do {
561 old = *putp;
562 if (old != 0) {
563 struct mbuf *mp = (struct mbuf *)old;
564 old_len = mp->m_pkthdr.csum_data;
565 } else
566 old_len = 0;
567 if (old_len >= stdp->std_put_max) {
568 atomic_add_long(&txq->put_overflow, 1);
569 return (ENOBUFS);
570 }
571 mbuf->m_pkthdr.csum_data = old_len + 1;
572 mbuf->m_nextpkt = (void *)old;
573 } while (atomic_cmpset_ptr(putp, old, new) == 0);
574 }
575
576 return (0);
577}
578
579/*
580 * Called from if_transmit - will try to grab the txq lock and enqueue to the
581 * put list if it succeeds, otherwise try to push onto the defer list if space.
582 */
583int
584sfxge_tx_packet_add(struct sfxge_txq *txq, struct mbuf *m)
585{
586 int locked;
587 int rc;
588
589 if (!SFXGE_LINK_UP(txq->sc)) {
590 rc = ENETDOWN;
591 atomic_add_long(&txq->netdown_drops, 1);
592 goto fail;
593 }
594
595 /*
596 * Try to grab the txq lock. If we are able to get the lock,
597 * the packet will be appended to the "get list" of the deferred
598 * packet list. Otherwise, it will be pushed on the "put list".
599 */
600 locked = SFXGE_TXQ_TRYLOCK(txq);
601
602 if (sfxge_tx_qdpl_put(txq, m, locked) != 0) {
603 if (locked)
604 SFXGE_TXQ_UNLOCK(txq);
605 rc = ENOBUFS;
606 goto fail;
607 }
608
609 /*
610 * Try to grab the lock again.
611 *
612 * If we are able to get the lock, we need to process the deferred
613 * packet list. If we are not able to get the lock, another thread
614 * is processing the list.
615 */
616 if (!locked)
617 locked = SFXGE_TXQ_TRYLOCK(txq);
618
619 if (locked) {
620 /* Try to service the list. */
621 sfxge_tx_qdpl_service(txq);
622 /* Lock has been dropped. */
623 }
624
625 return (0);
626
627fail:
628 m_freem(m);
629 return (rc);
630}
631
632static void
633sfxge_tx_qdpl_flush(struct sfxge_txq *txq)
634{
635 struct sfxge_tx_dpl *stdp = &txq->dpl;
636 struct mbuf *mbuf, *next;
637
638 SFXGE_TXQ_LOCK(txq);
639
640 sfxge_tx_qdpl_swizzle(txq);
641 for (mbuf = stdp->std_get; mbuf != NULL; mbuf = next) {
642 next = mbuf->m_nextpkt;
643 m_freem(mbuf);
644 }
645 stdp->std_get = NULL;
646 stdp->std_get_count = 0;
647 stdp->std_get_non_tcp_count = 0;
648 stdp->std_getp = &stdp->std_get;
649
650 SFXGE_TXQ_UNLOCK(txq);
651}
652
653void
654sfxge_if_qflush(struct ifnet *ifp)
655{
656 struct sfxge_softc *sc;
657 int i;
658
659 sc = ifp->if_softc;
660
661 for (i = 0; i < sc->txq_count; i++)
662 sfxge_tx_qdpl_flush(sc->txq[i]);
663}
664
665/*
666 * TX start -- called by the stack.
667 */
668int
669sfxge_if_transmit(struct ifnet *ifp, struct mbuf *m)
670{
671 struct sfxge_softc *sc;
672 struct sfxge_txq *txq;
673 int rc;
674
675 sc = (struct sfxge_softc *)ifp->if_softc;
676
677 KASSERT(ifp->if_flags & IFF_UP, ("interface not up"));
678
679 /* Pick the desired transmit queue. */
680 if (m->m_pkthdr.csum_flags & (CSUM_DELAY_DATA | CSUM_TSO)) {
681 int index = 0;
682
683 if (m->m_flags & M_FLOWID) {
684 uint32_t hash = m->m_pkthdr.flowid;
685
686 index = sc->rx_indir_table[hash % SFXGE_RX_SCALE_MAX];
687 }
688 txq = sc->txq[SFXGE_TXQ_IP_TCP_UDP_CKSUM + index];
689 } else if (m->m_pkthdr.csum_flags & CSUM_DELAY_IP) {
690 txq = sc->txq[SFXGE_TXQ_IP_CKSUM];
691 } else {
692 txq = sc->txq[SFXGE_TXQ_NON_CKSUM];
693 }
694
695 rc = sfxge_tx_packet_add(txq, m);
696
697 return (rc);
698}
699
700#else /* !SFXGE_HAVE_MQ */
701
702static void sfxge_if_start_locked(struct ifnet *ifp)
703{
704 struct sfxge_softc *sc = ifp->if_softc;
705 struct sfxge_txq *txq;
706 struct mbuf *mbuf;
707 unsigned int pushed[SFXGE_TXQ_NTYPES];
708 unsigned int q_index;
709
710 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) !=
711 IFF_DRV_RUNNING)
712 return;
713
714 if (!sc->port.link_up)
715 return;
716
717 for (q_index = 0; q_index < SFXGE_TXQ_NTYPES; q_index++) {
718 txq = sc->txq[q_index];
719 pushed[q_index] = txq->added;
720 }
721
722 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
723 IFQ_DRV_DEQUEUE(&ifp->if_snd, mbuf);
724 if (mbuf == NULL)
725 break;
726
727 ETHER_BPF_MTAP(ifp, mbuf); /* packet capture */
728
729 /* Pick the desired transmit queue. */
730 if (mbuf->m_pkthdr.csum_flags & (CSUM_DELAY_DATA | CSUM_TSO))
731 q_index = SFXGE_TXQ_IP_TCP_UDP_CKSUM;
732 else if (mbuf->m_pkthdr.csum_flags & CSUM_DELAY_IP)
733 q_index = SFXGE_TXQ_IP_CKSUM;
734 else
735 q_index = SFXGE_TXQ_NON_CKSUM;
736 txq = sc->txq[q_index];
737
738 if (sfxge_tx_queue_mbuf(txq, mbuf) != 0)
739 continue;
740
741 if (txq->blocked) {
742 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
743 break;
744 }
745
746 /* Push the fragments to the hardware in batches. */
747 if (txq->added - pushed[q_index] >= SFXGE_TX_BATCH) {
748 efx_tx_qpush(txq->common, txq->added);
749 pushed[q_index] = txq->added;
750 }
751 }
752
753 for (q_index = 0; q_index < SFXGE_TXQ_NTYPES; q_index++) {
754 txq = sc->txq[q_index];
755 if (txq->added != pushed[q_index])
756 efx_tx_qpush(txq->common, txq->added);
757 }
758}
759
760void sfxge_if_start(struct ifnet *ifp)
761{
762 struct sfxge_softc *sc = ifp->if_softc;
763
764 SFXGE_TXQ_LOCK(sc->txq[0]);
765 sfxge_if_start_locked(ifp);
766 SFXGE_TXQ_UNLOCK(sc->txq[0]);
767}
768
769static void
770sfxge_tx_qdpl_service(struct sfxge_txq *txq)
771{
772 struct ifnet *ifp = txq->sc->ifnet;
773
774 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
775 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
776 sfxge_if_start_locked(ifp);
777 SFXGE_TXQ_UNLOCK(txq);
778}
779
780#endif /* SFXGE_HAVE_MQ */
781
782/*
783 * Software "TSO". Not quite as good as doing it in hardware, but
784 * still faster than segmenting in the stack.
785 */
786
787struct sfxge_tso_state {
788 /* Output position */
789 unsigned out_len; /* Remaining length in current segment */
790 unsigned seqnum; /* Current sequence number */
791 unsigned packet_space; /* Remaining space in current packet */
792
793 /* Input position */
794 uint64_t dma_addr; /* DMA address of current position */
795 unsigned in_len; /* Remaining length in current mbuf */
796
797 const struct mbuf *mbuf; /* Input mbuf (head of chain) */
798 u_short protocol; /* Network protocol (after VLAN decap) */
799 ssize_t nh_off; /* Offset of network header */
800 ssize_t tcph_off; /* Offset of TCP header */
801 unsigned header_len; /* Number of bytes of header */
802 unsigned seg_size; /* TCP segment size */
803};
804
805static const struct ip *tso_iph(const struct sfxge_tso_state *tso)
806{
807 KASSERT(tso->protocol == htons(ETHERTYPE_IP),
808 ("tso_iph() in non-IPv4 state"));
809 return (const struct ip *)(tso->mbuf->m_data + tso->nh_off);
810}
811static __unused const struct ip6_hdr *tso_ip6h(const struct sfxge_tso_state *tso)
812{
813 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6),
814 ("tso_ip6h() in non-IPv6 state"));
815 return (const struct ip6_hdr *)(tso->mbuf->m_data + tso->nh_off);
816}
817static const struct tcphdr *tso_tcph(const struct sfxge_tso_state *tso)
818{
819 return (const struct tcphdr *)(tso->mbuf->m_data + tso->tcph_off);
820}
821
822/* Size of preallocated TSO header buffers. Larger blocks must be
823 * allocated from the heap.
824 */
825#define TSOH_STD_SIZE 128
826
827/* At most half the descriptors in the queue at any time will refer to
828 * a TSO header buffer, since they must always be followed by a
829 * payload descriptor referring to an mbuf.
830 */
831#define TSOH_COUNT(_txq_entries) ((_txq_entries) / 2u)
832#define TSOH_PER_PAGE (PAGE_SIZE / TSOH_STD_SIZE)
833#define TSOH_PAGE_COUNT(_txq_entries) \
834 ((TSOH_COUNT(_txq_entries) + TSOH_PER_PAGE - 1) / TSOH_PER_PAGE)
835
836static int tso_init(struct sfxge_txq *txq)
837{
838 struct sfxge_softc *sc = txq->sc;
839 unsigned int tsoh_page_count = TSOH_PAGE_COUNT(sc->txq_entries);
840 int i, rc;
841
842 /* Allocate TSO header buffers */
843 txq->tsoh_buffer = malloc(tsoh_page_count * sizeof(txq->tsoh_buffer[0]),
844 M_SFXGE, M_WAITOK);
845
846 for (i = 0; i < tsoh_page_count; i++) {
847 rc = sfxge_dma_alloc(sc, PAGE_SIZE, &txq->tsoh_buffer[i]);
848 if (rc != 0)
849 goto fail;
850 }
851
852 return (0);
853
854fail:
855 while (i-- > 0)
856 sfxge_dma_free(&txq->tsoh_buffer[i]);
857 free(txq->tsoh_buffer, M_SFXGE);
858 txq->tsoh_buffer = NULL;
859 return (rc);
860}
861
862static void tso_fini(struct sfxge_txq *txq)
863{
864 int i;
865
866 if (txq->tsoh_buffer != NULL) {
867 for (i = 0; i < TSOH_PAGE_COUNT(txq->sc->txq_entries); i++)
868 sfxge_dma_free(&txq->tsoh_buffer[i]);
869 free(txq->tsoh_buffer, M_SFXGE);
870 }
871}
872
873static void tso_start(struct sfxge_tso_state *tso, struct mbuf *mbuf)
874{
875 struct ether_header *eh = mtod(mbuf, struct ether_header *);
876 const struct tcphdr *th;
877 struct tcphdr th_copy;
878
879 tso->mbuf = mbuf;
880
881 /* Find network protocol and header */
882 tso->protocol = eh->ether_type;
883 if (tso->protocol == htons(ETHERTYPE_VLAN)) {
884 struct ether_vlan_header *veh =
885 mtod(mbuf, struct ether_vlan_header *);
886 tso->protocol = veh->evl_proto;
887 tso->nh_off = sizeof(*veh);
888 } else {
889 tso->nh_off = sizeof(*eh);
890 }
891
892 /* Find TCP header */
893 if (tso->protocol == htons(ETHERTYPE_IP)) {
894 KASSERT(tso_iph(tso)->ip_p == IPPROTO_TCP,
895 ("TSO required on non-TCP packet"));
896 tso->tcph_off = tso->nh_off + 4 * tso_iph(tso)->ip_hl;
897 } else {
898 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6),
899 ("TSO required on non-IP packet"));
900 KASSERT(tso_ip6h(tso)->ip6_nxt == IPPROTO_TCP,
901 ("TSO required on non-TCP packet"));
902 tso->tcph_off = tso->nh_off + sizeof(struct ip6_hdr);
903 }
904
905 KASSERT(mbuf->m_len >= tso->tcph_off,
906 ("network header is fragmented in mbuf"));
907 /* We need TCP header including flags (window is the next) */
908 if (mbuf->m_len < tso->tcph_off + offsetof(struct tcphdr, th_win)) {
909 m_copydata(tso->mbuf, tso->tcph_off, sizeof(th_copy),
910 (caddr_t)&th_copy);
911 th = &th_copy;
912 } else {
913 th = tso_tcph(tso);
914 }
915
916 tso->header_len = tso->tcph_off + 4 * th->th_off;
917 tso->seg_size = mbuf->m_pkthdr.tso_segsz;
918
919 tso->seqnum = ntohl(th->th_seq);
920
921 /* These flags must not be duplicated */
922 KASSERT(!(th->th_flags & (TH_URG | TH_SYN | TH_RST)),
923 ("incompatible TCP flag on TSO packet"));
924
925 tso->out_len = mbuf->m_pkthdr.len - tso->header_len;
926}
927
928/*
929 * tso_fill_packet_with_fragment - form descriptors for the current fragment
930 *
931 * Form descriptors for the current fragment, until we reach the end
932 * of fragment or end-of-packet. Return 0 on success, 1 if not enough
933 * space.
934 */
935static void tso_fill_packet_with_fragment(struct sfxge_txq *txq,
936 struct sfxge_tso_state *tso)
937{
938 efx_buffer_t *desc;
939 int n;
940
941 if (tso->in_len == 0 || tso->packet_space == 0)
942 return;
943
944 KASSERT(tso->in_len > 0, ("TSO input length went negative"));
945 KASSERT(tso->packet_space > 0, ("TSO packet space went negative"));
946
947 n = min(tso->in_len, tso->packet_space);
948
949 tso->packet_space -= n;
950 tso->out_len -= n;
951 tso->in_len -= n;
952
953 desc = &txq->pend_desc[txq->n_pend_desc++];
954 desc->eb_addr = tso->dma_addr;
955 desc->eb_size = n;
956 desc->eb_eop = tso->out_len == 0 || tso->packet_space == 0;
957
958 tso->dma_addr += n;
959}
960
961/* Callback from bus_dmamap_load() for long TSO headers. */
962static void tso_map_long_header(void *dma_addr_ret,
963 bus_dma_segment_t *segs, int nseg,
964 int error)
965{
966 *(uint64_t *)dma_addr_ret = ((__predict_true(error == 0) &&
967 __predict_true(nseg == 1)) ?
968 segs->ds_addr : 0);
969}
970
971/*
972 * tso_start_new_packet - generate a new header and prepare for the new packet
973 *
974 * Generate a new header and prepare for the new packet. Return 0 on
975 * success, or an error code if failed to alloc header.
976 */
977static int tso_start_new_packet(struct sfxge_txq *txq,
978 struct sfxge_tso_state *tso,
979 unsigned int id)
980{
981 struct sfxge_tx_mapping *stmp = &txq->stmp[id];
982 struct tcphdr *tsoh_th;
983 unsigned ip_length;
984 caddr_t header;
985 uint64_t dma_addr;
986 bus_dmamap_t map;
987 efx_buffer_t *desc;
988 int rc;
989
990 /* Allocate a DMA-mapped header buffer. */
991 if (__predict_true(tso->header_len <= TSOH_STD_SIZE)) {
992 unsigned int page_index = (id / 2) / TSOH_PER_PAGE;
993 unsigned int buf_index = (id / 2) % TSOH_PER_PAGE;
994
995 header = (txq->tsoh_buffer[page_index].esm_base +
996 buf_index * TSOH_STD_SIZE);
997 dma_addr = (txq->tsoh_buffer[page_index].esm_addr +
998 buf_index * TSOH_STD_SIZE);
999 map = txq->tsoh_buffer[page_index].esm_map;
1000
1001 stmp->flags = 0;
1002 } else {
1003 /* We cannot use bus_dmamem_alloc() as that may sleep */
1004 header = malloc(tso->header_len, M_SFXGE, M_NOWAIT);
1005 if (__predict_false(!header))
1006 return (ENOMEM);
1007 rc = bus_dmamap_load(txq->packet_dma_tag, stmp->map,
1008 header, tso->header_len,
1009 tso_map_long_header, &dma_addr,
1010 BUS_DMA_NOWAIT);
1011 if (__predict_false(dma_addr == 0)) {
1012 if (rc == 0) {
1013 /* Succeeded but got >1 segment */
1014 bus_dmamap_unload(txq->packet_dma_tag,
1015 stmp->map);
1016 rc = EINVAL;
1017 }
1018 free(header, M_SFXGE);
1019 return (rc);
1020 }
1021 map = stmp->map;
1022
1023 txq->tso_long_headers++;
1024 stmp->u.heap_buf = header;
1025 stmp->flags = TX_BUF_UNMAP;
1026 }
1027
1028 tsoh_th = (struct tcphdr *)(header + tso->tcph_off);
1029
1030 /* Copy and update the headers. */
1031 m_copydata(tso->mbuf, 0, tso->header_len, header);
1032
1033 tsoh_th->th_seq = htonl(tso->seqnum);
1034 tso->seqnum += tso->seg_size;
1035 if (tso->out_len > tso->seg_size) {
1036 /* This packet will not finish the TSO burst. */
1037 ip_length = tso->header_len - tso->nh_off + tso->seg_size;
1038 tsoh_th->th_flags &= ~(TH_FIN | TH_PUSH);
1039 } else {
1040 /* This packet will be the last in the TSO burst. */
1041 ip_length = tso->header_len - tso->nh_off + tso->out_len;
1042 }
1043
1044 if (tso->protocol == htons(ETHERTYPE_IP)) {
1045 struct ip *tsoh_iph = (struct ip *)(header + tso->nh_off);
1046 tsoh_iph->ip_len = htons(ip_length);
1047 /* XXX We should increment ip_id, but FreeBSD doesn't
1048 * currently allocate extra IDs for multiple segments.
1049 */
1050 } else {
1051 struct ip6_hdr *tsoh_iph =
1052 (struct ip6_hdr *)(header + tso->nh_off);
1053 tsoh_iph->ip6_plen = htons(ip_length - sizeof(*tsoh_iph));
1054 }
1055
1056 /* Make the header visible to the hardware. */
1057 bus_dmamap_sync(txq->packet_dma_tag, map, BUS_DMASYNC_PREWRITE);
1058
1059 tso->packet_space = tso->seg_size;
1060 txq->tso_packets++;
1061
1062 /* Form a descriptor for this header. */
1063 desc = &txq->pend_desc[txq->n_pend_desc++];
1064 desc->eb_addr = dma_addr;
1065 desc->eb_size = tso->header_len;
1066 desc->eb_eop = 0;
1067
1068 return (0);
1069}
1070
1071static int
1072sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf,
1073 const bus_dma_segment_t *dma_seg, int n_dma_seg)
1074{
1075 struct sfxge_tso_state tso;
1076 unsigned int id, next_id;
1077 unsigned skipped = 0;
1078
1079 tso_start(&tso, mbuf);
1080
1081 while (dma_seg->ds_len + skipped <= tso.header_len) {
1082 skipped += dma_seg->ds_len;
1083 --n_dma_seg;
1084 KASSERT(n_dma_seg, ("no payload found in TSO packet"));
1085 ++dma_seg;
1086 }
1087 tso.in_len = dma_seg->ds_len + (tso.header_len - skipped);
1088 tso.dma_addr = dma_seg->ds_addr + (tso.header_len - skipped);
1089
1090 id = txq->added & txq->ptr_mask;
1091 if (__predict_false(tso_start_new_packet(txq, &tso, id)))
1092 return (-1);
1093
1094 while (1) {
1095 id = (id + 1) & txq->ptr_mask;
1096 tso_fill_packet_with_fragment(txq, &tso);
1097
1098 /* Move onto the next fragment? */
1099 if (tso.in_len == 0) {
1100 --n_dma_seg;
1101 if (n_dma_seg == 0)
1102 break;
1103 ++dma_seg;
1104 tso.in_len = dma_seg->ds_len;
1105 tso.dma_addr = dma_seg->ds_addr;
1106 }
1107
1108 /* End of packet? */
1109 if (tso.packet_space == 0) {
1110 /* If the queue is now full due to tiny MSS,
1111 * or we can't create another header, discard
1112 * the remainder of the input mbuf but do not
1113 * roll back the work we have done.
1114 */
1115 if (txq->n_pend_desc + 1 /* header */ + n_dma_seg >
1116 SFXGE_TSO_MAX_DESC) {
1117 txq->tso_pdrop_too_many++;
1118 break;
1119 }
1120 next_id = (id + 1) & txq->ptr_mask;
1121 if (__predict_false(tso_start_new_packet(txq, &tso,
1122 next_id))) {
1123 txq->tso_pdrop_no_rsrc++;
1124 break;
1125 }
1126 id = next_id;
1127 }
1128 }
1129
1130 txq->tso_bursts++;
1131 return (id);
1132}
1133
1134static void
1135sfxge_tx_qunblock(struct sfxge_txq *txq)
1136{
1137 struct sfxge_softc *sc;
1138 struct sfxge_evq *evq;
1139
1140 sc = txq->sc;
1141 evq = sc->evq[txq->evq_index];
1142
1143 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq);
1144
1145 if (txq->init_state != SFXGE_TXQ_STARTED)
1146 return;
1147
1148 SFXGE_TXQ_LOCK(txq);
1149
1150 if (txq->blocked) {
1151 unsigned int level;
1152
1153 level = txq->added - txq->completed;
1154 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries)) {
1155 /* reaped must be in sync with blocked */
1156 sfxge_tx_qreap(txq);
1157 txq->blocked = 0;
1158 }
1159 }
1160
1161 sfxge_tx_qdpl_service(txq);
1162 /* note: lock has been dropped */
1163}
1164
1165void
1166sfxge_tx_qflush_done(struct sfxge_txq *txq)
1167{
1168
1169 txq->flush_state = SFXGE_FLUSH_DONE;
1170}
1171
1172static void
1173sfxge_tx_qstop(struct sfxge_softc *sc, unsigned int index)
1174{
1175 struct sfxge_txq *txq;
1176 struct sfxge_evq *evq;
1177 unsigned int count;
1178
1179 txq = sc->txq[index];
1180 evq = sc->evq[txq->evq_index];
1181
1182 SFXGE_TXQ_LOCK(txq);
1183
1184 KASSERT(txq->init_state == SFXGE_TXQ_STARTED,
1185 ("txq->init_state != SFXGE_TXQ_STARTED"));
1186
1187 txq->init_state = SFXGE_TXQ_INITIALIZED;
1188 txq->flush_state = SFXGE_FLUSH_PENDING;
1189
1190 /* Flush the transmit queue. */
1191 efx_tx_qflush(txq->common);
1192
1193 SFXGE_TXQ_UNLOCK(txq);
1194
1195 count = 0;
1196 do {
1197 /* Spin for 100ms. */
1198 DELAY(100000);
1199
1200 if (txq->flush_state != SFXGE_FLUSH_PENDING)
1201 break;
1202 } while (++count < 20);
1203
1204 SFXGE_EVQ_LOCK(evq);
1205 SFXGE_TXQ_LOCK(txq);
1206
1207 KASSERT(txq->flush_state != SFXGE_FLUSH_FAILED,
1208 ("txq->flush_state == SFXGE_FLUSH_FAILED"));
1209
1210 txq->flush_state = SFXGE_FLUSH_DONE;
1211
1212 txq->blocked = 0;
1213 txq->pending = txq->added;
1214
1215 sfxge_tx_qcomplete(txq, evq);
1216 KASSERT(txq->completed == txq->added,
1217 ("txq->completed != txq->added"));
1218
1219 sfxge_tx_qreap(txq);
1220 KASSERT(txq->reaped == txq->completed,
1221 ("txq->reaped != txq->completed"));
1222
1223 txq->added = 0;
1224 txq->pending = 0;
1225 txq->completed = 0;
1226 txq->reaped = 0;
1227
1228 /* Destroy the common code transmit queue. */
1229 efx_tx_qdestroy(txq->common);
1230 txq->common = NULL;
1231
1232 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id,
1233 EFX_TXQ_NBUFS(sc->txq_entries));
1234
1235 SFXGE_EVQ_UNLOCK(evq);
1236 SFXGE_TXQ_UNLOCK(txq);
1237}
1238
1239static int
1240sfxge_tx_qstart(struct sfxge_softc *sc, unsigned int index)
1241{
1242 struct sfxge_txq *txq;
1243 efsys_mem_t *esmp;
1244 uint16_t flags;
1245 struct sfxge_evq *evq;
1246 int rc;
1247
1248 txq = sc->txq[index];
1249 esmp = &txq->mem;
1250 evq = sc->evq[txq->evq_index];
1251
1252 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED,
1253 ("txq->init_state != SFXGE_TXQ_INITIALIZED"));
1254 KASSERT(evq->init_state == SFXGE_EVQ_STARTED,
1255 ("evq->init_state != SFXGE_EVQ_STARTED"));
1256
1257 /* Program the buffer table. */
1258 if ((rc = efx_sram_buf_tbl_set(sc->enp, txq->buf_base_id, esmp,
1259 EFX_TXQ_NBUFS(sc->txq_entries))) != 0)
1260 return (rc);
1261
1262 /* Determine the kind of queue we are creating. */
1263 switch (txq->type) {
1264 case SFXGE_TXQ_NON_CKSUM:
1265 flags = 0;
1266 break;
1267 case SFXGE_TXQ_IP_CKSUM:
1268 flags = EFX_CKSUM_IPV4;
1269 break;
1270 case SFXGE_TXQ_IP_TCP_UDP_CKSUM:
1271 flags = EFX_CKSUM_IPV4 | EFX_CKSUM_TCPUDP;
1272 break;
1273 default:
1274 KASSERT(0, ("Impossible TX queue"));
1275 flags = 0;
1276 break;
1277 }
1278
1279 /* Create the common code transmit queue. */
1280 if ((rc = efx_tx_qcreate(sc->enp, index, txq->type, esmp,
1281 sc->txq_entries, txq->buf_base_id, flags, evq->common,
1282 &txq->common)) != 0)
1283 goto fail;
1284
1285 SFXGE_TXQ_LOCK(txq);
1286
1287 /* Enable the transmit queue. */
1288 efx_tx_qenable(txq->common);
1289
1290 txq->init_state = SFXGE_TXQ_STARTED;
1291
1292 SFXGE_TXQ_UNLOCK(txq);
1293
1294 return (0);
1295
1296fail:
1297 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id,
1298 EFX_TXQ_NBUFS(sc->txq_entries));
1299 return (rc);
1300}
1301
1302void
1303sfxge_tx_stop(struct sfxge_softc *sc)
1304{
1305 int index;
1306
1307 index = sc->txq_count;
1308 while (--index >= 0)
1309 sfxge_tx_qstop(sc, index);
1310
1311 /* Tear down the transmit module */
1312 efx_tx_fini(sc->enp);
1313}
1314
1315int
1316sfxge_tx_start(struct sfxge_softc *sc)
1317{
1318 int index;
1319 int rc;
1320
1321 /* Initialize the common code transmit module. */
1322 if ((rc = efx_tx_init(sc->enp)) != 0)
1323 return (rc);
1324
1325 for (index = 0; index < sc->txq_count; index++) {
1326 if ((rc = sfxge_tx_qstart(sc, index)) != 0)
1327 goto fail;
1328 }
1329
1330 return (0);
1331
1332fail:
1333 while (--index >= 0)
1334 sfxge_tx_qstop(sc, index);
1335
1336 efx_tx_fini(sc->enp);
1337
1338 return (rc);
1339}
1340
1341/**
1342 * Destroy a transmit queue.
1343 */
1344static void
1345sfxge_tx_qfini(struct sfxge_softc *sc, unsigned int index)
1346{
1347 struct sfxge_txq *txq;
1348 unsigned int nmaps;
1349
1350 txq = sc->txq[index];
1351
1352 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED,
1353 ("txq->init_state != SFXGE_TXQ_INITIALIZED"));
1354
1355 if (txq->type == SFXGE_TXQ_IP_TCP_UDP_CKSUM)
1356 tso_fini(txq);
1357
1358 /* Free the context arrays. */
1359 free(txq->pend_desc, M_SFXGE);
1360 nmaps = sc->txq_entries;
1361 while (nmaps-- != 0)
1362 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map);
1363 free(txq->stmp, M_SFXGE);
1364
1365 /* Release DMA memory mapping. */
1366 sfxge_dma_free(&txq->mem);
1367
1368 sc->txq[index] = NULL;
1369
1370#ifdef SFXGE_HAVE_MQ
1371 SFXGE_TXQ_LOCK_DESTROY(txq);
1372#endif
1373
1374 free(txq, M_SFXGE);
1375}
1376
1377static int
1378sfxge_tx_qinit(struct sfxge_softc *sc, unsigned int txq_index,
1379 enum sfxge_txq_type type, unsigned int evq_index)
1380{
1381 char name[16];
1382 struct sysctl_oid *txq_node;
1383 struct sfxge_txq *txq;
1384 struct sfxge_evq *evq;
1385#ifdef SFXGE_HAVE_MQ
1386 struct sfxge_tx_dpl *stdp;
1387#endif
1388 efsys_mem_t *esmp;
1389 unsigned int nmaps;
1390 int rc;
1391
1392 txq = malloc(sizeof(struct sfxge_txq), M_SFXGE, M_ZERO | M_WAITOK);
1393 txq->sc = sc;
1394 txq->entries = sc->txq_entries;
1395 txq->ptr_mask = txq->entries - 1;
1396
1397 sc->txq[txq_index] = txq;
1398 esmp = &txq->mem;
1399
1400 evq = sc->evq[evq_index];
1401
1402 /* Allocate and zero DMA space for the descriptor ring. */
1403 if ((rc = sfxge_dma_alloc(sc, EFX_TXQ_SIZE(sc->txq_entries), esmp)) != 0)
1404 return (rc);
1405
1406 /* Allocate buffer table entries. */
1407 sfxge_sram_buf_tbl_alloc(sc, EFX_TXQ_NBUFS(sc->txq_entries),
1408 &txq->buf_base_id);
1409
1410 /* Create a DMA tag for packet mappings. */
1411 if (bus_dma_tag_create(sc->parent_dma_tag, 1, 0x1000,
1412 MIN(0x3FFFFFFFFFFFUL, BUS_SPACE_MAXADDR), BUS_SPACE_MAXADDR, NULL,
1413 NULL, 0x11000, SFXGE_TX_MAPPING_MAX_SEG, 0x1000, 0, NULL, NULL,
1414 &txq->packet_dma_tag) != 0) {
1415 device_printf(sc->dev, "Couldn't allocate txq DMA tag\n");
1416 rc = ENOMEM;
1417 goto fail;
1418 }
1419
1420 /* Allocate pending descriptor array for batching writes. */
1421 txq->pend_desc = malloc(sizeof(efx_buffer_t) * sc->txq_entries,
1422 M_SFXGE, M_ZERO | M_WAITOK);
1423
1424 /* Allocate and initialise mbuf DMA mapping array. */
1425 txq->stmp = malloc(sizeof(struct sfxge_tx_mapping) * sc->txq_entries,
1426 M_SFXGE, M_ZERO | M_WAITOK);
1427 for (nmaps = 0; nmaps < sc->txq_entries; nmaps++) {
1428 rc = bus_dmamap_create(txq->packet_dma_tag, 0,
1429 &txq->stmp[nmaps].map);
1430 if (rc != 0)
1431 goto fail2;
1432 }
1433
1434 snprintf(name, sizeof(name), "%u", txq_index);
1435 txq_node = SYSCTL_ADD_NODE(
1436 device_get_sysctl_ctx(sc->dev),
1437 SYSCTL_CHILDREN(sc->txqs_node),
1438 OID_AUTO, name, CTLFLAG_RD, NULL, "");
1439 if (txq_node == NULL) {
1440 rc = ENOMEM;
1441 goto fail_txq_node;
1442 }
1443
1444 if (type == SFXGE_TXQ_IP_TCP_UDP_CKSUM &&
1445 (rc = tso_init(txq)) != 0)
1446 goto fail3;
1447
1448#ifdef SFXGE_HAVE_MQ
1449 if (sfxge_tx_dpl_get_max <= 0) {
1450 log(LOG_ERR, "%s=%d must be greater than 0",
1451 SFXGE_PARAM_TX_DPL_GET_MAX, sfxge_tx_dpl_get_max);
1452 rc = EINVAL;
1453 goto fail_tx_dpl_get_max;
1454 }
1455 if (sfxge_tx_dpl_get_non_tcp_max <= 0) {
1456 log(LOG_ERR, "%s=%d must be greater than 0",
1457 SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX,
1458 sfxge_tx_dpl_get_non_tcp_max);
1459 rc = EINVAL;
1460 goto fail_tx_dpl_get_max;
1461 }
1462 if (sfxge_tx_dpl_put_max < 0) {
1463 log(LOG_ERR, "%s=%d must be greater or equal to 0",
1464 SFXGE_PARAM_TX_DPL_PUT_MAX, sfxge_tx_dpl_put_max);
1465 rc = EINVAL;
1466 goto fail_tx_dpl_put_max;
1467 }
1468
1469 /* Initialize the deferred packet list. */
1470 stdp = &txq->dpl;
1471 stdp->std_put_max = sfxge_tx_dpl_put_max;
1472 stdp->std_get_max = sfxge_tx_dpl_get_max;
1473 stdp->std_get_non_tcp_max = sfxge_tx_dpl_get_non_tcp_max;
1474 stdp->std_getp = &stdp->std_get;
1475
1476 SFXGE_TXQ_LOCK_INIT(txq, device_get_nameunit(sc->dev), txq_index);
1477
1478 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev),
1479 SYSCTL_CHILDREN(txq_node), OID_AUTO,
1480 "dpl_get_count", CTLFLAG_RD | CTLFLAG_STATS,
1481 &stdp->std_get_count, 0, "");
1482 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev),
1483 SYSCTL_CHILDREN(txq_node), OID_AUTO,
1484 "dpl_get_non_tcp_count", CTLFLAG_RD | CTLFLAG_STATS,
1485 &stdp->std_get_non_tcp_count, 0, "");
1486 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev),
1487 SYSCTL_CHILDREN(txq_node), OID_AUTO,
1488 "dpl_get_hiwat", CTLFLAG_RD | CTLFLAG_STATS,
1489 &stdp->std_get_hiwat, 0, "");
1490 SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev),
1491 SYSCTL_CHILDREN(txq_node), OID_AUTO,
1492 "dpl_put_hiwat", CTLFLAG_RD | CTLFLAG_STATS,
1493 &stdp->std_put_hiwat, 0, "");
1494#endif
1495
1496 txq->type = type;
1497 txq->evq_index = evq_index;
1498 txq->txq_index = txq_index;
1499 txq->init_state = SFXGE_TXQ_INITIALIZED;
1500
1501 return (0);
1502
1503fail_tx_dpl_put_max:
1504fail_tx_dpl_get_max:
1505fail3:
1506fail_txq_node:
1507 free(txq->pend_desc, M_SFXGE);
1508fail2:
1509 while (nmaps-- != 0)
1510 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map);
1511 free(txq->stmp, M_SFXGE);
1512 bus_dma_tag_destroy(txq->packet_dma_tag);
1513
1514fail:
1515 sfxge_dma_free(esmp);
1516
1517 return (rc);
1518}
1519
1520static const struct {
1521 const char *name;
1522 size_t offset;
1523} sfxge_tx_stats[] = {
1524#define SFXGE_TX_STAT(name, member) \
1525 { #name, offsetof(struct sfxge_txq, member) }
1526 SFXGE_TX_STAT(tso_bursts, tso_bursts),
1527 SFXGE_TX_STAT(tso_packets, tso_packets),
1528 SFXGE_TX_STAT(tso_long_headers, tso_long_headers),
1529 SFXGE_TX_STAT(tso_pdrop_too_many, tso_pdrop_too_many),
1530 SFXGE_TX_STAT(tso_pdrop_no_rsrc, tso_pdrop_no_rsrc),
1531 SFXGE_TX_STAT(tx_collapses, collapses),
1532 SFXGE_TX_STAT(tx_drops, drops),
1533 SFXGE_TX_STAT(tx_get_overflow, get_overflow),
1534 SFXGE_TX_STAT(tx_get_non_tcp_overflow, get_non_tcp_overflow),
1535 SFXGE_TX_STAT(tx_put_overflow, put_overflow),
1536 SFXGE_TX_STAT(tx_netdown_drops, netdown_drops),
1537};
1538
1539static int
1540sfxge_tx_stat_handler(SYSCTL_HANDLER_ARGS)
1541{
1542 struct sfxge_softc *sc = arg1;
1543 unsigned int id = arg2;
1544 unsigned long sum;
1545 unsigned int index;
1546
1547 /* Sum across all TX queues */
1548 sum = 0;
1549 for (index = 0; index < sc->txq_count; index++)
1550 sum += *(unsigned long *)((caddr_t)sc->txq[index] +
1551 sfxge_tx_stats[id].offset);
1552
1553 return (SYSCTL_OUT(req, &sum, sizeof(sum)));
1554}
1555
1556static void
1557sfxge_tx_stat_init(struct sfxge_softc *sc)
1558{
1559 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
1560 struct sysctl_oid_list *stat_list;
1561 unsigned int id;
1562
1563 stat_list = SYSCTL_CHILDREN(sc->stats_node);
1564
1565 for (id = 0; id < nitems(sfxge_tx_stats); id++) {
1566 SYSCTL_ADD_PROC(
1567 ctx, stat_list,
1568 OID_AUTO, sfxge_tx_stats[id].name,
1569 CTLTYPE_ULONG|CTLFLAG_RD,
1570 sc, id, sfxge_tx_stat_handler, "LU",
1571 "");
1572 }
1573}
1574
1575void
1576sfxge_tx_fini(struct sfxge_softc *sc)
1577{
1578 int index;
1579
1580 index = sc->txq_count;
1581 while (--index >= 0)
1582 sfxge_tx_qfini(sc, index);
1583
1584 sc->txq_count = 0;
1585}
1586
1587
1588int
1589sfxge_tx_init(struct sfxge_softc *sc)
1590{
1591 struct sfxge_intr *intr;
1592 int index;
1593 int rc;
1594
1595 intr = &sc->intr;
1596
1597 KASSERT(intr->state == SFXGE_INTR_INITIALIZED,
1598 ("intr->state != SFXGE_INTR_INITIALIZED"));
1599
1600#ifdef SFXGE_HAVE_MQ
1601 sc->txq_count = SFXGE_TXQ_NTYPES - 1 + sc->intr.n_alloc;
1602#else
1603 sc->txq_count = SFXGE_TXQ_NTYPES;
1604#endif
1605
1606 sc->txqs_node = SYSCTL_ADD_NODE(
1607 device_get_sysctl_ctx(sc->dev),
1608 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)),
1609 OID_AUTO, "txq", CTLFLAG_RD, NULL, "Tx queues");
1610 if (sc->txqs_node == NULL) {
1611 rc = ENOMEM;
1612 goto fail_txq_node;
1613 }
1614
1615 /* Initialize the transmit queues */
1616 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NON_CKSUM,
1617 SFXGE_TXQ_NON_CKSUM, 0)) != 0)
1618 goto fail;
1619
1620 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_IP_CKSUM,
1621 SFXGE_TXQ_IP_CKSUM, 0)) != 0)
1622 goto fail2;
1623
1624 for (index = 0;
1625 index < sc->txq_count - SFXGE_TXQ_NTYPES + 1;
1626 index++) {
1627 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NTYPES - 1 + index,
1628 SFXGE_TXQ_IP_TCP_UDP_CKSUM, index)) != 0)
1629 goto fail3;
1630 }
1631
1632 sfxge_tx_stat_init(sc);
1633
1634 return (0);
1635
1636fail3:
1637 while (--index >= 0)
1638 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index);
1639
1640 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_CKSUM);
1641
1642fail2:
1643 sfxge_tx_qfini(sc, SFXGE_TXQ_NON_CKSUM);
1644
1645fail:
1646fail_txq_node:
1647 sc->txq_count = 0;
1648 return (rc);
1649}