| sdhci.c (227309) | sdhci.c (231266) |
|---|---|
| 1/*- 2 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26#include <sys/cdefs.h> |
| 27__FBSDID("$FreeBSD: head/sys/dev/sdhci/sdhci.c 227309 2011-11-07 15:43:11Z ed $"); | 27__FBSDID("$FreeBSD: head/sys/dev/sdhci/sdhci.c 231266 2012-02-09 10:20:41Z glebius $"); |
| 28 29#include <sys/param.h> 30#include <sys/systm.h> 31#include <sys/bus.h> 32#include <sys/conf.h> 33#include <sys/kernel.h> 34#include <sys/lock.h> 35#include <sys/module.h> --- 33 unchanged lines hidden (view full) --- 69/* Controller can only DMA chunk sizes that are a multiple of 32 bits */ 70#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<5) 71/* Controller needs to be reset after each request to stay stable */ 72#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<6) 73/* Controller has an off-by-one issue with timeout value */ 74#define SDHCI_QUIRK_INCR_TIMEOUT_CONTROL (1<<7) 75/* Controller has broken read timings */ 76#define SDHCI_QUIRK_BROKEN_TIMINGS (1<<8) | 28 29#include <sys/param.h> 30#include <sys/systm.h> 31#include <sys/bus.h> 32#include <sys/conf.h> 33#include <sys/kernel.h> 34#include <sys/lock.h> 35#include <sys/module.h> --- 33 unchanged lines hidden (view full) --- 69/* Controller can only DMA chunk sizes that are a multiple of 32 bits */ 70#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<5) 71/* Controller needs to be reset after each request to stay stable */ 72#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<6) 73/* Controller has an off-by-one issue with timeout value */ 74#define SDHCI_QUIRK_INCR_TIMEOUT_CONTROL (1<<7) 75/* Controller has broken read timings */ 76#define SDHCI_QUIRK_BROKEN_TIMINGS (1<<8) |
| 77/* Controller needs lowered frequency */ 78#define SDHCI_QUIRK_LOWER_FREQUENCY (1<<9) |
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| 77 78static const struct sdhci_device { 79 uint32_t model; 80 uint16_t subvendor; 81 char *desc; 82 u_int quirks; 83} sdhci_devices[] = { 84 { 0x08221180, 0xffff, "RICOH R5C822 SD", 85 SDHCI_QUIRK_FORCE_DMA }, 86 { 0xe8221180, 0xffff, "RICOH SD", 87 SDHCI_QUIRK_FORCE_DMA }, | 79 80static const struct sdhci_device { 81 uint32_t model; 82 uint16_t subvendor; 83 char *desc; 84 u_int quirks; 85} sdhci_devices[] = { 86 { 0x08221180, 0xffff, "RICOH R5C822 SD", 87 SDHCI_QUIRK_FORCE_DMA }, 88 { 0xe8221180, 0xffff, "RICOH SD", 89 SDHCI_QUIRK_FORCE_DMA }, |
| 90 { 0xe8231180, 0xffff, "RICOH R5CE823 SD", 91 SDHCI_QUIRK_LOWER_FREQUENCY }, |
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| 88 { 0x8034104c, 0xffff, "TI XX21/XX11 SD", 89 SDHCI_QUIRK_FORCE_DMA }, 90 { 0x05501524, 0xffff, "ENE CB712 SD", 91 SDHCI_QUIRK_BROKEN_TIMINGS }, 92 { 0x05511524, 0xffff, "ENE CB712 SD 2", 93 SDHCI_QUIRK_BROKEN_TIMINGS }, 94 { 0x07501524, 0xffff, "ENE CB714 SD", 95 SDHCI_QUIRK_RESET_ON_IOS | --- 249 unchanged lines hidden (view full) --- 345 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | 346 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE | 347 SDHCI_INT_ACMD12ERR; 348 WR4(slot, SDHCI_INT_ENABLE, slot->intmask); 349 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask); 350} 351 352static void | 92 { 0x8034104c, 0xffff, "TI XX21/XX11 SD", 93 SDHCI_QUIRK_FORCE_DMA }, 94 { 0x05501524, 0xffff, "ENE CB712 SD", 95 SDHCI_QUIRK_BROKEN_TIMINGS }, 96 { 0x05511524, 0xffff, "ENE CB712 SD 2", 97 SDHCI_QUIRK_BROKEN_TIMINGS }, 98 { 0x07501524, 0xffff, "ENE CB714 SD", 99 SDHCI_QUIRK_RESET_ON_IOS | --- 249 unchanged lines hidden (view full) --- 349 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | 350 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE | 351 SDHCI_INT_ACMD12ERR; 352 WR4(slot, SDHCI_INT_ENABLE, slot->intmask); 353 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask); 354} 355 356static void |
| 357sdhci_lower_frequency(device_t dev) 358{ 359 360 /* Enable SD2.0 mode. */ 361 pci_write_config(dev, SDHC_PCI_MODE_KEY, 0xfc, 1); 362 pci_write_config(dev, SDHC_PCI_MODE, SDHC_PCI_MODE_SD20, 1); 363 pci_write_config(dev, SDHC_PCI_MODE_KEY, 0x00, 1); 364 365 /* 366 * Some SD/MMC cards don't work with the default base 367 * clock frequency of 200MHz. Lower it to 50Hz. 368 */ 369 pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x01, 1); 370 pci_write_config(dev, SDHC_PCI_BASE_FREQ, 50, 1); 371 pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x00, 1); 372} 373 374static void |
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| 353sdhci_set_clock(struct sdhci_slot *slot, uint32_t clock) 354{ 355 uint32_t res; 356 uint16_t clk; 357 int timeout; 358 359 if (clock == slot->clock) 360 return; --- 265 unchanged lines hidden (view full) --- 626 for (i = 0; sdhci_devices[i].model != 0; i++) { 627 if (sdhci_devices[i].model == model && 628 (sdhci_devices[i].subvendor == 0xffff || 629 sdhci_devices[i].subvendor == subvendor)) { 630 sc->quirks = sdhci_devices[i].quirks; 631 break; 632 } 633 } | 375sdhci_set_clock(struct sdhci_slot *slot, uint32_t clock) 376{ 377 uint32_t res; 378 uint16_t clk; 379 int timeout; 380 381 if (clock == slot->clock) 382 return; --- 265 unchanged lines hidden (view full) --- 648 for (i = 0; sdhci_devices[i].model != 0; i++) { 649 if (sdhci_devices[i].model == model && 650 (sdhci_devices[i].subvendor == 0xffff || 651 sdhci_devices[i].subvendor == subvendor)) { 652 sc->quirks = sdhci_devices[i].quirks; 653 break; 654 } 655 } |
| 656 /* Some controllers need to be bumped into the right mode. */ 657 if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY) 658 sdhci_lower_frequency(dev); |
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| 634 /* Read slots info from PCI registers. */ 635 slots = pci_read_config(dev, PCI_SLOT_INFO, 1); 636 bar = PCI_SLOT_INFO_FIRST_BAR(slots); 637 slots = PCI_SLOT_INFO_SLOTS(slots); 638 if (slots > 6 || bar > 5) { 639 device_printf(dev, "Incorrect slots information (%d, %d).\n", 640 slots, bar); 641 return (EINVAL); --- 936 unchanged lines hidden --- | 659 /* Read slots info from PCI registers. */ 660 slots = pci_read_config(dev, PCI_SLOT_INFO, 1); 661 bar = PCI_SLOT_INFO_FIRST_BAR(slots); 662 slots = PCI_SLOT_INFO_SLOTS(slots); 663 if (slots > 6 || bar > 5) { 664 device_printf(dev, "Incorrect slots information (%d, %d).\n", 665 slots, bar); 666 return (EINVAL); --- 936 unchanged lines hidden --- |