ppcreg.h (184130) | ppcreg.h (187576) |
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1/*- 2 * Copyright (c) 2001 Alcove - Nicolas Souchu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2001 Alcove - Nicolas Souchu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
26 * $FreeBSD: head/sys/dev/ppc/ppcreg.h 184130 2008-10-21 18:30:10Z jhb $ | 26 * $FreeBSD: head/sys/dev/ppc/ppcreg.h 187576 2009-01-21 23:10:06Z jhb $ |
27 * 28 */ 29#ifndef __PPCREG_H 30#define __PPCREG_H 31 | 27 * 28 */ 29#ifndef __PPCREG_H 30#define __PPCREG_H 31 |
32#include <sys/_lock.h> 33#include <sys/_mutex.h> 34 |
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32/* 33 * Parallel Port Chipset type. 34 */ 35#define SMC_LIKE 0 36#define SMC_37C665GT 1 37#define SMC_37C666GT 2 38#define NS_PC87332 3 39#define NS_PC87306 4 --- 63 unchanged lines hidden (view full) --- 103 104 device_t ppbus; /* parallel port chipset corresponding ppbus */ 105 106 int rid_irq, rid_drq, rid_ioport; 107 struct resource *res_irq, *res_drq, *res_ioport; 108 109 void *intr_cookie; 110 | 35/* 36 * Parallel Port Chipset type. 37 */ 38#define SMC_LIKE 0 39#define SMC_37C665GT 1 40#define SMC_37C666GT 2 41#define NS_PC87332 3 42#define NS_PC87306 4 --- 63 unchanged lines hidden (view full) --- 106 107 device_t ppbus; /* parallel port chipset corresponding ppbus */ 108 109 int rid_irq, rid_drq, rid_ioport; 110 struct resource *res_irq, *res_drq, *res_ioport; 111 112 void *intr_cookie; 113 |
111 struct intr_event *ppc_intr_event; 112 int ppc_child_handlers; | 114 ppc_intr_handler ppc_intr_hook; 115 void *ppc_intr_arg; 116 117 struct mtx ppc_lock; |
113}; 114 | 118}; 119 |
120#define PPC_LOCK(data) mtx_lock(&(data)->ppc_lock) 121#define PPC_UNLOCK(data) mtx_unlock(&(data)->ppc_lock) 122#define PPC_ASSERT_LOCKED(data) mtx_assert(&(data)->ppc_lock, MA_OWNED) 123 |
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115/* 116 * Parallel Port Chipset registers. 117 */ 118#define PPC_SPP_DTR 0 /* SPP data register */ 119#define PPC_ECP_A_FIFO 0 /* ECP Address fifo register */ 120#define PPC_SPP_STR 1 /* SPP status register */ 121#define PPC_SPP_CTR 2 /* SPP control register */ 122#define PPC_EPP_ADDR 3 /* EPP address register (8 bit) */ --- 156 unchanged lines hidden --- | 124/* 125 * Parallel Port Chipset registers. 126 */ 127#define PPC_SPP_DTR 0 /* SPP data register */ 128#define PPC_ECP_A_FIFO 0 /* ECP Address fifo register */ 129#define PPC_SPP_STR 1 /* SPP status register */ 130#define PPC_SPP_CTR 2 /* SPP control register */ 131#define PPC_EPP_ADDR 3 /* EPP address register (8 bit) */ --- 156 unchanged lines hidden --- |