ppc.c (184176) | ppc.c (185003) |
---|---|
1/*- 2 * Copyright (c) 1997-2000 Nicolas Souchu 3 * Copyright (c) 2001 Alcove - Nicolas Souchu 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 12 unchanged lines hidden (view full) --- 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 1997-2000 Nicolas Souchu 3 * Copyright (c) 2001 Alcove - Nicolas Souchu 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 12 unchanged lines hidden (view full) --- 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> |
29__FBSDID("$FreeBSD: head/sys/dev/ppc/ppc.c 184176 2008-10-22 19:39:16Z jhb $"); | 29__FBSDID("$FreeBSD: head/sys/dev/ppc/ppc.c 185003 2008-11-16 17:42:02Z jhb $"); |
30 31#include "opt_ppc.h" 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/bus.h> 36#include <sys/kernel.h> 37#include <sys/interrupt.h> 38#include <sys/module.h> 39#include <sys/malloc.h> 40#include <sys/proc.h> | 30 31#include "opt_ppc.h" 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/bus.h> 36#include <sys/kernel.h> 37#include <sys/interrupt.h> 38#include <sys/module.h> 39#include <sys/malloc.h> 40#include <sys/proc.h> |
41 | 41 |
42#include <machine/bus.h> 43#include <machine/resource.h> 44#include <sys/rman.h> 45 46#ifdef __i386__ 47#include <vm/vm.h> 48#include <vm/pmap.h> 49#include <machine/vmparam.h> --- 59 unchanged lines hidden (view full) --- 109#define BIOS_PORTS (short *)(KERNBASE+BIOS_PPC_PORTS) 110#define BIOS_MAX_PPC 4 111#endif 112 113/* 114 * ppc_ecp_sync() XXX 115 */ 116void | 42#include <machine/bus.h> 43#include <machine/resource.h> 44#include <sys/rman.h> 45 46#ifdef __i386__ 47#include <vm/vm.h> 48#include <vm/pmap.h> 49#include <machine/vmparam.h> --- 59 unchanged lines hidden (view full) --- 109#define BIOS_PORTS (short *)(KERNBASE+BIOS_PPC_PORTS) 110#define BIOS_MAX_PPC 4 111#endif 112 113/* 114 * ppc_ecp_sync() XXX 115 */ 116void |
117ppc_ecp_sync(device_t dev) { 118 | 117ppc_ecp_sync(device_t dev) 118{ |
119 int i, r; 120 struct ppc_data *ppc = DEVTOSOFTC(dev); 121 122 if (!(ppc->ppc_avm & PPB_ECP) && !(ppc->ppc_dtm & PPB_ECP)) 123 return; 124 125 r = r_ecr(ppc); 126 if ((r & 0xe0) != PPC_ECR_EPP) --- 17 unchanged lines hidden (view full) --- 144 * Detect parallel port FIFO 145 */ 146static int 147ppc_detect_fifo(struct ppc_data *ppc) 148{ 149 char ecr_sav; 150 char ctr_sav, ctr, cc; 151 short i; | 119 int i, r; 120 struct ppc_data *ppc = DEVTOSOFTC(dev); 121 122 if (!(ppc->ppc_avm & PPB_ECP) && !(ppc->ppc_dtm & PPB_ECP)) 123 return; 124 125 r = r_ecr(ppc); 126 if ((r & 0xe0) != PPC_ECR_EPP) --- 17 unchanged lines hidden (view full) --- 144 * Detect parallel port FIFO 145 */ 146static int 147ppc_detect_fifo(struct ppc_data *ppc) 148{ 149 char ecr_sav; 150 char ctr_sav, ctr, cc; 151 short i; |
152 | 152 |
153 /* save registers */ 154 ecr_sav = r_ecr(ppc); 155 ctr_sav = r_ctr(ppc); 156 157 /* enter ECP configuration mode, no interrupt, no DMA */ 158 w_ecr(ppc, 0xf4); 159 160 /* read PWord size - transfers in FIFO mode must be PWord aligned */ --- 70 unchanged lines hidden (view full) --- 231 } 232 } 233 234 /* FIFO must be empty after the last byte */ 235 if (!(r_ecr(ppc) & PPC_FIFO_EMPTY)) { 236 LOG_PPC(__func__, ppc, "can't empty the FIFO"); 237 goto error; 238 } | 153 /* save registers */ 154 ecr_sav = r_ecr(ppc); 155 ctr_sav = r_ctr(ppc); 156 157 /* enter ECP configuration mode, no interrupt, no DMA */ 158 w_ecr(ppc, 0xf4); 159 160 /* read PWord size - transfers in FIFO mode must be PWord aligned */ --- 70 unchanged lines hidden (view full) --- 231 } 232 } 233 234 /* FIFO must be empty after the last byte */ 235 if (!(r_ecr(ppc) & PPC_FIFO_EMPTY)) { 236 LOG_PPC(__func__, ppc, "can't empty the FIFO"); 237 goto error; 238 } |
239 | 239 |
240 w_ctr(ppc, ctr_sav); 241 w_ecr(ppc, ecr_sav); 242 243 return (0); 244 245error: 246 w_ctr(ppc, ctr_sav); 247 w_ecr(ppc, ecr_sav); --- 154 unchanged lines hidden (view full) --- 402}; 403 404static int 405ppc_pc873xx_detect(struct ppc_data *ppc, int chipset_mode) /* XXX mode never forced */ 406{ 407 static int index = 0; 408 int idport, irq; 409 int ptr, pcr, val, i; | 240 w_ctr(ppc, ctr_sav); 241 w_ecr(ppc, ecr_sav); 242 243 return (0); 244 245error: 246 w_ctr(ppc, ctr_sav); 247 w_ecr(ppc, ecr_sav); --- 154 unchanged lines hidden (view full) --- 402}; 403 404static int 405ppc_pc873xx_detect(struct ppc_data *ppc, int chipset_mode) /* XXX mode never forced */ 406{ 407 static int index = 0; 408 int idport, irq; 409 int ptr, pcr, val, i; |
410 | 410 |
411 while ((idport = pc873xx_basetab[index++])) { | 411 while ((idport = pc873xx_basetab[index++])) { |
412 | 412 |
413 /* XXX should check first to see if this location is already claimed */ 414 415 /* 416 * Pull the 873xx through the power-on ID cycle (2.2,1.). 417 * We can't use this to locate the chip as it may already have 418 * been used by the BIOS. 419 */ 420 (void)inb(idport); (void)inb(idport); --- 30 unchanged lines hidden (view full) --- 451 printf("PC873xx"); 452 for (i=0; pc873xx_regstab[i] != -1; i++) { 453 outb(idport, pc873xx_regstab[i]); 454 printf(" %s=0x%x", pc873xx_rnametab[i], 455 inb(idport + 1) & 0xff); 456 } 457 printf("\n"); 458 } | 413 /* XXX should check first to see if this location is already claimed */ 414 415 /* 416 * Pull the 873xx through the power-on ID cycle (2.2,1.). 417 * We can't use this to locate the chip as it may already have 418 * been used by the BIOS. 419 */ 420 (void)inb(idport); (void)inb(idport); --- 30 unchanged lines hidden (view full) --- 451 printf("PC873xx"); 452 for (i=0; pc873xx_regstab[i] != -1; i++) { 453 outb(idport, pc873xx_regstab[i]); 454 printf(" %s=0x%x", pc873xx_rnametab[i], 455 inb(idport + 1) & 0xff); 456 } 457 printf("\n"); 458 } |
459 | 459 |
460 /* 461 * We think we have one. Is it enabled and where we want it to be? 462 */ 463 outb(idport, PC873_FER); 464 val = inb(idport + 1); 465 if (!(val & PC873_PPENABLE)) { 466 if (bootverbose) 467 printf("PC873xx parallel port disabled\n"); --- 40 unchanged lines hidden (view full) --- 508 if (bootverbose) 509 printf("PC873xx at 0x%x not for driver at port 0x%x\n", 510 pc873xx_porttab[val], ppc->ppc_base); 511 } 512 continue; 513 } 514 515 outb(idport, PC873_PTR); | 460 /* 461 * We think we have one. Is it enabled and where we want it to be? 462 */ 463 outb(idport, PC873_FER); 464 val = inb(idport + 1); 465 if (!(val & PC873_PPENABLE)) { 466 if (bootverbose) 467 printf("PC873xx parallel port disabled\n"); --- 40 unchanged lines hidden (view full) --- 508 if (bootverbose) 509 printf("PC873xx at 0x%x not for driver at port 0x%x\n", 510 pc873xx_porttab[val], ppc->ppc_base); 511 } 512 continue; 513 } 514 515 outb(idport, PC873_PTR); |
516 ptr = inb(idport + 1); | 516 ptr = inb(idport + 1); |
517 518 /* get irq settings */ 519 if (ppc->ppc_base == 0x378) 520 irq = (ptr & PC873_LPTBIRQ7) ? 7 : 5; 521 else 522 irq = pc873xx_irqtab[val]; 523 524 if (bootverbose) 525 printf("PC873xx irq %d at 0x%x\n", irq, ppc->ppc_base); | 517 518 /* get irq settings */ 519 if (ppc->ppc_base == 0x378) 520 irq = (ptr & PC873_LPTBIRQ7) ? 7 : 5; 521 else 522 irq = pc873xx_irqtab[val]; 523 524 if (bootverbose) 525 printf("PC873xx irq %d at 0x%x\n", irq, ppc->ppc_base); |
526 | 526 |
527 /* 528 * Check if irq settings are correct 529 */ 530 if (irq != ppc->ppc_irq) { 531 /* 532 * If the chipset is not locked and base address is 0x378, 533 * we have another chance 534 */ --- 13 unchanged lines hidden (view full) --- 548 } 549 } else { 550 if (bootverbose) 551 printf("PC873xx irq settings are correct\n"); 552 } 553 554 outb(idport, PC873_PCR); 555 pcr = inb(idport + 1); | 527 /* 528 * Check if irq settings are correct 529 */ 530 if (irq != ppc->ppc_irq) { 531 /* 532 * If the chipset is not locked and base address is 0x378, 533 * we have another chance 534 */ --- 13 unchanged lines hidden (view full) --- 548 } 549 } else { 550 if (bootverbose) 551 printf("PC873xx irq settings are correct\n"); 552 } 553 554 outb(idport, PC873_PCR); 555 pcr = inb(idport + 1); |
556 | 556 |
557 if ((ptr & PC873_CFGLOCK) || !chipset_mode) { 558 if (bootverbose) 559 printf("PC873xx %s", (ptr & PC873_CFGLOCK)?"locked":"unlocked"); 560 561 ppc->ppc_avm |= PPB_NIBBLE; 562 if (bootverbose) 563 printf(", NIBBLE"); 564 565 if (pcr & PC873_EPPEN) { | 557 if ((ptr & PC873_CFGLOCK) || !chipset_mode) { 558 if (bootverbose) 559 printf("PC873xx %s", (ptr & PC873_CFGLOCK)?"locked":"unlocked"); 560 561 ppc->ppc_avm |= PPB_NIBBLE; 562 if (bootverbose) 563 printf(", NIBBLE"); 564 565 if (pcr & PC873_EPPEN) { |
566 ppc->ppc_avm |= PPB_EPP; | 566 ppc->ppc_avm |= PPB_EPP; |
567 568 if (bootverbose) 569 printf(", EPP"); 570 571 if (pcr & PC873_EPP19) 572 ppc->ppc_epp = EPP_1_9; 573 else 574 ppc->ppc_epp = EPP_1_7; --- 16 unchanged lines hidden (view full) --- 591 if (bootverbose) 592 printf(", PS/2"); 593 } 594 } else { 595 outb(idport, PC873_PTR); 596 ptr = inb(idport + 1); 597 if (ptr & PC873_EXTENDED) { 598 ppc->ppc_avm |= PPB_SPP; | 567 568 if (bootverbose) 569 printf(", EPP"); 570 571 if (pcr & PC873_EPP19) 572 ppc->ppc_epp = EPP_1_9; 573 else 574 ppc->ppc_epp = EPP_1_7; --- 16 unchanged lines hidden (view full) --- 591 if (bootverbose) 592 printf(", PS/2"); 593 } 594 } else { 595 outb(idport, PC873_PTR); 596 ptr = inb(idport + 1); 597 if (ptr & PC873_EXTENDED) { 598 ppc->ppc_avm |= PPB_SPP; |
599 if (bootverbose) 600 printf(", SPP"); | 599 if (bootverbose) 600 printf(", SPP"); |
601 } 602 } 603 } else { 604 if (bootverbose) 605 printf("PC873xx unlocked"); 606 607 if (chipset_mode & PPB_ECP) { 608 if ((chipset_mode & PPB_EPP) && bootverbose) --- 38 unchanged lines hidden (view full) --- 647 outb(idport, PC873_PTR); 648 ptr = inb(idport + 1); 649 650 if (chipset_mode & PPB_PS2) { 651 ptr |= PC873_EXTENDED; 652 653 if (bootverbose) 654 printf(", PS/2"); | 601 } 602 } 603 } else { 604 if (bootverbose) 605 printf("PC873xx unlocked"); 606 607 if (chipset_mode & PPB_ECP) { 608 if ((chipset_mode & PPB_EPP) && bootverbose) --- 38 unchanged lines hidden (view full) --- 647 outb(idport, PC873_PTR); 648 ptr = inb(idport + 1); 649 650 if (chipset_mode & PPB_PS2) { 651 ptr |= PC873_EXTENDED; 652 653 if (bootverbose) 654 printf(", PS/2"); |
655 | 655 |
656 } else { 657 /* default to NIBBLE mode */ 658 ptr &= ~PC873_EXTENDED; 659 660 if (bootverbose) 661 printf(", NIBBLE"); 662 } 663 outb(idport + 1, ptr); --- 30 unchanged lines hidden (view full) --- 694 int port_address[] = { -1 /* disabled */ , 0x3bc, 0x378, 0x278 }; 695 696 697#define cio csr+1 /* config IO port is either 0x3F1 or 0x371 */ 698 699 /* 700 * Detection: enter configuration mode and read CRD register. 701 */ | 656 } else { 657 /* default to NIBBLE mode */ 658 ptr &= ~PC873_EXTENDED; 659 660 if (bootverbose) 661 printf(", NIBBLE"); 662 } 663 outb(idport + 1, ptr); --- 30 unchanged lines hidden (view full) --- 694 int port_address[] = { -1 /* disabled */ , 0x3bc, 0x378, 0x278 }; 695 696 697#define cio csr+1 /* config IO port is either 0x3F1 or 0x371 */ 698 699 /* 700 * Detection: enter configuration mode and read CRD register. 701 */ |
702 | 702 |
703 s = splhigh(); 704 outb(csr, SMC665_iCODE); 705 outb(csr, SMC665_iCODE); 706 splx(s); 707 708 outb(csr, 0xd); 709 if (inb(cio) == 0x65) { 710 type = SMC_37C665GT; --- 198 unchanged lines hidden (view full) --- 909 if (type == -1) { 910 outb(SMC935_CFG, 0xaa); /* exit config mode */ 911 return (-1); 912 } 913 914 ppc->ppc_model = type; 915 916 outb(SMC935_IND, SMC935_LOGDEV); /* select parallel port, */ | 703 s = splhigh(); 704 outb(csr, SMC665_iCODE); 705 outb(csr, SMC665_iCODE); 706 splx(s); 707 708 outb(csr, 0xd); 709 if (inb(cio) == 0x65) { 710 type = SMC_37C665GT; --- 198 unchanged lines hidden (view full) --- 909 if (type == -1) { 910 outb(SMC935_CFG, 0xaa); /* exit config mode */ 911 return (-1); 912 } 913 914 ppc->ppc_model = type; 915 916 outb(SMC935_IND, SMC935_LOGDEV); /* select parallel port, */ |
917 outb(SMC935_DAT, 3); /* which is logical device 3 */ | 917 outb(SMC935_DAT, 3); /* which is logical device 3 */ |
918 919 /* set io port base */ 920 outb(SMC935_IND, SMC935_PORTHI); 921 outb(SMC935_DAT, (u_char)((ppc->ppc_base & 0xff00) >> 8)); 922 outb(SMC935_IND, SMC935_PORTLO); 923 outb(SMC935_DAT, (u_char)(ppc->ppc_base & 0xff)); 924 925 if (!chipset_mode) --- 52 unchanged lines hidden (view full) --- 978 * EFER: extended function enable register 979 * EFIR: extended function index register 980 * EFDR: extended function data register 981 */ 982#define efir ((efer == 0x250) ? 0x251 : 0x3f0) 983#define efdr ((efer == 0x250) ? 0x252 : 0x3f1) 984 985static int w83877f_efers[] = { 0x250, 0x3f0, 0x3f0, 0x250 }; | 918 919 /* set io port base */ 920 outb(SMC935_IND, SMC935_PORTHI); 921 outb(SMC935_DAT, (u_char)((ppc->ppc_base & 0xff00) >> 8)); 922 outb(SMC935_IND, SMC935_PORTLO); 923 outb(SMC935_DAT, (u_char)(ppc->ppc_base & 0xff)); 924 925 if (!chipset_mode) --- 52 unchanged lines hidden (view full) --- 978 * EFER: extended function enable register 979 * EFIR: extended function index register 980 * EFDR: extended function data register 981 */ 982#define efir ((efer == 0x250) ? 0x251 : 0x3f0) 983#define efdr ((efer == 0x250) ? 0x252 : 0x3f1) 984 985static int w83877f_efers[] = { 0x250, 0x3f0, 0x3f0, 0x250 }; |
986static int w83877f_keys[] = { 0x89, 0x86, 0x87, 0x88 }; | 986static int w83877f_keys[] = { 0x89, 0x86, 0x87, 0x88 }; |
987static int w83877f_keyiter[] = { 1, 2, 2, 1 }; 988static int w83877f_hefs[] = { WINB_HEFERE, WINB_HEFRAS, WINB_HEFERE | WINB_HEFRAS, 0 }; 989 990static int 991ppc_w83877f_detect(struct ppc_data *ppc, int chipset_mode) 992{ 993 int i, j, efer; 994 unsigned char r, hefere, hefras; --- 322 unchanged lines hidden (view full) --- 1317 1318#define r_reg(reg,ppc) (bus_read_1((ppc)->res_ioport, reg)) 1319#define w_reg(reg, ppc, byte) (bus_write_1((ppc)->res_ioport, reg, byte)) 1320 1321#define INCR_PC (mi ++) /* increment program counter */ 1322 1323 mi = *p_msq; 1324 for (;;) { | 987static int w83877f_keyiter[] = { 1, 2, 2, 1 }; 988static int w83877f_hefs[] = { WINB_HEFERE, WINB_HEFRAS, WINB_HEFERE | WINB_HEFRAS, 0 }; 989 990static int 991ppc_w83877f_detect(struct ppc_data *ppc, int chipset_mode) 992{ 993 int i, j, efer; 994 unsigned char r, hefere, hefras; --- 322 unchanged lines hidden (view full) --- 1317 1318#define r_reg(reg,ppc) (bus_read_1((ppc)->res_ioport, reg)) 1319#define w_reg(reg, ppc, byte) (bus_write_1((ppc)->res_ioport, reg, byte)) 1320 1321#define INCR_PC (mi ++) /* increment program counter */ 1322 1323 mi = *p_msq; 1324 for (;;) { |
1325 switch (mi->opcode) { | 1325 switch (mi->opcode) { |
1326 case MS_OP_RSET: 1327 cc = r_reg(mi->arg[0].i, ppc); 1328 cc &= (char)mi->arg[2].i; /* clear mask */ 1329 cc |= (char)mi->arg[1].i; /* assert mask */ | 1326 case MS_OP_RSET: 1327 cc = r_reg(mi->arg[0].i, ppc); 1328 cc &= (char)mi->arg[2].i; /* clear mask */ 1329 cc |= (char)mi->arg[1].i; /* assert mask */ |
1330 w_reg(mi->arg[0].i, ppc, cc); | 1330 w_reg(mi->arg[0].i, ppc, cc); |
1331 INCR_PC; | 1331 INCR_PC; |
1332 break; | 1332 break; |
1333 1334 case MS_OP_RASSERT_P: 1335 reg = mi->arg[1].i; 1336 ptr = ppc->ppc_ptr; 1337 1338 if ((len = mi->arg[0].i) == MS_ACCUM) { 1339 accum = ppc->ppc_accum; 1340 for (; accum; accum--) 1341 w_reg(reg, ppc, *ptr++); 1342 ppc->ppc_accum = accum; 1343 } else 1344 for (i=0; i<len; i++) 1345 w_reg(reg, ppc, *ptr++); 1346 ppc->ppc_ptr = ptr; 1347 1348 INCR_PC; 1349 break; 1350 | 1333 1334 case MS_OP_RASSERT_P: 1335 reg = mi->arg[1].i; 1336 ptr = ppc->ppc_ptr; 1337 1338 if ((len = mi->arg[0].i) == MS_ACCUM) { 1339 accum = ppc->ppc_accum; 1340 for (; accum; accum--) 1341 w_reg(reg, ppc, *ptr++); 1342 ppc->ppc_accum = accum; 1343 } else 1344 for (i=0; i<len; i++) 1345 w_reg(reg, ppc, *ptr++); 1346 ppc->ppc_ptr = ptr; 1347 1348 INCR_PC; 1349 break; 1350 |
1351 case MS_OP_RFETCH_P: | 1351 case MS_OP_RFETCH_P: |
1352 reg = mi->arg[1].i; 1353 mask = (char)mi->arg[2].i; 1354 ptr = ppc->ppc_ptr; 1355 1356 if ((len = mi->arg[0].i) == MS_ACCUM) { 1357 accum = ppc->ppc_accum; 1358 for (; accum; accum--) 1359 *ptr++ = r_reg(reg, ppc) & mask; 1360 ppc->ppc_accum = accum; 1361 } else 1362 for (i=0; i<len; i++) 1363 *ptr++ = r_reg(reg, ppc) & mask; 1364 ppc->ppc_ptr = ptr; 1365 1366 INCR_PC; | 1352 reg = mi->arg[1].i; 1353 mask = (char)mi->arg[2].i; 1354 ptr = ppc->ppc_ptr; 1355 1356 if ((len = mi->arg[0].i) == MS_ACCUM) { 1357 accum = ppc->ppc_accum; 1358 for (; accum; accum--) 1359 *ptr++ = r_reg(reg, ppc) & mask; 1360 ppc->ppc_accum = accum; 1361 } else 1362 for (i=0; i<len; i++) 1363 *ptr++ = r_reg(reg, ppc) & mask; 1364 ppc->ppc_ptr = ptr; 1365 1366 INCR_PC; |
1367 break; | 1367 break; |
1368 | 1368 |
1369 case MS_OP_RFETCH: | 1369 case MS_OP_RFETCH: |
1370 *((char *) mi->arg[2].p) = r_reg(mi->arg[0].i, ppc) & 1371 (char)mi->arg[1].i; 1372 INCR_PC; | 1370 *((char *) mi->arg[2].p) = r_reg(mi->arg[0].i, ppc) & 1371 (char)mi->arg[1].i; 1372 INCR_PC; |
1373 break; | 1373 break; |
1374 1375 case MS_OP_RASSERT: | 1374 1375 case MS_OP_RASSERT: |
1376 case MS_OP_DELAY: 1377 | 1376 case MS_OP_DELAY: 1377 |
1378 /* let's suppose the next instr. is the same */ 1379 prefetch: 1380 for (;mi->opcode == MS_OP_RASSERT; INCR_PC) 1381 w_reg(mi->arg[0].i, ppc, (char)mi->arg[1].i); 1382 1383 if (mi->opcode == MS_OP_DELAY) { 1384 DELAY(mi->arg[0].i); 1385 INCR_PC; --- 15 unchanged lines hidden (view full) --- 1401 /* XXX delay limited to 255 us */ 1402 for (i=0; i<iter; i++) { 1403 w_reg(reg, ppc, *p++); 1404 DELAY((unsigned char)*p++); 1405 } 1406 INCR_PC; 1407 break; 1408 | 1378 /* let's suppose the next instr. is the same */ 1379 prefetch: 1380 for (;mi->opcode == MS_OP_RASSERT; INCR_PC) 1381 w_reg(mi->arg[0].i, ppc, (char)mi->arg[1].i); 1382 1383 if (mi->opcode == MS_OP_DELAY) { 1384 DELAY(mi->arg[0].i); 1385 INCR_PC; --- 15 unchanged lines hidden (view full) --- 1401 /* XXX delay limited to 255 us */ 1402 for (i=0; i<iter; i++) { 1403 w_reg(reg, ppc, *p++); 1404 DELAY((unsigned char)*p++); 1405 } 1406 INCR_PC; 1407 break; 1408 |
1409 case MS_OP_SET: 1410 ppc->ppc_accum = mi->arg[0].i; | 1409 case MS_OP_SET: 1410 ppc->ppc_accum = mi->arg[0].i; |
1411 INCR_PC; | 1411 INCR_PC; |
1412 break; | 1412 break; |
1413 | 1413 |
1414 case MS_OP_DBRA: 1415 if (--ppc->ppc_accum > 0) 1416 mi += mi->arg[0].i; | 1414 case MS_OP_DBRA: 1415 if (--ppc->ppc_accum > 0) 1416 mi += mi->arg[0].i; |
1417 INCR_PC; | 1417 INCR_PC; |
1418 break; | 1418 break; |
1419 | 1419 |
1420 case MS_OP_BRSET: 1421 cc = r_str(ppc); 1422 if ((cc & (char)mi->arg[0].i) == (char)mi->arg[0].i) 1423 mi += mi->arg[1].i; | 1420 case MS_OP_BRSET: 1421 cc = r_str(ppc); 1422 if ((cc & (char)mi->arg[0].i) == (char)mi->arg[0].i) 1423 mi += mi->arg[1].i; |
1424 INCR_PC; | 1424 INCR_PC; |
1425 break; | 1425 break; |
1426 | 1426 |
1427 case MS_OP_BRCLEAR: 1428 cc = r_str(ppc); 1429 if ((cc & (char)mi->arg[0].i) == 0) 1430 mi += mi->arg[1].i; | 1427 case MS_OP_BRCLEAR: 1428 cc = r_str(ppc); 1429 if ((cc & (char)mi->arg[0].i) == 0) 1430 mi += mi->arg[1].i; |
1431 INCR_PC; | 1431 INCR_PC; |
1432 break; | 1432 break; |
1433 1434 case MS_OP_BRSTAT: 1435 cc = r_str(ppc); 1436 if ((cc & ((char)mi->arg[0].i | (char)mi->arg[1].i)) == 1437 (char)mi->arg[0].i) 1438 mi += mi->arg[2].i; 1439 INCR_PC; 1440 break; --- 38 unchanged lines hidden (view full) --- 1479 /* reset the stack */ 1480 stack = 0; 1481 1482 /* XXX return code */ 1483 1484 INCR_PC; 1485 break; 1486 | 1433 1434 case MS_OP_BRSTAT: 1435 cc = r_str(ppc); 1436 if ((cc & ((char)mi->arg[0].i | (char)mi->arg[1].i)) == 1437 (char)mi->arg[0].i) 1438 mi += mi->arg[2].i; 1439 INCR_PC; 1440 break; --- 38 unchanged lines hidden (view full) --- 1479 /* reset the stack */ 1480 stack = 0; 1481 1482 /* XXX return code */ 1483 1484 INCR_PC; 1485 break; 1486 |
1487 case MS_OP_PUT: 1488 case MS_OP_GET: 1489 case MS_OP_RET: | 1487 case MS_OP_PUT: 1488 case MS_OP_GET: 1489 case MS_OP_RET: |
1490 /* can't return to ppb level during the execution 1491 * of a submicrosequence */ 1492 if (stack) 1493 panic("%s: can't return to ppb level", 1494 __func__); 1495 1496 /* update pc for ppb level of execution */ 1497 *p_msq = mi; 1498 1499 /* return to ppb level of execution */ 1500 return (0); 1501 | 1490 /* can't return to ppb level during the execution 1491 * of a submicrosequence */ 1492 if (stack) 1493 panic("%s: can't return to ppb level", 1494 __func__); 1495 1496 /* update pc for ppb level of execution */ 1497 *p_msq = mi; 1498 1499 /* return to ppb level of execution */ 1500 return (0); 1501 |
1502 default: 1503 panic("%s: unknown microsequence opcode 0x%x", 1504 __func__, mi->opcode); 1505 } | 1502 default: 1503 panic("%s: unknown microsequence opcode 0x%x", 1504 __func__, mi->opcode); 1505 } |
1506 } 1507 1508 /* unreached */ 1509} 1510 1511static void 1512ppcintr(void *arg) 1513{ --- 86 unchanged lines hidden (view full) --- 1600{ 1601 return (EINVAL); 1602} 1603 1604void 1605ppc_reset_epp(device_t dev) 1606{ 1607 struct ppc_data *ppc = DEVTOSOFTC(dev); | 1506 } 1507 1508 /* unreached */ 1509} 1510 1511static void 1512ppcintr(void *arg) 1513{ --- 86 unchanged lines hidden (view full) --- 1600{ 1601 return (EINVAL); 1602} 1603 1604void 1605ppc_reset_epp(device_t dev) 1606{ 1607 struct ppc_data *ppc = DEVTOSOFTC(dev); |
1608 | 1608 |
1609 ppc_reset_epp_timeout(ppc); 1610 1611 return; 1612} 1613 1614int 1615ppc_setmode(device_t dev, int mode) 1616{ --- 46 unchanged lines hidden (view full) --- 1663 if (error) { 1664#ifdef PC98 1665 if (next_bios_ppc == 0) { 1666 /* Use default IEEE-1284 port of NEC PC-98x1 */ 1667 port = PC98_IEEE_1284_PORT; 1668 next_bios_ppc += 1; 1669 if (bootverbose) 1670 device_printf(dev, | 1609 ppc_reset_epp_timeout(ppc); 1610 1611 return; 1612} 1613 1614int 1615ppc_setmode(device_t dev, int mode) 1616{ --- 46 unchanged lines hidden (view full) --- 1663 if (error) { 1664#ifdef PC98 1665 if (next_bios_ppc == 0) { 1666 /* Use default IEEE-1284 port of NEC PC-98x1 */ 1667 port = PC98_IEEE_1284_PORT; 1668 next_bios_ppc += 1; 1669 if (bootverbose) 1670 device_printf(dev, |
1671 "parallel port found at 0x%x\n", 1672 (int) port); | 1671 "parallel port found at 0x%lx\n", port); |
1673 } 1674#else | 1672 } 1673#else |
1675 if((next_bios_ppc < BIOS_MAX_PPC) && 1676 (*(BIOS_PORTS+next_bios_ppc) != 0) ) { 1677 port = *(BIOS_PORTS+next_bios_ppc++); | 1674 if ((next_bios_ppc < BIOS_MAX_PPC) && 1675 (*(BIOS_PORTS + next_bios_ppc) != 0)) { 1676 port = *(BIOS_PORTS + next_bios_ppc++); |
1678 if (bootverbose) | 1677 if (bootverbose) |
1679 device_printf(dev, "parallel port found at 0x%x\n", 1680 (int) port); | 1678 device_printf(dev, 1679 "parallel port found at 0x%lx\n", port); |
1681 } else { 1682 device_printf(dev, "parallel port not found.\n"); | 1680 } else { 1681 device_printf(dev, "parallel port not found.\n"); |
1683 return ENXIO; | 1682 return (ENXIO); |
1684 } 1685#endif /* PC98 */ 1686 bus_set_resource(dev, SYS_RES_IOPORT, rid, port, 1687 IO_LPTSIZE_EXTENDED); 1688 } 1689#endif 1690 1691 /* IO port is mandatory */ --- 107 unchanged lines hidden (view full) --- 1799 struct ppc_data *ppc = DEVTOSOFTC(dev); 1800 device_t ppbus; 1801 int error; 1802 1803 device_printf(dev, "%s chipset (%s) in %s mode%s\n", 1804 ppc_models[ppc->ppc_model], ppc_avms[ppc->ppc_avm], 1805 ppc_modes[ppc->ppc_mode], (PPB_IS_EPP(ppc->ppc_mode)) ? 1806 ppc_epp_protocol[ppc->ppc_epp] : ""); | 1683 } 1684#endif /* PC98 */ 1685 bus_set_resource(dev, SYS_RES_IOPORT, rid, port, 1686 IO_LPTSIZE_EXTENDED); 1687 } 1688#endif 1689 1690 /* IO port is mandatory */ --- 107 unchanged lines hidden (view full) --- 1798 struct ppc_data *ppc = DEVTOSOFTC(dev); 1799 device_t ppbus; 1800 int error; 1801 1802 device_printf(dev, "%s chipset (%s) in %s mode%s\n", 1803 ppc_models[ppc->ppc_model], ppc_avms[ppc->ppc_avm], 1804 ppc_modes[ppc->ppc_mode], (PPB_IS_EPP(ppc->ppc_mode)) ? 1805 ppc_epp_protocol[ppc->ppc_epp] : ""); |
1807 | 1806 |
1808 if (ppc->ppc_fifo) 1809 device_printf(dev, "FIFO with %d/%d/%d bytes threshold\n", 1810 ppc->ppc_fifo, ppc->ppc_wthr, ppc->ppc_rthr); 1811 1812 if (ppc->res_irq) { 1813 /* 1814 * Create an interrupt event to manage the handlers of 1815 * child devices. --- 63 unchanged lines hidden (view full) --- 1879 1880 return (0); 1881} 1882 1883u_char 1884ppc_io(device_t ppcdev, int iop, u_char *addr, int cnt, u_char byte) 1885{ 1886 struct ppc_data *ppc = DEVTOSOFTC(ppcdev); | 1807 if (ppc->ppc_fifo) 1808 device_printf(dev, "FIFO with %d/%d/%d bytes threshold\n", 1809 ppc->ppc_fifo, ppc->ppc_wthr, ppc->ppc_rthr); 1810 1811 if (ppc->res_irq) { 1812 /* 1813 * Create an interrupt event to manage the handlers of 1814 * child devices. --- 63 unchanged lines hidden (view full) --- 1878 1879 return (0); 1880} 1881 1882u_char 1883ppc_io(device_t ppcdev, int iop, u_char *addr, int cnt, u_char byte) 1884{ 1885 struct ppc_data *ppc = DEVTOSOFTC(ppcdev); |
1886 |
|
1887 switch (iop) { 1888 case PPB_OUTSB_EPP: 1889 bus_write_multi_1(ppc->res_ioport, PPC_EPP_DATA, addr, cnt); 1890 break; 1891 case PPB_OUTSW_EPP: 1892 bus_write_multi_2(ppc->res_ioport, PPC_EPP_DATA, (u_int16_t *)addr, cnt); 1893 break; 1894 case PPB_OUTSL_EPP: --- 153 unchanged lines hidden --- | 1887 switch (iop) { 1888 case PPB_OUTSB_EPP: 1889 bus_write_multi_1(ppc->res_ioport, PPC_EPP_DATA, addr, cnt); 1890 break; 1891 case PPB_OUTSW_EPP: 1892 bus_write_multi_2(ppc->res_ioport, PPC_EPP_DATA, (u_int16_t *)addr, cnt); 1893 break; 1894 case PPB_OUTSL_EPP: --- 153 unchanged lines hidden --- |