1/*- 2 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 *
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26 * $FreeBSD: head/sys/dev/ppbus/ppbconf.h 59712 2000-04-27 21:08:24Z n_hibma $
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26 * $FreeBSD: head/sys/dev/ppbus/ppbconf.h 118607 2003-08-07 15:04:27Z jhb $ |
27 * 28 */ 29#ifndef __PPBCONF_H 30#define __PPBCONF_H 31 32#include <sys/queue.h> 33 34/* 35 * Parallel Port Bus sleep/wakeup queue. 36 */ 37#define PPBPRI (PZERO+8) 38 39/* 40 * Parallel Port Chipset mode masks. 41 * NIBBLE mode is supposed to be available under each other modes. 42 */ 43#define PPB_COMPATIBLE 0x0 /* Centronics compatible mode */ 44 45#define PPB_NIBBLE 0x1 /* reverse 4 bit mode */ 46#define PPB_PS2 0x2 /* PS/2 byte mode */ 47#define PPB_EPP 0x4 /* EPP mode, 32 bit */ 48#define PPB_ECP 0x8 /* ECP mode */ 49 50/* mode aliases */ 51#define PPB_SPP PPB_NIBBLE|PPB_PS2 52#define PPB_BYTE PPB_PS2 53 54#define PPB_MASK 0x0f 55#define PPB_OPTIONS_MASK 0xf0 56 57#define PPB_IS_EPP(mode) (mode & PPB_EPP) 58#define PPB_IN_EPP_MODE(bus) (PPB_IS_EPP (ppb_get_mode (bus))) 59#define PPB_IN_NIBBLE_MODE(bus) (ppb_get_mode (bus) & PPB_NIBBLE) 60#define PPB_IN_PS2_MODE(bus) (ppb_get_mode (bus) & PPB_PS2) 61 62#define n(flags) (~(flags) & (flags)) 63 64/* 65 * Parallel Port Chipset control bits. 66 */ 67#define STROBE 0x01 68#define AUTOFEED 0x02 69#define nINIT 0x04 70#define SELECTIN 0x08 71#define IRQENABLE 0x10 72#define PCD 0x20 73 74#define nSTROBE n(STROBE) 75#define nAUTOFEED n(AUTOFEED) 76#define INIT n(nINIT) 77#define nSELECTIN n(SELECTIN) 78#define nPCD n(PCD) 79 80/* 81 * Parallel Port Chipset status bits. 82 */ 83#define TIMEOUT 0x01 84#define nFAULT 0x08 85#define SELECT 0x10 86#define PERROR 0x20 87#define nACK 0x40 88#define nBUSY 0x80 89 90/* 91 * Structure to store status information. 92 */ 93struct ppb_status { 94 unsigned char status; 95 96 unsigned int timeout:1; 97 unsigned int error:1; 98 unsigned int select:1; 99 unsigned int paper_end:1; 100 unsigned int ack:1; 101 unsigned int busy:1; 102}; 103 104/* Parallel port bus I/O opcodes */ 105#define PPB_OUTSB_EPP 1 106#define PPB_OUTSW_EPP 2 107#define PPB_OUTSL_EPP 3 108#define PPB_INSB_EPP 4 109#define PPB_INSW_EPP 5 110#define PPB_INSL_EPP 6 111#define PPB_RDTR 7 112#define PPB_RSTR 8 113#define PPB_RCTR 9 114#define PPB_REPP_A 10 115#define PPB_REPP_D 11 116#define PPB_RECR 12 117#define PPB_RFIFO 13 118#define PPB_WDTR 14 119#define PPB_WSTR 15 120#define PPB_WCTR 16 121#define PPB_WEPP_A 17 122#define PPB_WEPP_D 18 123#define PPB_WECR 19 124#define PPB_WFIFO 20 125 126/* 127 * How tsleep() is called in ppb_request_bus(). 128 */ 129#define PPB_DONTWAIT 0 130#define PPB_NOINTR 0 131#define PPB_WAIT 0x1 132#define PPB_INTR 0x2 133#define PPB_POLL 0x4 134#define PPB_FOREVER -1 135 136/* 137 * Microsequence stuff. 138 */ 139#define PPB_MS_MAXLEN 64 /* XXX according to MS_INS_MASK */ 140#define PPB_MS_MAXARGS 3 /* according to MS_ARG_MASK */ 141 142/* maximum number of mode dependent 143 * submicrosequences for in/out operations 144 */ 145#define PPB_MAX_XFER 6 146 147union ppb_insarg { 148 int i; 149 void *p; 150 char *c; 151 int (* f)(void *, char *); 152}; 153 154struct ppb_microseq { 155 int opcode; /* microins. opcode */ 156 union ppb_insarg arg[PPB_MS_MAXARGS]; /* arguments */ 157}; 158 159/* microseqences used for GET/PUT operations */ 160struct ppb_xfer { 161 struct ppb_microseq *loop; /* the loop microsequence */ 162}; 163 164/* 165 * Parallel Port Bus Device structure. 166 */ 167struct ppb_data; /* see below */ 168 169struct ppb_context { 170 int valid; /* 1 if the struct is valid */ 171 int mode; /* XXX chipset operating mode */ 172 173 struct microseq *curpc; /* pc in curmsq */ 174 struct microseq *curmsq; /* currently executed microseqence */ 175}; 176 177/* 178 * List of IVARS available to ppb device drivers 179 */ 180#define PPBUS_IVAR_MODE 0 181#define PPBUS_IVAR_AVM 1 182#define PPBUS_IVAR_IRQ 2 183 184/* other fields are reserved to the ppbus internals */ 185 186struct ppb_device { 187 188 const char *name; /* name of the device */ 189
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190 ushort mode; /* current mode of the device */
191 ushort avm; /* available IEEE1284 modes of
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190 u_short mode; /* current mode of the device */ 191 u_short avm; /* available IEEE1284 modes of |
192 * the device */
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193 uint flags; /* flags */
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193 u_int flags; /* flags */ |
194 195 struct ppb_context ctx; /* context of the device */ 196 197 /* mode dependent get msq. If NULL, 198 * IEEE1284 code is used */ 199 struct ppb_xfer 200 get_xfer[PPB_MAX_XFER]; 201 202 /* mode dependent put msq. If NULL, 203 * IEEE1284 code is used */ 204 struct ppb_xfer 205 put_xfer[PPB_MAX_XFER]; 206 207 struct resource *intr_resource; 208 void *intr_cookie; 209 210 void *drv1, *drv2; /* drivers private data */ 211}; 212 213/* EPP standards */ 214#define EPP_1_9 0x0 /* default */ 215#define EPP_1_7 0x1 216 217/* Parallel Port Chipset IVARS */ /* elsewhere XXX */ 218#define PPC_IVAR_EPP_PROTO 0 219#define PPC_IVAR_IRQ 1 220 221/* 222 * Maximum size of the PnP info string 223 */ 224#define PPB_PnP_STRING_SIZE 256 /* XXX */ 225 226/* 227 * Parallel Port Bus structure. 228 */ 229struct ppb_data { 230 231#define PPB_PnP_PRINTER 0 232#define PPB_PnP_MODEM 1 233#define PPB_PnP_NET 2 234#define PPB_PnP_HDC 3 235#define PPB_PnP_PCMCIA 4 236#define PPB_PnP_MEDIA 5 237#define PPB_PnP_FDC 6 238#define PPB_PnP_PORTS 7 239#define PPB_PnP_SCANNER 8 240#define PPB_PnP_DIGICAM 9 241#define PPB_PnP_UNKNOWN 10 242 int class_id; /* not a PnP device if class_id < 0 */ 243 244 int state; /* current IEEE1284 state */ 245 int error; /* last IEEE1284 error */ 246 247 int mode; /* IEEE 1284-1994 mode 248 * NIBBLE, PS2, EPP or ECP */ 249 250 void *ppb_owner; /* device which owns the bus */ 251}; 252 253#ifdef _KERNEL 254extern int ppb_attach_device(device_t); 255extern int ppb_request_bus(device_t, device_t, int); 256extern int ppb_release_bus(device_t, device_t); 257 258/* bus related functions */ 259extern int ppb_get_status(device_t, struct ppb_status *); 260extern int ppb_poll_bus(device_t, int, char, char, int); 261extern int ppb_reset_epp_timeout(device_t); 262extern int ppb_ecp_sync(device_t); 263extern int ppb_get_epp_protocol(device_t); 264extern int ppb_set_mode(device_t, int); /* returns old mode */ 265extern int ppb_get_mode(device_t); /* returns current mode */ 266extern int ppb_write(device_t, char *, int, int); 267#endif /* _KERNEL */ 268 269/* 270 * These are defined as macros for speedup. 271#define ppb_get_base_addr(dev) ((dev)->ppb->ppb_link->base) 272#define ppb_get_epp_protocol(dev) ((dev)->ppb->ppb_link->epp_protocol) 273#define ppb_get_irq(dev) ((dev)->ppb->ppb_link->id_irq) 274 */ 275 276#endif
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