1/*- 2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. The name of the author may not be used to endorse or promote products 11 * derived from this software withough specific prior written permission 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 *
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25 * 26 */ 27 28/* 29 * DEC PDQ FDDI Controller; code for BSD derived operating systems 30 * 31 * This module supports the DEC DEFPA PCI FDDI Controller 32 */ 33 34#include "opt_inet.h" 35 36#include <sys/param.h> 37#include <sys/kernel.h> 38#include <sys/socket.h> 39#if defined(__bsdi__) || defined(__NetBSD__) 40#include <sys/device.h> 41#endif 42 43#include <net/if.h> 44 45#ifdef INET 46#include <netinet/in.h> 47#include <netinet/if_ether.h> 48#endif 49 50#if defined(__FreeBSD__) 51#include "fpa.h" 52#include <net/ethernet.h> 53#include <net/if_arp.h> 54#include <pci/pcivar.h> 55#include <dev/pdq/pdqvar.h> 56#include <dev/pdq/pdqreg.h> 57#elif defined(__bsdi__) 58#include <i386/isa/isavar.h> 59#include <i386/isa/icu.h> 60#ifndef DRQNONE 61#define DRQNONE 0 62#endif 63#if _BSDI_VERSION < 199401 64#define IRQSHARE 0 65#endif 66#elif defined(__NetBSD__) 67#include <dev/pci/pcivar.h> 68#include <dev/ic/pdqvar.h> 69#include <dev/ic/pdqreg.h> 70#endif /* __NetBSD__ */ 71 72 73#define DEC_VENDORID 0x1011 74#define DEFPA_CHIPID 0x000F 75#define PCI_VENDORID(x) ((x) & 0xFFFF) 76#define PCI_CHIPID(x) (((x) >> 16) & 0xFFFF) 77 78#define DEFPA_LATENCY 0x88 79 80#define PCI_CFLT 0x0C /* Configuration Latency */ 81#define PCI_CBMA 0x10 /* Configuration Base Memory Address */ 82#define PCI_CBIO 0x14 /* Configuration Base I/O Address */ 83 84#if defined(__FreeBSD__) 85#if NFPA < 4 86#undef NFPA 87#define NFPA 4 88#endif 89static pdq_softc_t *pdqs_pci[NFPA]; 90#define PDQ_PCI_UNIT_TO_SOFTC(unit) (pdqs_pci[unit]) 91#if BSD >= 199506 92#define pdq_pci_ifwatchdog NULL 93#endif 94 95#elif defined(__bsdi__) 96extern struct cfdriver fpacd; 97#define PDQ_PCI_UNIT_TO_SOFTC(unit) ((pdq_softc_t *)fpacd.cd_devs[unit]) 98 99#elif defined(__NetBSD__) 100extern struct cfattach fpa_ca; 101extern struct cfdriver fpa_cd; 102#define PDQ_PCI_UNIT_TO_SOFTC(unit) ((pdq_softc_t *)fpa_cd.cd_devs[unit]) 103#define pdq_pci_ifwatchdog NULL 104#endif 105 106#ifndef pdq_pci_ifwatchdog 107static ifnet_ret_t 108pdq_pci_ifwatchdog( 109 int unit) 110{ 111 pdq_ifwatchdog(&PDQ_PCI_UNIT_TO_SOFTC(unit)->sc_if); 112} 113#endif 114 115#if defined(__FreeBSD__) && BSD >= 199506 116static void 117pdq_pci_ifintr( 118 void *arg) 119{ 120 (void) pdq_interrupt(((pdq_softc_t *) arg)->sc_pdq); 121} 122#else 123static int 124pdq_pci_ifintr( 125 void *arg) 126{ 127 pdq_softc_t * const sc = (pdq_softc_t *) arg; 128#ifdef __FreeBSD__ 129 return pdq_interrupt(sc->sc_pdq); 130#elif defined(__bsdi__) || defined(__NetBSD__) 131 (void) pdq_interrupt(sc->sc_pdq); 132 return 1; 133#endif 134} 135#endif /* __FreeBSD && BSD */ 136 137#if defined(__FreeBSD__) 138static void pdq_pci_shutdown(int, void *); 139 140/* 141 * This is the PCI configuration support. Since the PDQ is available 142 * on both EISA and PCI boards, one must be careful in how defines the 143 * PDQ in the config file. 144 */ 145static char * 146pdq_pci_probe( 147 pcici_t config_id, 148 pcidi_t device_id) 149{ 150 if (PCI_VENDORID(device_id) == DEC_VENDORID && 151 PCI_CHIPID(device_id) == DEFPA_CHIPID) 152 return "Digital DEFPA PCI FDDI Controller"; 153 return NULL; 154} 155 156static void 157pdq_pci_attach( 158 pcici_t config_id, 159 int unit) 160{ 161 pdq_softc_t *sc; 162 vm_offset_t va_csrs, pa_csrs; 163 pdq_uint32_t data; 164 165 if (unit == NFPA) { 166 printf("fpa%d: not configured; kernel is built for only %d device%s.\n", 167 unit, NFPA, NFPA == 1 ? "" : "s"); 168 return; 169 } 170 171 data = pci_conf_read(config_id, PCI_CFLT); 172 if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) { 173 data &= ~0xFF00; 174 data |= DEFPA_LATENCY << 8; 175 pci_conf_write(config_id, PCI_CFLT, data); 176 } 177 178 sc = (pdq_softc_t *) malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT); 179 if (sc == NULL) 180 return; 181 182 bzero(sc, sizeof(pdq_softc_t)); /* Zero out the softc*/ 183 if (!pci_map_mem(config_id, PCI_CBMA, &va_csrs, &pa_csrs)) { 184 free((void *) sc, M_DEVBUF); 185 return; 186 } 187 188 sc->sc_if.if_name = "fpa"; 189 sc->sc_if.if_unit = unit; 190 sc->sc_membase = (pdq_bus_memaddr_t) va_csrs; 191 sc->sc_pdq = pdq_initialize(PDQ_BUS_PCI, sc->sc_membase, 192 sc->sc_if.if_name, sc->sc_if.if_unit, 193 (void *) sc, PDQ_DEFPA); 194 if (sc->sc_pdq == NULL) { 195 free((void *) sc, M_DEVBUF); 196 return; 197 } 198 bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6); 199 pdqs_pci[unit] = sc; 200 pdq_ifattach(sc, pdq_pci_ifwatchdog); 201 pci_map_int(config_id, pdq_pci_ifintr, (void*) sc, &net_imask); 202 at_shutdown(pdq_pci_shutdown, (void *) sc, SHUTDOWN_POST_SYNC); 203 204} 205 206static void 207pdq_pci_shutdown( 208 int howto, 209 void *sc) 210{ 211 pdq_hwreset(((pdq_softc_t *)sc)->sc_pdq); 212} 213 214static u_long pdq_pci_count; 215
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217 "fpa", 218 pdq_pci_probe, 219 pdq_pci_attach, 220 &pdq_pci_count, 221 NULL 222}; 223 224#ifdef DATA_SET 225DATA_SET (pcidevice_set, fpadevice); 226#endif 227#elif defined(__bsdi__) 228 229static int 230pdq_pci_match( 231 pci_devaddr_t *pa) 232{ 233 int irq; 234 int id; 235 236 id = pci_inl(pa, PCI_VENDOR_ID); 237 if (PCI_VENDORID(id) != DEC_VENDORID || PCI_CHIPID(id) != DEFPA_CHIPID) 238 return 0; 239 240 irq = pci_inl(pa, PCI_I_LINE) & 0xFF; 241 if (irq == 0 || irq >= 16) 242 return 0; 243 244 return 1; 245} 246 247int 248pdq_pci_probe( 249 struct device *parent, 250 struct cfdata *cf, 251 void *aux) 252{ 253 struct isa_attach_args *ia = (struct isa_attach_args *) aux; 254 pdq_uint32_t irq, data; 255 pci_devaddr_t *pa; 256 257 pa = pci_scan(pdq_pci_match); 258 if (pa == NULL) 259 return 0; 260 261 irq = (1 << (pci_inl(pa, PCI_I_LINE) & 0xFF)); 262 263 if (ia->ia_irq != IRQUNK && irq != ia->ia_irq) { 264 printf("fpa%d: error: desired IRQ of %d does not match device's actual IRQ of %d\n", 265 cf->cf_unit, 266 ffs(ia->ia_irq) - 1, ffs(irq) - 1); 267 return 0; 268 } 269 if (ia->ia_irq == IRQUNK) { 270 (void) isa_irqalloc(irq); 271 ia->ia_irq = irq; 272 } 273 274 /* PCI bus masters don't use host DMA channels */ 275 ia->ia_drq = DRQNONE; 276 277 /* Get the memory base address; assume the BIOS set it up correctly */ 278 ia->ia_maddr = (caddr_t) (pci_inl(pa, PCI_CBMA) & ~7); 279 pci_outl(pa, PCI_CBMA, 0xFFFFFFFF); 280 ia->ia_msize = ((~pci_inl(pa, PCI_CBMA)) | 7) + 1; 281 pci_outl(pa, PCI_CBMA, (int) ia->ia_maddr); 282 283 /* Disable I/O space access */ 284 pci_outl(pa, PCI_COMMAND, pci_inl(pa, PCI_COMMAND) & ~1); 285 ia->ia_iobase = 0; 286 ia->ia_iosize = 0; 287 288 /* Make sure the latency timer is what the DEFPA likes */ 289 data = pci_inl(pa, PCI_CFLT); 290 if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) { 291 data &= ~0xFF00; 292 data |= DEFPA_LATENCY << 8; 293 pci_outl(pa, PCI_CFLT, data); 294 } 295 ia->ia_irq |= IRQSHARE; 296 297 return 1; 298} 299 300void 301pdq_pci_attach( 302 struct device *parent, 303 struct device *self, 304 void *aux) 305{ 306 pdq_softc_t *sc = (pdq_softc_t *) self; 307 register struct isa_attach_args *ia = (struct isa_attach_args *) aux; 308 register struct ifnet *ifp = &sc->sc_if; 309 int i; 310 311 sc->sc_if.if_unit = sc->sc_dev.dv_unit; 312 sc->sc_if.if_name = "fpa"; 313 sc->sc_if.if_flags = 0; 314 sc->sc_membase = (pdq_bus_memaddr_t) mapphys((vm_offset_t)ia->ia_maddr, ia->ia_msize); 315 316 sc->sc_pdq = pdq_initialize(PDQ_BUS_PCI, sc->sc_membase, 317 sc->sc_if.if_name, sc->sc_if.if_unit, 318 (void *) sc, PDQ_DEFPA); 319 if (sc->sc_pdq == NULL) { 320 printf("fpa%d: initialization failed\n", sc->sc_if.if_unit); 321 return; 322 } 323 324 bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6); 325 326 pdq_ifattach(sc, pdq_pci_ifwatchdog); 327 328 isa_establish(&sc->sc_id, &sc->sc_dev); 329 330 sc->sc_ih.ih_fun = pdq_pci_ifintr; 331 sc->sc_ih.ih_arg = (void *)sc; 332 intr_establish(ia->ia_irq, &sc->sc_ih, DV_NET); 333 334 sc->sc_ats.func = (void (*)(void *)) pdq_hwreset; 335 sc->sc_ats.arg = (void *) sc->sc_pdq; 336 atshutdown(&sc->sc_ats, ATSH_ADD); 337} 338 339struct cfdriver fpacd = { 340 0, "fpa", pdq_pci_probe, pdq_pci_attach, 341#if _BSDI_VERSION >= 199401 342 DV_IFNET, 343#endif 344 sizeof(pdq_softc_t) 345}; 346 347#elif defined(__NetBSD__) 348 349static int 350pdq_pci_match( 351 struct device *parent, 352 void *match, 353 void *aux) 354{ 355 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 356 357 if (PCI_VENDORID(pa->pa_id) != DEC_VENDORID) 358 return 0; 359 if (PCI_CHIPID(pa->pa_id) == DEFPA_CHIPID) 360 return 1; 361 362 return 0; 363} 364 365static void 366pdq_pci_attach( 367 struct device * const parent, 368 struct device * const self, 369 void * const aux) 370{ 371 pdq_softc_t * const sc = (pdq_softc_t *) self; 372 struct pci_attach_args * const pa = (struct pci_attach_args *) aux; 373 pdq_uint32_t data; 374 pci_intr_handle_t intrhandle; 375 const char *intrstr; 376#ifdef PDQ_IOMAPPED 377 bus_io_addr_t iobase; 378 bus_io_size_t iosize; 379#else 380 bus_mem_addr_t membase; 381 bus_mem_size_t memsize; 382#endif 383 384 data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CFLT); 385 if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) { 386 data &= ~0xFF00; 387 data |= DEFPA_LATENCY << 8; 388 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_CFLT, data); 389 } 390 391 sc->sc_bc = pa->pa_bc; 392 bcopy(sc->sc_dev.dv_xname, sc->sc_if.if_xname, IFNAMSIZ); 393 sc->sc_if.if_flags = 0; 394 sc->sc_if.if_softc = sc; 395 396#ifdef PDQ_IOMAPPED 397 if (pci_io_find(pa->pa_pc, pa->pa_tag, PCI_CBIO, &iobase, &iosize) 398 || bus_io_map(pa->pa_bc, iobase, iosize, &sc->sc_iobase)) 399 return; 400#else 401 if (pci_mem_find(pa->pa_pc, pa->pa_tag, PCI_CBMA, &membase, &memsize, NULL) 402 || bus_mem_map(pa->pa_bc, membase, memsize, 0, &sc->sc_membase)) 403 return; 404#endif 405 406 sc->sc_pdq = pdq_initialize(sc->sc_bc, sc->sc_membase, 407 sc->sc_if.if_xname, 0, 408 (void *) sc, PDQ_DEFPA); 409 if (sc->sc_pdq == NULL) { 410 printf("%s: initialization failed\n", sc->sc_dev.dv_xname); 411 return; 412 } 413 414 bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6); 415 pdq_ifattach(sc, pdq_pci_ifwatchdog); 416 417 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 418 pa->pa_intrline, &intrhandle)) { 419 printf("%s: couldn't map interrupt\n", self->dv_xname); 420 return; 421 } 422 intrstr = pci_intr_string(pa->pa_pc, intrhandle); 423 sc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET, pdq_pci_ifintr, sc); 424 if (sc->sc_ih == NULL) { 425 printf("%s: couldn't establish interrupt", self->dv_xname); 426 if (intrstr != NULL) 427 printf(" at %s", intrstr); 428 printf("\n"); 429 return; 430 } 431 432 sc->sc_ats = shutdownhook_establish((void (*)(void *)) pdq_hwreset, sc->sc_pdq); 433 if (sc->sc_ats == NULL) 434 printf("%s: warning: couldn't establish shutdown hook\n", self->dv_xname); 435 if (intrstr != NULL) 436 printf("%s: interrupting at %s\n", self->dv_xname, intrstr); 437} 438 439struct cfattach fpa_ca = { 440 sizeof(pdq_softc_t), pdq_pci_match, pdq_pci_attach 441}; 442 443struct cfdriver fpa_cd = { 444 0, "fpa", DV_IFNET 445}; 446 447#endif /* __NetBSD__ */
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