| pci_subr.c (106859) | pci_subr.c (107172) |
|---|---|
| 1/*- 2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000 BSDi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 13 unchanged lines hidden (view full) --- 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * | 1/*- 2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000 BSDi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 13 unchanged lines hidden (view full) --- 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * |
| 30 * $FreeBSD: head/sys/dev/pci/pci_pci.c 106859 2002-11-13 17:34:12Z mux $ | 30 * $FreeBSD: head/sys/dev/pci/pci_pci.c 107172 2002-11-22 17:50:47Z jhb $ |
| 31 */ 32 33/* 34 * PCI:PCI bridge support. 35 */ 36 37#include <sys/param.h> 38#include <sys/systm.h> --- 401 unchanged lines hidden (view full) --- 440 bus = device_get_parent(pcib); 441 intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1); 442 if (PCI_INTERRUPT_VALID(intnum)) { 443 device_printf(pcib, "slot %d INT%c is routed to irq %d\n", 444 pci_get_slot(dev), 'A' + pin - 1, intnum); 445 } 446 return(intnum); 447} | 31 */ 32 33/* 34 * PCI:PCI bridge support. 35 */ 36 37#include <sys/param.h> 38#include <sys/systm.h> --- 401 unchanged lines hidden (view full) --- 440 bus = device_get_parent(pcib); 441 intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1); 442 if (PCI_INTERRUPT_VALID(intnum)) { 443 device_printf(pcib, "slot %d INT%c is routed to irq %d\n", 444 pci_get_slot(dev), 'A' + pin - 1, intnum); 445 } 446 return(intnum); 447} |
| 448 449/* 450 * Try to read the bus number of a host-PCI bridge using appropriate config 451 * registers. 452 */ 453int 454host_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func, 455 u_int8_t *busnum) 456{ 457 u_int32_t id; 458 459 id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4); 460 if (id == 0xffff) 461 return (0); 462 463 switch (id) { 464 case 0x12258086: 465 /* Intel 824?? */ 466 /* XXX This is a guess */ 467 /* *busnum = read_config(bus, slot, func, 0x41, 1); */ 468 *busnum = bus; 469 break; 470 case 0x84c48086: 471 /* Intel 82454KX/GX (Orion) */ 472 *busnum = read_config(bus, slot, func, 0x4a, 1); 473 break; 474 case 0x84ca8086: 475 /* 476 * For the 450nx chipset, there is a whole bundle of 477 * things pretending to be host bridges. The MIOC will 478 * be seen first and isn't really a pci bridge (the 479 * actual busses are attached to the PXB's). We need to 480 * read the registers of the MIOC to figure out the 481 * bus numbers for the PXB channels. 482 * 483 * Since the MIOC doesn't have a pci bus attached, we 484 * pretend it wasn't there. 485 */ 486 return (0); 487 case 0x84cb8086: 488 switch (slot) { 489 case 0x12: 490 /* Intel 82454NX PXB#0, Bus#A */ 491 *busnum = read_config(bus, 0, func, 0xd0, 1); 492 break; 493 case 0x13: 494 /* Intel 82454NX PXB#0, Bus#B */ 495 *busnum = read_config(bus, 0, func, 0xd1, 1) + 1; 496 break; 497 case 0x14: 498 /* Intel 82454NX PXB#1, Bus#A */ 499 *busnum = read_config(bus, 0, func, 0xd3, 1); 500 break; 501 case 0x15: 502 /* Intel 82454NX PXB#1, Bus#B */ 503 *busnum = read_config(bus, 0, func, 0xd4, 1) + 1; 504 break; 505 } 506 break; 507 508 /* ServerWorks -- vendor 0x1166 */ 509 case 0x00051166: 510 case 0x00061166: 511 case 0x00081166: 512 case 0x00091166: 513 case 0x00101166: 514 case 0x00111166: 515 case 0x00171166: 516 case 0x01011166: 517 case 0x010f1014: 518 case 0x02011166: 519 case 0x03021014: 520 *busnum = read_config(bus, slot, func, 0x44, 1); 521 break; 522 default: 523 /* Don't know how to read bus number. */ 524 return 0; 525 } 526 527 return 1; 528} |
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