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pci_pci.c (121307) pci_pci.c (124365)
1/*-
2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: head/sys/dev/pci/pci_pci.c 121307 2003-10-21 18:28:36Z silby $");
32__FBSDID("$FreeBSD: head/sys/dev/pci/pci_pci.c 124365 2004-01-11 06:52:31Z imp $");
33
34/*
35 * PCI:PCI bridge support.
36 */
37
38#include <sys/param.h>
39#include <sys/systm.h>
40#include <sys/kernel.h>

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87 sizeof(struct pcib_softc),
88};
89
90devclass_t pcib_devclass;
91
92DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0);
93
94/*
33
34/*
35 * PCI:PCI bridge support.
36 */
37
38#include <sys/param.h>
39#include <sys/systm.h>
40#include <sys/kernel.h>

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87 sizeof(struct pcib_softc),
88};
89
90devclass_t pcib_devclass;
91
92DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0);
93
94/*
95 * sysctl and tunable vars
96 */
97static int pci_allow_unsupported_io_range = 0;
98TUNABLE_INT("hw.pci.allow_unsupported_io_range",
99 (int *)&pci_allow_unsupported_io_range);
100SYSCTL_DECL(_hw_pci);
101SYSCTL_INT(_hw_pci, OID_AUTO, allow_unsupported_io_range, CTLFLAG_RDTUN,
102 &pci_allow_unsupported_io_range, 0,
103 "Allows the PCI Bridge to pass through an unsupported memory range "
104 "assigned by the BIOS.");
105
106/*
107 * Generic device interface
108 */
109static int
110pcib_probe(device_t dev)
111{
112 if ((pci_get_class(dev) == PCIC_BRIDGE) &&
113 (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) {
114 device_set_desc(dev, "PCI-PCI bridge");

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168 sc->pmemlimit = PCI_PPBMEMLIMIT((pci_addr_t)pci_read_config(dev, PCIR_PMLIMITH_1, 4),
169 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
170 }
171
172 /*
173 * Quirk handling.
174 */
175 switch (pci_get_devid(dev)) {
95 * Generic device interface
96 */
97static int
98pcib_probe(device_t dev)
99{
100 if ((pci_get_class(dev) == PCIC_BRIDGE) &&
101 (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) {
102 device_set_desc(dev, "PCI-PCI bridge");

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156 sc->pmemlimit = PCI_PPBMEMLIMIT((pci_addr_t)pci_read_config(dev, PCIR_PMLIMITH_1, 4),
157 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
158 }
159
160 /*
161 * Quirk handling.
162 */
163 switch (pci_get_devid(dev)) {
176 case 0x12258086: /* Intel 82454KX/GX (Orion) */
164 case 0x12258086: /* Intel 82454KX/GX (Orion) */
177 {
178 uint8_t supbus;
179
180 supbus = pci_read_config(dev, 0x41, 1);
181 if (supbus != 0xff) {
182 sc->secbus = supbus + 1;
183 sc->subbus = supbus + 1;
184 }
165 {
166 uint8_t supbus;
167
168 supbus = pci_read_config(dev, 0x41, 1);
169 if (supbus != 0xff) {
170 sc->secbus = supbus + 1;
171 sc->subbus = supbus + 1;
172 }
173 break;
185 }
174 }
175
176 /*
177 * The i82380FB mobile docking controller is a PCI-PCI bridge,
178 * and it is a subtractive bridge. However, the ProgIf is wrong
179 * so the normal setting of PCIB_SUBTRACTIVE bit doesn't
180 * happen. There's also a Toshiba bridge that behaves this
181 * way.
182 */
183 case 0x124b8086: /* Intel 82380FB Mobile */
184 case 0x060513d7: /* Toshiba ???? */
185 sc->flags |= PCIB_SUBTRACTIVE;
186 break;
187 }
188
186 break;
187 }
188
189 /*
190 * Intel 815, 845 and other chipsets say they are PCI-PCI bridges,
191 * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM,
192 * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese.
193 * This means they act as if they were subtractively decoding
194 * bridges and pass all transactions. Mark them and real ProgIf 1
195 * parts as subtractive.
196 */
197 if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 ||
198 pci_read_config(dev, PCIR_PROGIF, 1) == 1)
199 sc->flags |= PCIB_SUBTRACTIVE;
200
189 if (bootverbose) {
190 device_printf(dev, " secondary bus %d\n", sc->secbus);
191 device_printf(dev, " subordinate bus %d\n", sc->subbus);
192 device_printf(dev, " I/O decode 0x%x-0x%x\n", sc->iobase, sc->iolimit);
193 device_printf(dev, " memory decode 0x%x-0x%x\n", sc->membase, sc->memlimit);
194 device_printf(dev, " prefetched decode 0x%x-0x%x\n", sc->pmembase, sc->pmemlimit);
201 if (bootverbose) {
202 device_printf(dev, " secondary bus %d\n", sc->secbus);
203 device_printf(dev, " subordinate bus %d\n", sc->subbus);
204 device_printf(dev, " I/O decode 0x%x-0x%x\n", sc->iobase, sc->iolimit);
205 device_printf(dev, " memory decode 0x%x-0x%x\n", sc->membase, sc->memlimit);
206 device_printf(dev, " prefetched decode 0x%x-0x%x\n", sc->pmembase, sc->pmemlimit);
207 if (sc->flags & PCIB_SUBTRACTIVE)
208 device_printf(dev, " Subtractively decoded bridge.\n");
195 }
196
197 /*
198 * XXX If the secondary bus number is zero, we should assign a bus number
199 * since the BIOS hasn't, then initialise the bridge.
200 */
201
202 /*

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247 case PCIB_IVAR_BUS:
248 sc->secbus = value;
249 break;
250 }
251 return(ENOENT);
252}
253
254/*
209 }
210
211 /*
212 * XXX If the secondary bus number is zero, we should assign a bus number
213 * since the BIOS hasn't, then initialise the bridge.
214 */
215
216 /*

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261 case PCIB_IVAR_BUS:
262 sc->secbus = value;
263 break;
264 }
265 return(ENOENT);
266}
267
268/*
255 * Is this a decoded ISA I/O port address? Note, we need to do the mask that
256 * we do below because of the ISA alias addresses. I'm not 100% sure that
257 * this is correct. Maybe the bridge needs to be subtractive decode for
258 * this to work?
259 */
260static int
261pcib_is_isa_io(u_long start)
262{
263 if ((start & 0xfffUL) > 0x3ffUL || start == 0)
264 return (0);
265 return (1);
266}
267
268/*
269 * Is this a decoded ISA memory address?
270 */
271static int
272pcib_is_isa_mem(u_long start)
273{
274 if (start > 0xfffffUL || start == 0)
275 return (0);
276 return (1);
277}
278
279/*
280 * Is the prefetch window open (eg, can we allocate memory in it?)
281 */
282static int
283pcib_is_prefetch_open(struct pcib_softc *sc)
284{
269 * Is the prefetch window open (eg, can we allocate memory in it?)
270 */
271static int
272pcib_is_prefetch_open(struct pcib_softc *sc)
273{
285 return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
274 return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
286}
287
288/*
289 * Is the nonprefetch window open (eg, can we allocate memory in it?)
290 */
291static int
292pcib_is_nonprefetch_open(struct pcib_softc *sc)
293{
275}
276
277/*
278 * Is the nonprefetch window open (eg, can we allocate memory in it?)
279 */
280static int
281pcib_is_nonprefetch_open(struct pcib_softc *sc)
282{
294 return (sc->membase > 0 && sc->membase < sc->memlimit);
283 return (sc->membase > 0 && sc->membase < sc->memlimit);
295}
296
297/*
298 * Is the io window open (eg, can we allocate ports in it?)
299 */
300static int
301pcib_is_io_open(struct pcib_softc *sc)
302{
284}
285
286/*
287 * Is the io window open (eg, can we allocate ports in it?)
288 */
289static int
290pcib_is_io_open(struct pcib_softc *sc)
291{
303 return (sc->iobase > 0 && sc->iobase < sc->iolimit);
292 return (sc->iobase > 0 && sc->iobase < sc->iolimit);
304}
305
306/*
307 * We have to trap resource allocation requests and ensure that the bridge
308 * is set up to, or capable of handling them.
309 */
310struct resource *
311pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
312 u_long start, u_long end, u_long count, u_int flags)
313{
293}
294
295/*
296 * We have to trap resource allocation requests and ensure that the bridge
297 * is set up to, or capable of handling them.
298 */
299struct resource *
300pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
301 u_long start, u_long end, u_long count, u_int flags)
302{
314 struct pcib_softc *sc = device_get_softc(dev);
315 int ok;
303 struct pcib_softc *sc = device_get_softc(dev);
304 int ok;
316
305
317 /*
318 * If this is a "default" allocation against this rid, we can't work
319 * out where it's coming from (we should actually never see these) so we
320 * just have to punt.
321 */
322 if ((start == 0) && (end == ~0)) {
323 device_printf(dev, "can't decode default resource id %d for %s%d, bypassing\n",
324 *rid, device_get_name(child), device_get_unit(child));
325 } else {
326 /*
327 * Fail the allocation for this range if it's not supported.
328 */
329 switch (type) {
330 case SYS_RES_IOPORT:
306 /*
307 * Fail the allocation for this range if it's not supported.
308 */
309 switch (type) {
310 case SYS_RES_IOPORT:
331 ok = 1;
332 if (!pcib_is_isa_io(start)) {
333 ok = 0;
311 ok = 0;
334 if (pcib_is_io_open(sc))
335 ok = (start >= sc->iobase && end <= sc->iolimit);
336 if (!pci_allow_unsupported_io_range) {
337 if (!ok) {
338 if (start < sc->iobase)
339 start = sc->iobase;
340 if (end > sc->iolimit)
341 end = sc->iolimit;
342 }
312 if (!pcib_is_io_open(sc))
313 break;
314 ok = (start >= sc->iobase && end <= sc->iolimit);
315 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
316 if (!ok) {
317 if (start < sc->iobase)
318 start = sc->iobase;
319 if (end > sc->iolimit)
320 end = sc->iolimit;
321 }
343 } else {
322 } else {
344 if (start < sc->iobase)
345 printf("start (%lx) < sc->iobase (%x)\n", start,
346 sc->iobase);
347 if (end > sc->iolimit)
348 printf("end (%lx) > sc->iolimit (%x)\n",
349 end, sc->iolimit);
350 if (end < start)
351 printf("end (%lx) < start (%lx)\n", end, start);
323 ok = 1;
324 if (start < sc->iobase && end > sc->iolimit) {
325 start = sc->iobase;
326 end = sc->iolimit;
327 }
328
352 }
329 }
353 }
354 if (end < start) {
355 start = 0;
356 end = 0;
357 ok = 0;
358 }
359 if (!ok) {
360 device_printf(dev, "device %s%d requested unsupported I/O "
361 "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n",
362 device_get_name(child), device_get_unit(child), start, end,
363 sc->iobase, sc->iolimit);
364 return (NULL);
365 }
366 if (bootverbose)
367 device_printf(sc->dev, "device %s%d requested decoded I/O range 0x%lx-0x%lx\n",
368 device_get_name(child), device_get_unit(child), start, end);
369 break;
330 if (end < start) {
331 device_printf(dev, "ioport: end (%lx) < start (%lx)\n", end, start);
332 start = 0;
333 end = 0;
334 ok = 0;
335 }
336 if (!ok) {
337 device_printf(dev, "device %s requested unsupported I/O "
338 "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n",
339 device_get_nameunit(child), start, end,
340 sc->iobase, sc->iolimit);
341 return (NULL);
342 }
343 if (bootverbose)
344 device_printf(dev, "device %s requested decoded I/O range 0x%lx-0x%lx\n",
345 device_get_nameunit(child), start, end);
346 break;
370
371 case SYS_RES_MEMORY:
347
348 case SYS_RES_MEMORY:
372 ok = 1;
373 if (!pcib_is_isa_mem(start)) {
374 ok = 0;
375 if (pcib_is_nonprefetch_open(sc))
349 ok = 0;
350 if (pcib_is_nonprefetch_open(sc))
376 ok = ok || (start >= sc->membase && end <= sc->memlimit);
351 ok = ok || (start >= sc->membase && end <= sc->memlimit);
377 if (pcib_is_prefetch_open(sc))
352 if (pcib_is_prefetch_open(sc))
378 ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
379 if (!pci_allow_unsupported_io_range) {
380 if (!ok) {
381 ok = 1;
382 if (flags & RF_PREFETCHABLE) {
383 if (pcib_is_prefetch_open(sc)) {
384 if (start < sc->pmembase)
385 start = sc->pmembase;
386 if (end > sc->pmemlimit)
387 end = sc->pmemlimit;
388 } else {
389 ok = 0;
390 }
391 } else { /* non-prefetchable */
392 if (pcib_is_nonprefetch_open(sc)) {
393 if (start < sc->membase)
394 start = sc->membase;
395 if (end > sc->memlimit)
396 end = sc->memlimit;
397 } else {
398 ok = 0;
399 }
353 ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
354 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
355 if (!ok) {
356 ok = 1;
357 if (flags & RF_PREFETCHABLE) {
358 if (pcib_is_prefetch_open(sc)) {
359 if (start < sc->pmembase)
360 start = sc->pmembase;
361 if (end > sc->pmemlimit)
362 end = sc->pmemlimit;
363 } else {
364 ok = 0;
365 }
366 } else { /* non-prefetchable */
367 if (pcib_is_nonprefetch_open(sc)) {
368 if (start < sc->membase)
369 start = sc->membase;
370 if (end > sc->memlimit)
371 end = sc->memlimit;
372 } else {
373 ok = 0;
374 }
375 }
400 }
376 }
401 }
402 } else if (!ok) {
377 } else if (!ok) {
403 ok = 1; /* pci_allow_unsupported_ranges -> always ok */
404 if (pcib_is_nonprefetch_open(sc)) {
405 if (start < sc->membase)
406 printf("start (%lx) < sc->membase (%x)\n",
407 start, sc->membase);
408 if (end > sc->memlimit)
409 printf("end (%lx) > sc->memlimit (%x)\n",
410 end, sc->memlimit);
411 }
412 if (pcib_is_prefetch_open(sc)) {
413 if (start < sc->pmembase)
414 printf("start (%lx) < sc->pmembase (%x)\n",
415 start, sc->pmembase);
416 if (end > sc->pmemlimit)
417 printf("end (%lx) > sc->pmemlimit (%x)\n",
418 end, sc->memlimit);
419 }
420 if (end < start)
421 printf("end (%lx) < start (%lx)\n", end, start);
378 ok = 1; /* subtractive bridge: always ok */
379 if (pcib_is_nonprefetch_open(sc)) {
380 if (start < sc->membase && end > sc->memlimit) {
381 start = sc->membase;
382 end = sc->memlimit;
383 }
384 }
385 if (pcib_is_prefetch_open(sc)) {
386 if (start < sc->pmembase && end > sc->pmemlimit) {
387 start = sc->pmembase;
388 end = sc->pmemlimit;
389 }
390 }
422 }
391 }
423 }
424 if (end < start) {
425 start = 0;
426 end = 0;
427 ok = 0;
428 }
429 if (!ok && bootverbose)
430 device_printf(dev,
431 "device %s%d requested unsupported memory range "
432 "0x%lx-0x%lx (decoding 0x%x-0x%x, 0x%x-0x%x)\n",
433 device_get_name(child), device_get_unit(child), start,
434 end, sc->membase, sc->memlimit, sc->pmembase,
435 sc->pmemlimit);
436 if (!ok)
437 return (NULL);
438 if (bootverbose)
439 device_printf(sc->dev, "device %s%d requested decoded memory range 0x%lx-0x%lx\n",
440 device_get_name(child), device_get_unit(child), start, end);
441 break;
392 if (end < start) {
393 device_printf(dev, "memory: end (%lx) < start (%lx)\n", end, start);
394 start = 0;
395 end = 0;
396 ok = 0;
397 }
398 if (!ok && bootverbose)
399 device_printf(dev,
400 "device %s requested unsupported memory range "
401 "0x%lx-0x%lx (decoding 0x%x-0x%x, 0x%x-0x%x)\n",
402 device_get_nameunit(child), start, end,
403 sc->membase, sc->memlimit, sc->pmembase,
404 sc->pmemlimit);
405 if (!ok)
406 return (NULL);
407 if (bootverbose)
408 device_printf(dev,"device %s requested decoded memory range 0x%lx-0x%lx\n",
409 device_get_nameunit(child), start, end);
410 break;
442
443 default:
411
412 default:
444 break;
413 break;
445 }
414 }
446 }
447
448 /*
449 * Bridge is OK decoding this resource, so pass it up.
450 */
451 return(bus_generic_alloc_resource(dev, child, type, rid, start, end, count, flags));
415 /*
416 * Bridge is OK decoding this resource, so pass it up.
417 */
418 return (bus_generic_alloc_resource(dev, child, type, rid, start, end, count, flags));
452}
453
454/*
455 * PCIB interface.
456 */
457int
458pcib_maxslots(device_t dev)
459{

--- 134 unchanged lines hidden --- 		419}
420
421/*
422 * PCIB interface.
423 */
424int
425pcib_maxslots(device_t dev)
426{

--- 134 unchanged lines hidden ---