ofw_pci.h (86557) | ofw_pci.h (141752) |
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1/*- 2 * Copyright (c) 1999 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 7 * NASA Ames Research Center. 8 * --- 20 unchanged lines hidden (view full) --- 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 * | 1/*- 2 * Copyright (c) 1999 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 7 * NASA Ames Research Center. 8 * --- 20 unchanged lines hidden (view full) --- 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 * |
37 * from: NetBSD: ofw_pci.h,v 1.3 2001/02/16 14:16:30 mrg Exp | 37 * from: NetBSD: ofw_pci.h,v 1.5 2003/10/22 09:04:39 mjl Exp |
38 * | 38 * |
39 * $FreeBSD: head/sys/dev/ofw/ofw_pci.h 86557 2001-11-18 20:38:44Z tmm $ | 39 * $FreeBSD: head/sys/dev/ofw/ofw_pci.h 141752 2005-02-12 19:12:17Z marius $ |
40 */ 41 42#ifndef _DEV_OFW_OFW_PCI_H_ 43#define _DEV_OFW_OFW_PCI_H_ 44 45/* 46 * PCI Bus Binding to: 47 * --- 8 unchanged lines hidden (view full) --- 56 * 57 * A PCI physical address is represented by 3 address cells: 58 * 59 * phys.hi cell: npt000ss bbbbbbbb dddddfff rrrrrrrr 60 * phys.mid cell: hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh 61 * phys.lo cell: llllllll llllllll llllllll llllllll 62 * 63 * n nonrelocatable | 40 */ 41 42#ifndef _DEV_OFW_OFW_PCI_H_ 43#define _DEV_OFW_OFW_PCI_H_ 44 45/* 46 * PCI Bus Binding to: 47 * --- 8 unchanged lines hidden (view full) --- 56 * 57 * A PCI physical address is represented by 3 address cells: 58 * 59 * phys.hi cell: npt000ss bbbbbbbb dddddfff rrrrrrrr 60 * phys.mid cell: hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh 61 * phys.lo cell: llllllll llllllll llllllll llllllll 62 * 63 * n nonrelocatable |
64 * p prefectable | 64 * p prefetchable |
65 * t aliased below 1MB (memory) or 64k (i/o) 66 * ss space code 67 * b bus number 68 * d device number 69 * f function number 70 * r register number 71 * h high 32-bits of PCI address 72 * l low 32-bits of PCI address --- 38 unchanged lines hidden --- | 65 * t aliased below 1MB (memory) or 64k (i/o) 66 * ss space code 67 * b bus number 68 * d device number 69 * f function number 70 * r register number 71 * h high 32-bits of PCI address 72 * l low 32-bits of PCI address --- 38 unchanged lines hidden --- |