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if_ngereg.h (192299) if_ngereg.h (192506)
1/*-
2 * Copyright (c) 2001 Wind River Systems
3 * Copyright (c) 1997, 1998, 1999, 2000, 2001
4 * Bill Paul <wpaul@bsdi.com>. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 16 unchanged lines hidden (view full) ---

25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
32 *
1/*-
2 * Copyright (c) 2001 Wind River Systems
3 * Copyright (c) 1997, 1998, 1999, 2000, 2001
4 * Bill Paul <wpaul@bsdi.com>. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 16 unchanged lines hidden (view full) ---

25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * $FreeBSD: head/sys/dev/nge/if_ngereg.h 192299 2009-05-18 07:13:42Z yongari $
33 * $FreeBSD: head/sys/dev/nge/if_ngereg.h 192506 2009-05-21 02:12:10Z yongari $
34 */
35
36#define NGE_CSR 0x00
37#define NGE_CFG 0x04
38#define NGE_MEAR 0x08
39#define NGE_PCITST 0x0C
40#define NGE_ISR 0x10
41#define NGE_IMR 0x14

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297#define NGE_RXDMA_8BYTES 0x00100000
298#define NGE_RXDMA_16BYTES 0x00200000
299#define NGE_RXDMA_32YTES 0x00300000
300#define NGE_RXDMA_64BYTES 0x00400000
301#define NGE_RXDMA_128BYTES 0x00500000
302#define NGE_RXDMA_256BYTES 0x00600000
303#define NGE_RXDMA_512BYTES 0x00700000
304
34 */
35
36#define NGE_CSR 0x00
37#define NGE_CFG 0x04
38#define NGE_MEAR 0x08
39#define NGE_PCITST 0x0C
40#define NGE_ISR 0x10
41#define NGE_IMR 0x14

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297#define NGE_RXDMA_8BYTES 0x00100000
298#define NGE_RXDMA_16BYTES 0x00200000
299#define NGE_RXDMA_32YTES 0x00300000
300#define NGE_RXDMA_64BYTES 0x00400000
301#define NGE_RXDMA_128BYTES 0x00500000
302#define NGE_RXDMA_256BYTES 0x00600000
303#define NGE_RXDMA_512BYTES 0x00700000
304
305/*
306 * DP83820/DP83821 with H/W VLAN stripping does not accept short VLAN
307 * tagged packets such as ARP, short icmp echo request, etc. It seems
308 * that MAC checks frame length for VLAN tagged packets after stripping
309 * the VLAN tag. For short VLAN tagged packets it would would be 56
310 * (64 - CRC - VLAN info) bytes in length after stripping VLAN tag.
311 * If the VLAN tag stripped frames are less than 60 bytes in length
312 * the hardware think it received runt packets!
313 * Therefore we should accept runt frames to get VLAN tagged ARP
314 * packets. In addition, it is known that some revisions of
315 * DP83820/DP83821 have another bug that prevent fragmented IP packets
316 * from accepting. So we also should accept errored frames.
317 */
305#define NGE_RXCFG \
318#define NGE_RXCFG \
306 (NGE_RXCFG_DRAIN(64)|NGE_RXDMA_256BYTES|\
307 NGE_RXCFG_RX_GIANTS|NGE_RXCFG_RX_NOCRC)
319 (NGE_RXCFG_DRAIN(64) | NGE_RXDMA_256BYTES| \
320 NGE_RXCFG_RX_RANGEERR | NGE_RXCFG_RX_BADPKTS | NGE_RXCFG_RX_RUNT | \
321 NGE_RXCFG_RX_GIANTS | NGE_RXCFG_RX_NOCRC)
308
309/* Priority queue control */
310#define NGE_PRIOQCTL_TXPRIO_ENB 0x00000001
311#define NGE_PRIOQCTL_TXFAIR_ENB 0x00000002
312#define NGE_PRIOQCTL_RXPRIO 0x0000000C
313
314#define NGE_RXPRIOQ_DISABLED 0x00000000
315#define NGE_RXPRIOQ_TWOQS 0x00000004
316#define NGE_RXPRIOQ_THREEQS 0x00000008
317#define NGE_RXPRIOQ_FOURQS 0x0000000C
318
319/* Wake On LAN command/status register */
320#define NGE_WOLCSR_WAKE_ON_PHYINTR 0x00000001
321#define NGE_WOLCSR_WAKE_ON_UNICAST 0x00000002
322#define NGE_WOLCSR_WAKE_ON_MULTICAST 0x00000004
322
323/* Priority queue control */
324#define NGE_PRIOQCTL_TXPRIO_ENB 0x00000001
325#define NGE_PRIOQCTL_TXFAIR_ENB 0x00000002
326#define NGE_PRIOQCTL_RXPRIO 0x0000000C
327
328#define NGE_RXPRIOQ_DISABLED 0x00000000
329#define NGE_RXPRIOQ_TWOQS 0x00000004
330#define NGE_RXPRIOQ_THREEQS 0x00000008
331#define NGE_RXPRIOQ_FOURQS 0x0000000C
332
333/* Wake On LAN command/status register */
334#define NGE_WOLCSR_WAKE_ON_PHYINTR 0x00000001
335#define NGE_WOLCSR_WAKE_ON_UNICAST 0x00000002
336#define NGE_WOLCSR_WAKE_ON_MULTICAST 0x00000004
323#define NGR_WOLCSR_WAKE_ON_BROADCAST 0x00000008
337#define NGE_WOLCSR_WAKE_ON_BROADCAST 0x00000008
324#define NGE_WOLCSR_WAKE_ON_ARP 0x00000010
325#define NGE_WOLCSR_WAKE_ON_PAT0_MATCH 0x00000020
326#define NGE_WOLCSR_WAKE_ON_PAT1_MATCH 0x00000040
327#define NGE_WOLCSR_WAKE_ON_PAT2_MATCH 0x00000080
328#define NGE_WOLCSR_WAKE_ON_PAT3_MATCH 0x00000100
338#define NGE_WOLCSR_WAKE_ON_ARP 0x00000010
339#define NGE_WOLCSR_WAKE_ON_PAT0_MATCH 0x00000020
340#define NGE_WOLCSR_WAKE_ON_PAT1_MATCH 0x00000040
341#define NGE_WOLCSR_WAKE_ON_PAT2_MATCH 0x00000080
342#define NGE_WOLCSR_WAKE_ON_PAT3_MATCH 0x00000100
329#define NGE_WOLCSR_SECUREON_ENB 0x00000200
343#define NGE_WOLCSR_WAKE_ON_MAGICPKT 0x00000200
344#define NGE_WOLCSR_SECUREON_ENB 0x00000400
330#define NGE_WOLCSR_SECUREON_HACK 0x00200000
331#define NGE_WOLCSR_PHYINTR 0x00400000
332#define NGE_WOLCSR_UNICAST 0x00800000
333#define NGE_WOLCSR_MULTICAST 0x01000000
334#define NGE_WOLCSR_BROADCAST 0x02000000
335#define NGE_WOLCSR_ARP_RCVD 0x04000000
336#define NGE_WOLCSR_PAT0_MATCH 0x08000000
337#define NGE_WOLCSR_PAT1_MATCH 0x10000000

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459 * deliberately designed to be similar to facilitate passing them between
460 * RX and TX queues on multiple controllers, in the case where you have
461 * multiple MACs in a switching configuration. With the 83820, the pointer
462 * values can be either 64 bits or 32 bits depending on how the chip is
463 * configured. For the 83821, the fields are always 32-bits. There is
464 * also an optional extended status field for VLAN and TCP/IP checksum
465 * functions. We use the checksum feature so we enable the use of this
466 * field. Descriptors must be 64-bit aligned.
345#define NGE_WOLCSR_SECUREON_HACK 0x00200000
346#define NGE_WOLCSR_PHYINTR 0x00400000
347#define NGE_WOLCSR_UNICAST 0x00800000
348#define NGE_WOLCSR_MULTICAST 0x01000000
349#define NGE_WOLCSR_BROADCAST 0x02000000
350#define NGE_WOLCSR_ARP_RCVD 0x04000000
351#define NGE_WOLCSR_PAT0_MATCH 0x08000000
352#define NGE_WOLCSR_PAT1_MATCH 0x10000000

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474 * deliberately designed to be similar to facilitate passing them between
475 * RX and TX queues on multiple controllers, in the case where you have
476 * multiple MACs in a switching configuration. With the 83820, the pointer
477 * values can be either 64 bits or 32 bits depending on how the chip is
478 * configured. For the 83821, the fields are always 32-bits. There is
479 * also an optional extended status field for VLAN and TCP/IP checksum
480 * functions. We use the checksum feature so we enable the use of this
481 * field. Descriptors must be 64-bit aligned.
467 * After this, we include some additional structure members for
468 * use by the driver. Note that for this structure will be a different
469 * size on the alpha, but that's okay as long as it's a multiple of 4
470 * bytes in size.
471 *
472 */
473struct nge_desc_64 {
474 /* Hardware descriptor section */
482 */
483struct nge_desc_64 {
484 /* Hardware descriptor section */
475 volatile uint32_t nge_next_lo;
476 volatile uint32_t nge_next_hi;
477 volatile uint32_t nge_ptr_lo;
478 volatile uint32_t nge_ptr_hi;
479 volatile uint32_t nge_cmdsts;
480#define nge_rxstat nge_cmdsts
481#define nge_txstat nge_cmdsts
482#define nge_ctl nge_cmdsts
483 volatile uint32_t nge_extsts;
484 /* Driver software section */
485 union {
486 struct mbuf *nge_mbuf;
487 uint64_t nge_dummy;
488 } nge_mb_u;
489 union {
490 struct nge_desc_32 *nge_nextdesc;
491 uint64_t nge_dummy;
492 } nge_nd_u;
485 uint32_t nge_next_lo;
486 uint32_t nge_next_hi;
487 uint32_t nge_ptr_lo;
488 uint32_t nge_ptr_hi;
489 uint32_t nge_cmdsts;
490 uint32_t nge_extsts;
493};
494
495struct nge_desc_32 {
496 /* Hardware descriptor section */
491};
492
493struct nge_desc_32 {
494 /* Hardware descriptor section */
497 volatile uint32_t nge_next;
498 volatile uint32_t nge_ptr;
499 volatile uint32_t nge_cmdsts;
500#define nge_rxstat nge_cmdsts
501#define nge_txstat nge_cmdsts
502#define nge_ctl nge_cmdsts
503 volatile uint32_t nge_extsts;
504 /* Driver software section */
505 union {
506 struct mbuf *nge_mbuf;
507 uint64_t nge_dummy;
508 } nge_mb_u;
509 union {
510 struct nge_desc_32 *nge_nextdesc;
511 uint64_t nge_dummy;
512 } nge_nd_u;
495 uint32_t nge_next;
496 uint32_t nge_ptr;
497 uint32_t nge_cmdsts;
498 uint32_t nge_extsts;
513};
514
499};
500
515#define nge_mbuf nge_mb_u.nge_mbuf
516#define nge_nextdesc nge_nd_u.nge_nextdesc
517
518
519#define nge_desc nge_desc_32
520
521#define NGE_CMDSTS_BUFLEN 0x0000FFFF
522#define NGE_CMDSTS_PKT_OK 0x08000000
523#define NGE_CMDSTS_CRC 0x10000000
524#define NGE_CMDSTS_INTR 0x20000000
525#define NGE_CMDSTS_MORE 0x40000000
526#define NGE_CMDSTS_OWN 0x80000000
527
501#define nge_desc nge_desc_32
502
503#define NGE_CMDSTS_BUFLEN 0x0000FFFF
504#define NGE_CMDSTS_PKT_OK 0x08000000
505#define NGE_CMDSTS_CRC 0x10000000
506#define NGE_CMDSTS_INTR 0x20000000
507#define NGE_CMDSTS_MORE 0x40000000
508#define NGE_CMDSTS_OWN 0x80000000
509
528#define NGE_LASTDESC(x) (!((x)->nge_ctl & NGE_CMDSTS_MORE))
529#define NGE_MORE(x) ((x)->nge_ctl & NGE_CMDSTS_MORE)
530#define NGE_OWNDESC(x) ((x)->nge_ctl & NGE_CMDSTS_OWN)
531#define NGE_INC(x, y) (x) = (x + 1) % y
532#define NGE_RXBYTES(x) ((x)->nge_ctl & NGE_CMDSTS_BUFLEN)
510#define NGE_INC(x, y) (x) = ((x) + 1) % y
533
534#define NGE_RXSTAT_RANGELENERR 0x00010000
535#define NGE_RXSTAT_LOOPBK 0x00020000
536#define NGE_RXSTAT_ALIGNERR 0x00040000
537#define NGE_RXSTAT_CRCERR 0x00080000
538#define NGE_RXSTAT_SYMBOLERR 0x00100000
539#define NGE_RXSTAT_RUNT 0x00200000
540#define NGE_RXSTAT_GIANT 0x00400000

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566#define NGE_RXEXTSTS_VLANPKT 0x00010000
567#define NGE_RXEXTSTS_IPPKT 0x00020000
568#define NGE_RXEXTSTS_IPCSUMERR 0x00040000
569#define NGE_RXEXTSTS_TCPPKT 0x00080000
570#define NGE_RXEXTSTS_TCPCSUMERR 0x00100000
571#define NGE_RXEXTSTS_UDPPKT 0x00200000
572#define NGE_RXEXTSTS_UDPCSUMERR 0x00400000
573
511
512#define NGE_RXSTAT_RANGELENERR 0x00010000
513#define NGE_RXSTAT_LOOPBK 0x00020000
514#define NGE_RXSTAT_ALIGNERR 0x00040000
515#define NGE_RXSTAT_CRCERR 0x00080000
516#define NGE_RXSTAT_SYMBOLERR 0x00100000
517#define NGE_RXSTAT_RUNT 0x00200000
518#define NGE_RXSTAT_GIANT 0x00400000

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544#define NGE_RXEXTSTS_VLANPKT 0x00010000
545#define NGE_RXEXTSTS_IPPKT 0x00020000
546#define NGE_RXEXTSTS_IPCSUMERR 0x00040000
547#define NGE_RXEXTSTS_TCPPKT 0x00080000
548#define NGE_RXEXTSTS_TCPCSUMERR 0x00100000
549#define NGE_RXEXTSTS_UDPPKT 0x00200000
550#define NGE_RXEXTSTS_UDPCSUMERR 0x00400000
551
574#define NGE_RX_LIST_CNT 128
575#define NGE_TX_LIST_CNT 128
552#define NGE_TX_RING_CNT 256
553#define NGE_RX_RING_CNT 256
554#define NGE_TX_RING_SIZE sizeof(struct nge_desc) * NGE_TX_RING_CNT
555#define NGE_RX_RING_SIZE sizeof(struct nge_desc) * NGE_RX_RING_CNT
556#define NGE_RING_ALIGN sizeof(uint64_t)
557#define NGE_RX_ALIGN sizeof(uint64_t)
558#define NGE_MAXTXSEGS 16
576
559
577struct nge_list_data {
578 struct nge_desc nge_rx_list[NGE_RX_LIST_CNT];
579 struct nge_desc nge_tx_list[NGE_TX_LIST_CNT];
580#ifdef notyet
581 int vge_tx_prodidx;
582 int vge_rx_prodidx;
583 int vge_tx_considx;
584 int vge_tx_free;
560#define NGE_ADDR_LO(x) ((uint64_t)(x) & 0xffffffff)
561#define NGE_ADDR_HI(x) ((uint64_t)(x) >> 32)
562#define NGE_TX_RING_ADDR(sc, i) \
563 ((sc)->nge_rdata.nge_tx_ring_paddr + sizeof(struct nge_desc) * (i))
564#define NGE_RX_RING_ADDR(sc, i) \
565 ((sc)->nge_rdata.nge_rx_ring_paddr + sizeof(struct nge_desc) * (i))
585
566
586 struct nge_desc *nge_tx_list;
587 struct mbuf *nge_tx_mbuf[NGE_TX_DESC_CNT]
588 bus_dmamap_t nge_tx_dmamap[NGE_TX_DESC_CNT];
589 bus_dma_tag_t nge_tx_list_tag;
590 bus_dmamap_t nge_tx_list_map[NGE_TX_DESC_CNT];
591 bus_addr_t nge_tx_list_add[NGE_TX_DESC_CNT];
567struct nge_txdesc {
568 struct mbuf *tx_m;
569 bus_dmamap_t tx_dmamap;
570};
592
571
593 struct nge_desc *nge_rx_list;
594 struct mbuf *nge_rx_mbuf[NGE_RX_DESC_CNT]
595 bus_dmamap_t nge_rx_dmamap[NGE_RX_DESC_CNT];
596 bus_dma_tag_t nge_rx_list_tag;
597 bus_dmamap_t nge_rx_list_map[NGE_RX_DESC_CNT];
598 bus_addr_t nge_rx_list_addr[NGE_RX_DESC_CNT];
599#endif
572struct nge_rxdesc {
573 struct mbuf *rx_m;
574 bus_dmamap_t rx_dmamap;
600};
601
575};
576
577struct nge_chain_data {
578 bus_dma_tag_t nge_parent_tag;
579 bus_dma_tag_t nge_tx_tag;
580 struct nge_txdesc nge_txdesc[NGE_TX_RING_CNT];
581 bus_dma_tag_t nge_rx_tag;
582 struct nge_rxdesc nge_rxdesc[NGE_RX_RING_CNT];
583 bus_dma_tag_t nge_tx_ring_tag;
584 bus_dma_tag_t nge_rx_ring_tag;
585 bus_dmamap_t nge_tx_ring_map;
586 bus_dmamap_t nge_rx_ring_map;
587 bus_dmamap_t nge_rx_sparemap;
588 int nge_tx_prod;
589 int nge_tx_cons;
590 int nge_tx_cnt;
591 int nge_rx_cons;
592};
602
593
594struct nge_ring_data {
595 struct nge_desc *nge_tx_ring;
596 bus_addr_t nge_tx_ring_paddr;
597 struct nge_desc *nge_rx_ring;
598 bus_addr_t nge_rx_ring_paddr;
599};
600
603/*
604 * NatSemi PCI vendor ID.
605 */
606#define NGE_VENDORID 0x100B
607
608/*
609 * 83820/83821 PCI device IDs
610 */

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628/*
629 * MII constants
630 */
631#define NGE_MII_STARTDELIM 0x01
632#define NGE_MII_READOP 0x02
633#define NGE_MII_WRITEOP 0x01
634#define NGE_MII_TURNAROUND 0x02
635
601/*
602 * NatSemi PCI vendor ID.
603 */
604#define NGE_VENDORID 0x100B
605
606/*
607 * 83820/83821 PCI device IDs
608 */

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626/*
627 * MII constants
628 */
629#define NGE_MII_STARTDELIM 0x01
630#define NGE_MII_READOP 0x02
631#define NGE_MII_WRITEOP 0x01
632#define NGE_MII_TURNAROUND 0x02
633
636#define NGE_JUMBO_FRAMELEN 9018
637#define NGE_JUMBO_MTU (NGE_JUMBO_FRAMELEN-ETHER_HDR_LEN-ETHER_CRC_LEN)
634#define NGE_JUMBO_FRAMELEN 9022
635#define NGE_JUMBO_MTU \
636 (NGE_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - ETHER_CRC_LEN)
638
637
639#if !defined(__i386__)
640#define NGE_FIXUP_RX
641#endif
642
643struct nge_ring_data {
644 int nge_rx_prod;
645 int nge_tx_prod;
646 int nge_tx_cons;
647 int nge_tx_cnt;
638/* Statistics counters. */
639struct nge_stats {
640 uint32_t rx_pkts_errs;
641 uint32_t rx_crc_errs;
642 uint32_t rx_fifo_oflows;
643 uint32_t rx_align_errs;
644 uint32_t rx_sym_errs;
645 uint32_t rx_pkts_jumbos;
646 uint32_t rx_len_errs;
647 uint32_t rx_unctl_frames;
648 uint32_t rx_pause;
649 uint32_t tx_pause;
650 uint32_t tx_seq_errs;
648};
649
650struct nge_softc {
651 struct ifnet *nge_ifp;
652 device_t nge_dev;
651};
652
653struct nge_softc {
654 struct ifnet *nge_ifp;
655 device_t nge_dev;
653 bus_space_handle_t nge_bhandle;
654 bus_space_tag_t nge_btag;
655 struct resource *nge_res;
656 struct resource *nge_res;
657 int nge_res_type;
658 int nge_res_id;
656 struct resource *nge_irq;
657 void *nge_intrhand;
658 device_t nge_miibus;
659 int nge_if_flags;
659 struct resource *nge_irq;
660 void *nge_intrhand;
661 device_t nge_miibus;
662 int nge_if_flags;
660 uint8_t nge_type;
661 uint8_t nge_link;
662 uint8_t nge_width;
663#define NGE_WIDTH_32BITS 0
664#define NGE_WIDTH_64BITS 1
665 struct nge_list_data *nge_ldata;
666 struct nge_ring_data nge_cdata;
663 uint32_t nge_flags;
664#define NGE_FLAG_TBI 0x0002
665#define NGE_FLAG_SUSPENDED 0x2000
666#define NGE_FLAG_DETACH 0x4000
667#define NGE_FLAG_LINK 0x8000
668 struct nge_chain_data nge_cdata;
669 struct nge_ring_data nge_rdata;
667 struct callout nge_stat_ch;
670 struct callout nge_stat_ch;
671 struct nge_stats nge_stats;
668 struct mtx nge_mtx;
672 struct mtx nge_mtx;
669 uint8_t nge_tbi;
670 struct ifmedia nge_ifmedia;
671#ifdef DEVICE_POLLING
672 int rxcycles;
673#endif
673#ifdef DEVICE_POLLING
674 int rxcycles;
675#endif
676 int nge_watchdog_timer;
677 int nge_int_holdoff;
674 struct mbuf *nge_head;
675 struct mbuf *nge_tail;
676};
677
678#define NGE_LOCK_INIT(_sc, _name) \
679 mtx_init(&(_sc)->nge_mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
680#define NGE_LOCK(_sc) mtx_lock(&(_sc)->nge_mtx)
681#define NGE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->nge_mtx, MA_OWNED)
682#define NGE_UNLOCK(_sc) mtx_unlock(&(_sc)->nge_mtx)
683#define NGE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->nge_mtx)
684
685/*
686 * register space access macros
687 */
688#define CSR_WRITE_4(sc, reg, val) \
678 struct mbuf *nge_head;
679 struct mbuf *nge_tail;
680};
681
682#define NGE_LOCK_INIT(_sc, _name) \
683 mtx_init(&(_sc)->nge_mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
684#define NGE_LOCK(_sc) mtx_lock(&(_sc)->nge_mtx)
685#define NGE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->nge_mtx, MA_OWNED)
686#define NGE_UNLOCK(_sc) mtx_unlock(&(_sc)->nge_mtx)
687#define NGE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->nge_mtx)
688
689/*
690 * register space access macros
691 */
692#define CSR_WRITE_4(sc, reg, val) \
689 bus_space_write_4(sc->nge_btag, sc->nge_bhandle, reg, val)
693 bus_write_4((sc)->nge_res, reg, val)
694#define CSR_BARRIER_WRITE_4(sc, reg) \
695 bus_barrier((sc)->nge_res, reg, 4, BUS_SPACE_BARRIER_WRITE)
690
691#define CSR_READ_4(sc, reg) \
696
697#define CSR_READ_4(sc, reg) \
692 bus_space_read_4(sc->nge_btag, sc->nge_bhandle, reg)
698 bus_read_4((sc)->nge_res, reg)
693
694#define NGE_TIMEOUT 1000
699
700#define NGE_TIMEOUT 1000
695#define NGE_RXLEN 1536
696#define NGE_MIN_FRAMELEN 60
697
701
702#define NGE_INT_HOLDOFF_DEFAULT 1
703#define NGE_INT_HOLDOFF_MIN 0
704#define NGE_INT_HOLDOFF_MAX 255
705
698/*
699 * PCI low memory base and low I/O base register, and
700 * other PCI registers.
701 */
702
703#define NGE_PCI_VENDOR_ID 0x00
704#define NGE_PCI_DEVICE_ID 0x02
705#define NGE_PCI_COMMAND 0x04

--- 29 unchanged lines hidden --- 		706/*
707 * PCI low memory base and low I/O base register, and
708 * other PCI registers.
709 */
710
711#define NGE_PCI_VENDOR_ID 0x00
712#define NGE_PCI_DEVICE_ID 0x02
713#define NGE_PCI_COMMAND 0x04

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