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if_mxge_var.h (166875) if_mxge_var.h (169840)
1/*******************************************************************************
2
3Copyright (c) 2006, Myricom Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

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24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
1/*******************************************************************************
2
3Copyright (c) 2006, Myricom Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

--- 15 unchanged lines hidden (view full) ---

24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
32$FreeBSD: head/sys/dev/mxge/if_mxge_var.h 166875 2007-02-21 17:34:05Z gallatin $
32$FreeBSD: head/sys/dev/mxge/if_mxge_var.h 169840 2007-05-21 18:32:27Z gallatin $
33
34***************************************************************************/
35
36#define MXGE_MAX_ETHER_MTU 9014
37
38#define MXGE_ETH_STOPPED 0
39#define MXGE_ETH_STOPPING 1
40#define MXGE_ETH_STARTING 2

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83{
84 volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */
85 volatile uint8_t *wc_fifo; /* w/c rx dma addr fifo address */
86 mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */
87 struct mxge_rx_buffer_state *info;
88 bus_dma_tag_t dmat;
89 bus_dmamap_t extra_map;
90 int cnt;
33
34***************************************************************************/
35
36#define MXGE_MAX_ETHER_MTU 9014
37
38#define MXGE_ETH_STOPPED 0
39#define MXGE_ETH_STOPPING 1
40#define MXGE_ETH_STARTING 2

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83{
84 volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */
85 volatile uint8_t *wc_fifo; /* w/c rx dma addr fifo address */
86 mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */
87 struct mxge_rx_buffer_state *info;
88 bus_dma_tag_t dmat;
89 bus_dmamap_t extra_map;
90 int cnt;
91 int nbufs;
92 int cl_size;
91 int alloc_fail;
92 int mask; /* number of rx slots -1 */
93} mxge_rx_buf_t;
94
95typedef struct
96{
97 volatile mcp_kreq_ether_send_t *lanai; /* lanai ptr for sendq */
98 volatile uint8_t *wc_fifo; /* w/c send fifo address */

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107 int pkt_done; /* packets completed */
108 int boundary; /* boundary transmits cannot cross*/
109 int stall; /* #times hw queue exhausted */
110 int wake; /* #times irq re-enabled xmit */
111 int watchdog_req; /* cache of req */
112 int watchdog_done; /* cache of done */
113} mxge_tx_buf_t;
114
93 int alloc_fail;
94 int mask; /* number of rx slots -1 */
95} mxge_rx_buf_t;
96
97typedef struct
98{
99 volatile mcp_kreq_ether_send_t *lanai; /* lanai ptr for sendq */
100 volatile uint8_t *wc_fifo; /* w/c send fifo address */

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109 int pkt_done; /* packets completed */
110 int boundary; /* boundary transmits cannot cross*/
111 int stall; /* #times hw queue exhausted */
112 int wake; /* #times irq re-enabled xmit */
113 int watchdog_req; /* cache of req */
114 int watchdog_done; /* cache of done */
115} mxge_tx_buf_t;
116
117struct lro_entry;
118struct lro_entry
119{
120 SLIST_ENTRY(lro_entry) next;
121 struct mbuf *m_head;
122 struct mbuf *m_tail;
123 int timestamp;
124 struct ip *ip;
125 uint32_t tsval;
126 uint32_t tsecr;
127 uint32_t source_ip;
128 uint32_t dest_ip;
129 uint32_t next_seq;
130 uint32_t ack_seq;
131 uint32_t len;
132 uint32_t data_csum;
133 uint16_t window;
134 uint16_t source_port;
135 uint16_t dest_port;
136 uint16_t append_cnt;
137 uint16_t mss;
138
139};
140SLIST_HEAD(lro_head, lro_entry);
141
115typedef struct {
116 struct ifnet* ifp;
142typedef struct {
143 struct ifnet* ifp;
117 int big_bytes;
118 struct mtx tx_mtx;
119 int csum_flag; /* rx_csums? */
120 uint8_t mac_addr[6]; /* eeprom mac address */
121 mxge_tx_buf_t tx; /* transmit ring */
122 mxge_rx_buf_t rx_small;
123 mxge_rx_buf_t rx_big;
124 mxge_rx_done_t rx_done;
125 mcp_irq_data_t *fw_stats;
126 bus_dma_tag_t parent_dmat;
127 volatile uint8_t *sram;
144 struct mtx tx_mtx;
145 int csum_flag; /* rx_csums? */
146 uint8_t mac_addr[6]; /* eeprom mac address */
147 mxge_tx_buf_t tx; /* transmit ring */
148 mxge_rx_buf_t rx_small;
149 mxge_rx_buf_t rx_big;
150 mxge_rx_done_t rx_done;
151 mcp_irq_data_t *fw_stats;
152 bus_dma_tag_t parent_dmat;
153 volatile uint8_t *sram;
154 struct lro_head lro_active;
155 struct lro_head lro_free;
156 int lro_queued;
157 int lro_flushed;
158 int lro_bad_csum;
159 int lro_cnt;
128 int sram_size;
129 volatile uint32_t *irq_deassert;
130 volatile uint32_t *irq_claim;
131 mcp_cmd_response_t *cmd;
132 mxge_dma_t cmd_dma;
133 mxge_dma_t zeropad_dma;
134 mxge_dma_t fw_stats_dma;
135 struct pci_dev *pdev;

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159 int adopted_rx_filter_bug;
160 device_t dev;
161 struct ifmedia media;
162 int read_dma;
163 int write_dma;
164 int read_write_dma;
165 int fw_multicast_support;
166 int link_width;
160 int sram_size;
161 volatile uint32_t *irq_deassert;
162 volatile uint32_t *irq_claim;
163 mcp_cmd_response_t *cmd;
164 mxge_dma_t cmd_dma;
165 mxge_dma_t zeropad_dma;
166 mxge_dma_t fw_stats_dma;
167 struct pci_dev *pdev;

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191 int adopted_rx_filter_bug;
192 device_t dev;
193 struct ifmedia media;
194 int read_dma;
195 int write_dma;
196 int read_write_dma;
197 int fw_multicast_support;
198 int link_width;
199 int max_mtu;
167 mxge_dma_t dmabench_dma;
168 struct callout co_hdl;
169 char *mac_addr_string;
170 char product_code_string[64];
171 char serial_number_string[64];
172 char scratch[256];
173 char tx_mtx_name[16];
174 char cmd_mtx_name[16];

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212 for (i = (size / sizeof (uintptr_t)); i; i--) {
213 *to = *from;
214 to++;
215 from++;
216 }
217
218}
219
200 mxge_dma_t dmabench_dma;
201 struct callout co_hdl;
202 char *mac_addr_string;
203 char product_code_string[64];
204 char serial_number_string[64];
205 char scratch[256];
206 char tx_mtx_name[16];
207 char cmd_mtx_name[16];

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245 for (i = (size / sizeof (uintptr_t)); i; i--) {
246 *to = *from;
247 to++;
248 from++;
249 }
250
251}
252
253void mxge_lro_flush(mxge_softc_t *mgp, struct lro_entry *lro);
254int mxge_lro_rx(mxge_softc_t *mgp, struct mbuf *m_head, uint32_t csum);
255
220
256
257
221/*
222 This file uses Myri10GE driver indentation.
223
224 Local Variables:
225 c-file-style:"linux"
226 tab-width:8
227 End:
228*/
258/*
259 This file uses Myri10GE driver indentation.
260
261 Local Variables:
262 c-file-style:"linux"
263 tab-width:8
264 End:
265*/