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mpi_ioc.h (156000) mpi_ioc.h (170251)
1/* $FreeBSD: head/sys/dev/mpt/mpilib/mpi_ioc.h 156000 2006-02-25 07:45:54Z mjacob $ */
1/* $FreeBSD: head/sys/dev/mpt/mpilib/mpi_ioc.h 170251 2007-06-03 22:58:27Z scottl $ */
2/*-
3 * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met:
9 * 1. Redistributions of source code must retain the above copyright

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23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
30 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2/*-
3 * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met:
9 * 1. Redistributions of source code must retain the above copyright

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23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
30 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
31 *
33 * Name: mpi_ioc.h
34 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
35 * Creation Date: August 11, 2000
36 *
32 * Name: mpi_ioc.h
33 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
34 * Creation Date: August 11, 2000
35 *
37 * mpi_ioc.h Version: 01.05.10
36 * mpi_ioc.h Version: 01.05.14
38 *
39 * Version History
40 * ---------------
41 *
42 * Date Version Description
43 * -------- -------- ------------------------------------------------------
44 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
45 * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.

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110 * 03-11-05 01.05.08 Added family code for 1068E family.
111 * Removed IOCFacts Reply EEDP Capability bit.
112 * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits.
113 * Added Max SATA Targets to SAS Discovery Error event.
114 * 08-30-05 01.05.10 Added 4 new events and their event data structures.
115 * Added new ReasonCode value for SAS Device Status Change
116 * event.
117 * Added new family code for FC949E.
37 *
38 * Version History
39 * ---------------
40 *
41 * Date Version Description
42 * -------- -------- ------------------------------------------------------
43 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
44 * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.

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109 * 03-11-05 01.05.08 Added family code for 1068E family.
110 * Removed IOCFacts Reply EEDP Capability bit.
111 * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits.
112 * Added Max SATA Targets to SAS Discovery Error event.
113 * 08-30-05 01.05.10 Added 4 new events and their event data structures.
114 * Added new ReasonCode value for SAS Device Status Change
115 * event.
116 * Added new family code for FC949E.
117 * 03-27-06 01.05.11 Added MPI_IOCFACTS_CAPABILITY_TLR.
118 * Added additional Reason Codes and more event data fields
119 * to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE.
120 * Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and
121 * new event.
122 * Added MPI_EVENT_SAS_SMP_ERROR and event data structure.
123 * Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event
124 * data structure.
125 * Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event
126 * data structure.
127 * Added MPI_EXT_IMAGE_TYPE_INITIALIZATION.
128 * 10-11-06 01.05.12 Added MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED.
129 * Added MaxInitiators field to PortFacts reply.
130 * Added SAS Device Status Change ReasonCode for
131 * asynchronous notificaiton.
132 * Added MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE and event
133 * data structure.
134 * Added new ImageType values for FWDownload and FWUpload
135 * requests.
136 * 02-28-07 01.05.13 Added MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT for SAS
137 * Broadcast Event Data (replacing _RESERVED2).
138 * For Discovery Error Event Data DiscoveryStatus field,
139 * replaced _MULTPL_PATHS with _UNSUPPORTED_DEVICE and
140 * added _MULTI_PORT_DOMAIN.
141 * 05-24-07 01.05.14 Added Common Boot Block type to FWDownload Request.
142 * Added Common Boot Block type to FWUpload Request.
118 * --------------------------------------------------------------------------
119 */
120
121#ifndef MPI_IOC_H
122#define MPI_IOC_H
123
124
125/*****************************************************************************

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150 U32 ReplyFifoHostSignalingAddr; /* 18h */
151 SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
152 U16 MsgVersion; /* 28h */
153 U16 HeaderVersion; /* 2Ah */
154} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
155 IOCInit_t, MPI_POINTER pIOCInit_t;
156
157/* WhoInit values */
143 * --------------------------------------------------------------------------
144 */
145
146#ifndef MPI_IOC_H
147#define MPI_IOC_H
148
149
150/*****************************************************************************

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175 U32 ReplyFifoHostSignalingAddr; /* 18h */
176 SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
177 U16 MsgVersion; /* 28h */
178 U16 HeaderVersion; /* 2Ah */
179} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
180 IOCInit_t, MPI_POINTER pIOCInit_t;
181
182/* WhoInit values */
158#define MPI_WHOINIT_NO_ONE (0x00)
159#define MPI_WHOINIT_SYSTEM_BIOS (0x01)
160#define MPI_WHOINIT_ROM_BIOS (0x02)
161#define MPI_WHOINIT_PCI_PEER (0x03)
162#define MPI_WHOINIT_HOST_DRIVER (0x04)
163#define MPI_WHOINIT_MANUFACTURER (0x05)
183#define MPI_WHOINIT_NO_ONE (0x00)
184#define MPI_WHOINIT_SYSTEM_BIOS (0x01)
185#define MPI_WHOINIT_ROM_BIOS (0x02)
186#define MPI_WHOINIT_PCI_PEER (0x03)
187#define MPI_WHOINIT_HOST_DRIVER (0x04)
188#define MPI_WHOINIT_MANUFACTURER (0x05)
164
165/* Flags values */
166#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
167#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
189
190/* Flags values */
191#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
192#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
168#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
193#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
169
170/* MsgVersion */
171#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
172#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
173#define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
174#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
175
176/* HeaderVersion */

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262 MPI_FW_VERSION FWVersion; /* 38h */
263 U16 HighPriorityQueueDepth; /* 3Ch */
264 U16 Reserved2; /* 3Eh */
265 SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
266 U32 ReplyFifoHostSignalingAddr; /* 4Ch */
267} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
268 IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
269
194
195/* MsgVersion */
196#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
197#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
198#define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
199#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
200
201/* HeaderVersion */

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287 MPI_FW_VERSION FWVersion; /* 38h */
288 U16 HighPriorityQueueDepth; /* 3Ch */
289 U16 Reserved2; /* 3Eh */
290 SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
291 U32 ReplyFifoHostSignalingAddr; /* 4Ch */
292} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
293 IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
294
270#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
295#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
271#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
296#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
272#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
297#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
273#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
274
275#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
276#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
277#define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
278#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
279
298#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
299
300#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
301#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
302#define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
303#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
304
280#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
281#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
305#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
306#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
282#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
283#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
307#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
308#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
309#define MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010)
284
310
285#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
311#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
286#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
287#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
288
312#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
313#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
314
289#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
290#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
315#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
316#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
291
292#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
293#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
294#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
295#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
296#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
297#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
298#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
299#define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
300#define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
301#define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
302#define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
317
318#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
319#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
320#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
321#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
322#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
323#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
324#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
325#define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
326#define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
327#define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
328#define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
329#define MPI_IOCFACTS_CAPABILITY_TLR (0x00000800)
303
304
305/*****************************************************************************
306*
307* P o r t M e s s a g e s
308*
309*****************************************************************************/
310

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339 U8 Reserved3; /* 14h */
340 U8 PortType; /* 15h */
341 U16 MaxDevices; /* 16h */
342 U16 PortSCSIID; /* 18h */
343 U16 ProtocolFlags; /* 1Ah */
344 U16 MaxPostedCmdBuffers; /* 1Ch */
345 U16 MaxPersistentIDs; /* 1Eh */
346 U16 MaxLanBuckets; /* 20h */
330
331
332/*****************************************************************************
333*
334* P o r t M e s s a g e s
335*
336*****************************************************************************/
337

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366 U8 Reserved3; /* 14h */
367 U8 PortType; /* 15h */
368 U16 MaxDevices; /* 16h */
369 U16 PortSCSIID; /* 18h */
370 U16 ProtocolFlags; /* 1Ah */
371 U16 MaxPostedCmdBuffers; /* 1Ch */
372 U16 MaxPersistentIDs; /* 1Eh */
373 U16 MaxLanBuckets; /* 20h */
347 U16 Reserved4; /* 22h */
374 U8 MaxInitiators; /* 22h */
375 U8 Reserved4; /* 23h */
348 U32 Reserved5; /* 24h */
349} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
350 PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
351
352
353/* PortTypes values */
354
355#define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)

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471
472/* Switch */
473
474#define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
475#define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
476
477/* Event */
478
376 U32 Reserved5; /* 24h */
377} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
378 PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
379
380
381/* PortTypes values */
382
383#define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)

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499
500/* Switch */
501
502#define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
503#define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
504
505/* Event */
506
479#define MPI_EVENT_NONE (0x00000000)
480#define MPI_EVENT_LOG_DATA (0x00000001)
481#define MPI_EVENT_STATE_CHANGE (0x00000002)
482#define MPI_EVENT_UNIT_ATTENTION (0x00000003)
483#define MPI_EVENT_IOC_BUS_RESET (0x00000004)
484#define MPI_EVENT_EXT_BUS_RESET (0x00000005)
485#define MPI_EVENT_RESCAN (0x00000006)
486#define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
487#define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
488#define MPI_EVENT_LOGOUT (0x00000009)
489#define MPI_EVENT_EVENT_CHANGE (0x0000000A)
490#define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
491#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
492#define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
493#define MPI_EVENT_QUEUE_FULL (0x0000000E)
494#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
495#define MPI_EVENT_SAS_SES (0x00000010)
496#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
497#define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
498#define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
499#define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014)
500#define MPI_EVENT_IR2 (0x00000015)
501#define MPI_EVENT_SAS_DISCOVERY (0x00000016)
502#define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021)
507#define MPI_EVENT_NONE (0x00000000)
508#define MPI_EVENT_LOG_DATA (0x00000001)
509#define MPI_EVENT_STATE_CHANGE (0x00000002)
510#define MPI_EVENT_UNIT_ATTENTION (0x00000003)
511#define MPI_EVENT_IOC_BUS_RESET (0x00000004)
512#define MPI_EVENT_EXT_BUS_RESET (0x00000005)
513#define MPI_EVENT_RESCAN (0x00000006)
514#define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
515#define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
516#define MPI_EVENT_LOGOUT (0x00000009)
517#define MPI_EVENT_EVENT_CHANGE (0x0000000A)
518#define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
519#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
520#define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
521#define MPI_EVENT_QUEUE_FULL (0x0000000E)
522#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
523#define MPI_EVENT_SAS_SES (0x00000010)
524#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
525#define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
526#define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
527#define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014)
528#define MPI_EVENT_IR2 (0x00000015)
529#define MPI_EVENT_SAS_DISCOVERY (0x00000016)
530#define MPI_EVENT_SAS_BROADCAST_PRIMITIVE (0x00000017)
531#define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018)
532#define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW (0x00000019)
533#define MPI_EVENT_SAS_SMP_ERROR (0x0000001A)
534#define MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE (0x0000001B)
535#define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021)
503
504/* AckRequired field values */
505
506#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
507#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
508
509/* EventChange Event data */
510

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581 U8 ASC; /* 04h */
582 U8 ASCQ; /* 05h */
583 U16 DevHandle; /* 06h */
584 U32 DeviceInfo; /* 08h */
585 U16 ParentDevHandle; /* 0Ch */
586 U8 PhyNum; /* 0Eh */
587 U8 Reserved1; /* 0Fh */
588 U64 SASAddress; /* 10h */
536
537/* AckRequired field values */
538
539#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
540#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
541
542/* EventChange Event data */
543

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614 U8 ASC; /* 04h */
615 U8 ASCQ; /* 05h */
616 U16 DevHandle; /* 06h */
617 U32 DeviceInfo; /* 08h */
618 U16 ParentDevHandle; /* 0Ch */
619 U8 PhyNum; /* 0Eh */
620 U8 Reserved1; /* 0Fh */
621 U64 SASAddress; /* 10h */
622 U8 LUN[8]; /* 18h */
623 U16 TaskTag; /* 20h */
624 U16 Reserved2; /* 22h */
589} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
590 MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
591 MpiEventDataSasDeviceStatusChange_t,
592 MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
593
594/* MPI SAS Device Status Change Event data ReasonCode values */
625} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
626 MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
627 MpiEventDataSasDeviceStatusChange_t,
628 MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
629
630/* MPI SAS Device Status Change Event data ReasonCode values */
595#define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
596#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
597#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
598#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
599#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
600#define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
631#define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
632#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
633#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
634#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
635#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
636#define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
637#define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09)
638#define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A)
639#define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B)
640#define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C)
641#define MPI_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D)
601
602
603/* SCSI Event data for Queue Full event */
604
605typedef struct _EVENT_DATA_QUEUE_FULL
606{
607 U8 TargetID; /* 00h */
608 U8 Bus; /* 01h */

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765{
766 U8 PhyNum; /* 00h */
767 U8 Port; /* 01h */
768 U8 PortWidth; /* 02h */
769 U8 Reserved1; /* 04h */
770} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
771 MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
772
642
643
644/* SCSI Event data for Queue Full event */
645
646typedef struct _EVENT_DATA_QUEUE_FULL
647{
648 U8 TargetID; /* 00h */
649 U8 Bus; /* 01h */

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806{
807 U8 PhyNum; /* 00h */
808 U8 Port; /* 01h */
809 U8 PortWidth; /* 02h */
810 U8 Reserved1; /* 04h */
811} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
812 MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
813
814/* SAS Broadcast Primitive Event data */
815
816typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE
817{
818 U8 PhyNum; /* 00h */
819 U8 Port; /* 01h */
820 U8 PortWidth; /* 02h */
821 U8 Primitive; /* 04h */
822} EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
823 MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
824 MpiEventDataSasBroadcastPrimitive_t,
825 MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t;
826
827#define MPI_EVENT_PRIMITIVE_CHANGE (0x01)
828#define MPI_EVENT_PRIMITIVE_EXPANDER (0x03)
829#define MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04)
830#define MPI_EVENT_PRIMITIVE_RESERVED3 (0x05)
831#define MPI_EVENT_PRIMITIVE_RESERVED4 (0x06)
832#define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07)
833#define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08)
834
773/* SAS Phy Link Status Event data */
774
775typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
776{
777 U8 PhyNum; /* 00h */
778 U8 LinkRates; /* 01h */
779 U16 DevHandle; /* 02h */
780 U64 SASAddress; /* 04h */

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824#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
825#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
826#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
827#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
828#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
829#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
830#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
831#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
835/* SAS Phy Link Status Event data */
836
837typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
838{
839 U8 PhyNum; /* 00h */
840 U8 LinkRates; /* 01h */
841 U16 DevHandle; /* 02h */
842 U64 SASAddress; /* 04h */

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886#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
887#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
888#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
889#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
890#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
891#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
892#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
893#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
832#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS (0x00000800)
894#define MPI_EVENT_DSCVRY_ERR_DS_UNSUPPORTED_DEVICE (0x00000800)
833#define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
895#define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
896#define MPI_EVENT_DSCVRY_ERR_DS_MULTI_PORT_DOMAIN (0x00002000)
834
897
898/* SAS SMP Error Event data */
835
899
900typedef struct _EVENT_DATA_SAS_SMP_ERROR
901{
902 U8 Status; /* 00h */
903 U8 Port; /* 01h */
904 U8 SMPFunctionResult; /* 02h */
905 U8 Reserved1; /* 03h */
906 U64 SASAddress; /* 04h */
907} EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR,
908 MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t;
909
910/* defines for the Status field of the SAS SMP Error event */
911#define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID (0x00)
912#define MPI_EVENT_SAS_SMP_CRC_ERROR (0x01)
913#define MPI_EVENT_SAS_SMP_TIMEOUT (0x02)
914#define MPI_EVENT_SAS_SMP_NO_DESTINATION (0x03)
915#define MPI_EVENT_SAS_SMP_BAD_DESTINATION (0x04)
916
917/* SAS Initiator Device Status Change Event data */
918
919typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
920{
921 U8 ReasonCode; /* 00h */
922 U8 Port; /* 01h */
923 U16 DevHandle; /* 02h */
924 U64 SASAddress; /* 04h */
925} EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
926 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
927 MpiEventDataSasInitDevStatusChange_t,
928 MPI_POINTER pMpiEventDataSasInitDevStatusChange_t;
929
930/* defines for the ReasonCode field of the SAS Initiator Device Status Change event */
931#define MPI_EVENT_SAS_INIT_RC_ADDED (0x01)
932
933/* SAS Initiator Device Table Overflow Event data */
934
935typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
936{
937 U8 MaxInit; /* 00h */
938 U8 CurrentInit; /* 01h */
939 U16 Reserved1; /* 02h */
940} EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
941 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
942 MpiEventDataSasInitTableOverflow_t,
943 MPI_POINTER pMpiEventDataSasInitTableOverflow_t;
944
945/* SAS Expander Status Change Event data */
946
947typedef struct _EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE
948{
949 U8 ReasonCode; /* 00h */
950 U8 Reserved1; /* 01h */
951 U16 Reserved2; /* 02h */
952 U8 PhysicalPort; /* 04h */
953 U8 Reserved3; /* 05h */
954 U16 EnclosureHandle; /* 06h */
955 U64 SASAddress; /* 08h */
956 U32 DiscoveryStatus; /* 10h */
957 U16 DevHandle; /* 14h */
958 U16 ParentDevHandle; /* 16h */
959 U16 ExpanderChangeCount; /* 18h */
960 U16 ExpanderRouteIndexes; /* 1Ah */
961 U8 NumPhys; /* 1Ch */
962 U8 SASLevel; /* 1Dh */
963 U8 Flags; /* 1Eh */
964 U8 Reserved4; /* 1Fh */
965} EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
966 MPI_POINTER PTR_EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
967 MpiEventDataSasExpanderStatusChange_t,
968 MPI_POINTER pMpiEventDataSasExpanderStatusChange_t;
969
970/* values for ReasonCode field of SAS Expander Status Change Event data */
971#define MPI_EVENT_SAS_EXP_RC_ADDED (0x00)
972#define MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING (0x01)
973
974/* values for DiscoveryStatus field of SAS Expander Status Change Event data */
975#define MPI_EVENT_SAS_EXP_DS_LOOP_DETECTED (0x00000001)
976#define MPI_EVENT_SAS_EXP_DS_UNADDRESSABLE_DEVICE (0x00000002)
977#define MPI_EVENT_SAS_EXP_DS_MULTIPLE_PORTS (0x00000004)
978#define MPI_EVENT_SAS_EXP_DS_EXPANDER_ERR (0x00000008)
979#define MPI_EVENT_SAS_EXP_DS_SMP_TIMEOUT (0x00000010)
980#define MPI_EVENT_SAS_EXP_DS_OUT_ROUTE_ENTRIES (0x00000020)
981#define MPI_EVENT_SAS_EXP_DS_INDEX_NOT_EXIST (0x00000040)
982#define MPI_EVENT_SAS_EXP_DS_SMP_FUNCTION_FAILED (0x00000080)
983#define MPI_EVENT_SAS_EXP_DS_SMP_CRC_ERROR (0x00000100)
984#define MPI_EVENT_SAS_EXP_DS_SUBTRACTIVE_LINK (0x00000200)
985#define MPI_EVENT_SAS_EXP_DS_TABLE_LINK (0x00000400)
986#define MPI_EVENT_SAS_EXP_DS_UNSUPPORTED_DEVICE (0x00000800)
987
988/* values for Flags field of SAS Expander Status Change Event data */
989#define MPI_EVENT_SAS_EXP_FLAGS_ROUTE_TABLE_CONFIG (0x02)
990#define MPI_EVENT_SAS_EXP_FLAGS_CONFIG_IN_PROGRESS (0x01)
991
992
993
836/*****************************************************************************
837*
838* F i r m w a r e L o a d M e s s a g e s
839*
840*****************************************************************************/
841
842/****************************************************************************/
843/* Firmware Download message and associated structures */

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853 U8 MsgFlags; /* 07h */
854 U32 MsgContext; /* 08h */
855 SGE_MPI_UNION SGL; /* 0Ch */
856} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
857 FWDownload_t, MPI_POINTER pFWDownload_t;
858
859#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
860
994/*****************************************************************************
995*
996* F i r m w a r e L o a d M e s s a g e s
997*
998*****************************************************************************/
999
1000/****************************************************************************/
1001/* Firmware Download message and associated structures */

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1011 U8 MsgFlags; /* 07h */
1012 U32 MsgContext; /* 08h */
1013 SGE_MPI_UNION SGL; /* 0Ch */
1014} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
1015 FWDownload_t, MPI_POINTER pFWDownload_t;
1016
1017#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
1018
861#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
862#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
863#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
864#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
1019#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
1020#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
1021#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
1022#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
865#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
1023#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
1024#define MPI_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
1025#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
1026#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
1027#define MPI_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
1028#define MPI_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
866
867
868typedef struct _FWDownloadTCSGE
869{
870 U8 Reserved; /* 00h */
871 U8 ContextSize; /* 01h */
872 U8 DetailsLength; /* 02h */
873 U8 Flags; /* 03h */

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906 U8 Function; /* 03h */
907 U8 Reserved1[3]; /* 04h */
908 U8 MsgFlags; /* 07h */
909 U32 MsgContext; /* 08h */
910 SGE_MPI_UNION SGL; /* 0Ch */
911} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
912 FWUpload_t, MPI_POINTER pFWUpload_t;
913
1029
1030
1031typedef struct _FWDownloadTCSGE
1032{
1033 U8 Reserved; /* 00h */
1034 U8 ContextSize; /* 01h */
1035 U8 DetailsLength; /* 02h */
1036 U8 Flags; /* 03h */

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1069 U8 Function; /* 03h */
1070 U8 Reserved1[3]; /* 04h */
1071 U8 MsgFlags; /* 07h */
1072 U32 MsgContext; /* 08h */
1073 SGE_MPI_UNION SGL; /* 0Ch */
1074} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
1075 FWUpload_t, MPI_POINTER pFWUpload_t;
1076
914#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
915#define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
916#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
917#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
918#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
919#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
1077#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
1078#define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
1079#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
1080#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
1081#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
1082#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
1083#define MPI_FW_UPLOAD_ITYPE_MANUFACTURING (0x06)
1084#define MPI_FW_UPLOAD_ITYPE_CONFIG_1 (0x07)
1085#define MPI_FW_UPLOAD_ITYPE_CONFIG_2 (0x08)
1086#define MPI_FW_UPLOAD_ITYPE_MEGARAID (0x09)
1087#define MPI_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
1088#define MPI_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
920
921typedef struct _FWUploadTCSGE
922{
923 U8 Reserved; /* 00h */
924 U8 ContextSize; /* 01h */
925 U8 DetailsLength; /* 02h */
926 U8 Flags; /* 03h */
927 U32 Reserved1; /* 04h */

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1036} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
1037 MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
1038
1039/* defines for the ImageType field */
1040#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
1041#define MPI_EXT_IMAGE_TYPE_FW (0x01)
1042#define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
1043#define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
1089
1090typedef struct _FWUploadTCSGE
1091{
1092 U8 Reserved; /* 00h */
1093 U8 ContextSize; /* 01h */
1094 U8 DetailsLength; /* 02h */
1095 U8 Flags; /* 03h */
1096 U32 Reserved1; /* 04h */

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1205} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
1206 MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
1207
1208/* defines for the ImageType field */
1209#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
1210#define MPI_EXT_IMAGE_TYPE_FW (0x01)
1211#define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
1212#define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
1213#define MPI_EXT_IMAGE_TYPE_INITIALIZATION (0x05)
1044
1045#endif
1214
1215#endif