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mpi_cnfg.h (170251) mpi_cnfg.h (233425)
1/* $FreeBSD: head/sys/dev/mpt/mpilib/mpi_cnfg.h 170251 2007-06-03 22:58:27Z scottl $ */
1/* $FreeBSD: head/sys/dev/mpt/mpilib/mpi_cnfg.h 233425 2012-03-24 16:23:21Z marius $ */
2/*-
2/*-
3 * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors.
3 * Copyright (c) 2000-2010, LSI Logic Corporation and its contributors.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer

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28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
30 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * Name: mpi_cnfg.h
33 * Title: MPI Config message, structures, and Pages
34 * Creation Date: July 27, 2000
35 *
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer

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28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
30 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * Name: mpi_cnfg.h
33 * Title: MPI Config message, structures, and Pages
34 * Creation Date: July 27, 2000
35 *
36 * mpi_cnfg.h Version: 01.05.15
36 * mpi_cnfg.h Version: 01.05.19
37 *
38 * Version History
39 * ---------------
40 *
41 * Date Version Description
42 * -------- -------- ------------------------------------------------------
43 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
44 * 06-06-00 01.00.01 Update version number for 1.0 release.

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330 * Added Multi-Port Domain Illegal flag for SAS IO Unit
331 * Page 1 AdditionalControlFlags field.
332 * 05-24-07 01.05.15 Added Hide Physical Disks with Non-Integrated RAID
333 * Metadata bit to Manufacturing Page 4 ExtFlags field.
334 * Added Internal Connector to End Device Present bit to
335 * Expander Page 0 Flags field.
336 * Fixed define for
337 * MPI_SAS_EXPANDER1_DISCINFO_BAD_PHY_DISABLED.
37 *
38 * Version History
39 * ---------------
40 *
41 * Date Version Description
42 * -------- -------- ------------------------------------------------------
43 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
44 * 06-06-00 01.00.01 Update version number for 1.0 release.

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330 * Added Multi-Port Domain Illegal flag for SAS IO Unit
331 * Page 1 AdditionalControlFlags field.
332 * 05-24-07 01.05.15 Added Hide Physical Disks with Non-Integrated RAID
333 * Metadata bit to Manufacturing Page 4 ExtFlags field.
334 * Added Internal Connector to End Device Present bit to
335 * Expander Page 0 Flags field.
336 * Fixed define for
337 * MPI_SAS_EXPANDER1_DISCINFO_BAD_PHY_DISABLED.
338 * 08-07-07 01.05.16 Added MPI_IOCPAGE6_CAP_FLAGS_MULTIPORT_DRIVE_SUPPORT
339 * define.
340 * Added BIOS Page 4 structure.
341 * Added MPI_RAID_PHYS_DISK1_PATH_MAX define for RAID
342 * Physcial Disk Page 1.
343 * 01-15-07 01.05.17 Added additional bit defines for ExtFlags field of
344 * Manufacturing Page 4.
345 * Added Solid State Drives Supported bit to IOC Page 6
346 * Capabilities Flags.
347 * Added new value for AccessStatus field of SAS Device
348 * Page 0 (_SATA_NEEDS_INITIALIZATION).
349 * 03-28-08 01.05.18 Defined new bits in Manufacturing Page 4 ExtFlags field
350 * to control coercion size and the mixing of SAS and SATA
351 * SSD drives.
352 * 07-11-08 01.05.19 Added defines MPI_MANPAGE4_EXTFLAGS_RAID0_SINGLE_DRIVE
353 * and MPI_MANPAGE4_EXTFLAGS_SSD_SCRUB_DISABLE for ExtFlags
354 * field of Manufacturing Page 4.
355 * Added defines for a new bit in BIOS Page 1 BiosOptions
356 * field to control adapter scan order.
357 * Added BootDeviceWaitTime field to SAS IO Unit Page 2.
358 * Added MPI_SAS_PHY0_PHYINFO_PHY_VACANT for use in PhyInfo
359 * field of SAS Expander Page 1.
338 * --------------------------------------------------------------------------
339 */
340
341#ifndef MPI_CNFG_H
342#define MPI_CNFG_H
343
344
345/*****************************************************************************

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708#define MPI_MANPAGE4_IME_DISABLE (0x20)
709#define MPI_MANPAGE4_IM_DISABLE (0x10)
710#define MPI_MANPAGE4_IS_DISABLE (0x08)
711#define MPI_MANPAGE4_IR_MODEPAGE8_DISABLE (0x04)
712#define MPI_MANPAGE4_IM_RESYNC_CACHE_ENABLE (0x02)
713#define MPI_MANPAGE4_IR_NO_MIX_SAS_SATA (0x01)
714
715/* defines for the ExtFlags field */
360 * --------------------------------------------------------------------------
361 */
362
363#ifndef MPI_CNFG_H
364#define MPI_CNFG_H
365
366
367/*****************************************************************************

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730#define MPI_MANPAGE4_IME_DISABLE (0x20)
731#define MPI_MANPAGE4_IM_DISABLE (0x10)
732#define MPI_MANPAGE4_IS_DISABLE (0x08)
733#define MPI_MANPAGE4_IR_MODEPAGE8_DISABLE (0x04)
734#define MPI_MANPAGE4_IM_RESYNC_CACHE_ENABLE (0x02)
735#define MPI_MANPAGE4_IR_NO_MIX_SAS_SATA (0x01)
736
737/* defines for the ExtFlags field */
738#define MPI_MANPAGE4_EXTFLAGS_RAID0_SINGLE_DRIVE (0x0400)
739#define MPI_MANPAGE4_EXTFLAGS_SSD_SCRUB_DISABLE (0x0200)
740#define MPI_MANPAGE4_EXTFLAGS_MASK_COERCION_SIZE (0x0180)
741#define MPI_MANPAGE4_EXTFLAGS_SHIFT_COERCION_SIZE (7)
742#define MPI_MANPAGE4_EXTFLAGS_1GB_COERCION_SIZE (0)
743#define MPI_MANPAGE4_EXTFLAGS_128MB_COERCION_SIZE (1)
744
745#define MPI_MANPAGE4_EXTFLAGS_NO_MIX_SSD_SAS_SATA (0x0040)
746#define MPI_MANPAGE4_EXTFLAGS_MIX_SSD_AND_NON_SSD (0x0020)
747#define MPI_MANPAGE4_EXTFLAGS_DUAL_PORT_SUPPORT (0x0010)
716#define MPI_MANPAGE4_EXTFLAGS_HIDE_NON_IR_METADATA (0x0008)
717#define MPI_MANPAGE4_EXTFLAGS_SAS_CACHE_DISABLE (0x0004)
718#define MPI_MANPAGE4_EXTFLAGS_SATA_CACHE_DISABLE (0x0002)
719#define MPI_MANPAGE4_EXTFLAGS_LEGACY_MODE (0x0001)
720
721
722#ifndef MPI_MANPAGE5_NUM_FORCEWWID
723#define MPI_MANPAGE5_NUM_FORCEWWID (1)

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1181 U32 Reserved12; /* 38h */
1182} CONFIG_PAGE_IOC_6, MPI_POINTER PTR_CONFIG_PAGE_IOC_6,
1183 IOCPage6_t, MPI_POINTER pIOCPage6_t;
1184
1185#define MPI_IOCPAGE6_PAGEVERSION (0x01)
1186
1187/* IOC Page 6 Capabilities Flags */
1188
748#define MPI_MANPAGE4_EXTFLAGS_HIDE_NON_IR_METADATA (0x0008)
749#define MPI_MANPAGE4_EXTFLAGS_SAS_CACHE_DISABLE (0x0004)
750#define MPI_MANPAGE4_EXTFLAGS_SATA_CACHE_DISABLE (0x0002)
751#define MPI_MANPAGE4_EXTFLAGS_LEGACY_MODE (0x0001)
752
753
754#ifndef MPI_MANPAGE5_NUM_FORCEWWID
755#define MPI_MANPAGE5_NUM_FORCEWWID (1)

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1213 U32 Reserved12; /* 38h */
1214} CONFIG_PAGE_IOC_6, MPI_POINTER PTR_CONFIG_PAGE_IOC_6,
1215 IOCPage6_t, MPI_POINTER pIOCPage6_t;
1216
1217#define MPI_IOCPAGE6_PAGEVERSION (0x01)
1218
1219/* IOC Page 6 Capabilities Flags */
1220
1221#define MPI_IOCPAGE6_CAP_FLAGS_SSD_SUPPORT (0x00000020)
1222#define MPI_IOCPAGE6_CAP_FLAGS_MULTIPORT_DRIVE_SUPPORT (0x00000010)
1189#define MPI_IOCPAGE6_CAP_FLAGS_DISABLE_SMART_POLLING (0x00000008)
1190
1191#define MPI_IOCPAGE6_CAP_FLAGS_MASK_METADATA_SIZE (0x00000006)
1192#define MPI_IOCPAGE6_CAP_FLAGS_64MB_METADATA_SIZE (0x00000000)
1193#define MPI_IOCPAGE6_CAP_FLAGS_512MB_METADATA_SIZE (0x00000002)
1194
1195#define MPI_IOCPAGE6_CAP_FLAGS_GLOBAL_HOT_SPARE (0x00000001)
1196

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1217 BIOSPage1_t, MPI_POINTER pBIOSPage1_t;
1218
1219#define MPI_BIOSPAGE1_PAGEVERSION (0x03)
1220
1221/* values for the BiosOptions field */
1222#define MPI_BIOSPAGE1_OPTIONS_SPI_ENABLE (0x00000400)
1223#define MPI_BIOSPAGE1_OPTIONS_FC_ENABLE (0x00000200)
1224#define MPI_BIOSPAGE1_OPTIONS_SAS_ENABLE (0x00000100)
1223#define MPI_IOCPAGE6_CAP_FLAGS_DISABLE_SMART_POLLING (0x00000008)
1224
1225#define MPI_IOCPAGE6_CAP_FLAGS_MASK_METADATA_SIZE (0x00000006)
1226#define MPI_IOCPAGE6_CAP_FLAGS_64MB_METADATA_SIZE (0x00000000)
1227#define MPI_IOCPAGE6_CAP_FLAGS_512MB_METADATA_SIZE (0x00000002)
1228
1229#define MPI_IOCPAGE6_CAP_FLAGS_GLOBAL_HOT_SPARE (0x00000001)
1230

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1251 BIOSPage1_t, MPI_POINTER pBIOSPage1_t;
1252
1253#define MPI_BIOSPAGE1_PAGEVERSION (0x03)
1254
1255/* values for the BiosOptions field */
1256#define MPI_BIOSPAGE1_OPTIONS_SPI_ENABLE (0x00000400)
1257#define MPI_BIOSPAGE1_OPTIONS_FC_ENABLE (0x00000200)
1258#define MPI_BIOSPAGE1_OPTIONS_SAS_ENABLE (0x00000100)
1259
1260#define MPI_BIOSPAGE1_OPTIONS_SCAN_HIGH_TO_LOW (0x00000002)
1261#define MPI_BIOSPAGE1_OPTIONS_SCAN_LOW_TO_HIGH (0x00000000)
1262
1225#define MPI_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001)
1226
1227/* values for the IOCSettings field */
1228#define MPI_BIOSPAGE1_IOCSET_MASK_INITIAL_SPINUP_DELAY (0x0F000000)
1229#define MPI_BIOSPAGE1_IOCSET_SHIFT_INITIAL_SPINUP_DELAY (24)
1230
1231#define MPI_BIOSPAGE1_IOCSET_MASK_PORT_ENABLE_DELAY (0x00F00000)
1232#define MPI_BIOSPAGE1_IOCSET_SHIFT_PORT_ENABLE_DELAY (20)

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1450#define MPI_BIOSPAGE2_FORM_ADAPTER_ORDER (0x00)
1451#define MPI_BIOSPAGE2_FORM_ADAPTER_NUMBER (0x01)
1452#define MPI_BIOSPAGE2_FORM_PCI_ADDRESS (0x02)
1453#define MPI_BIOSPAGE2_FORM_PCI_SLOT_NUMBER (0x03)
1454#define MPI_BIOSPAGE2_FORM_FC_WWN (0x04)
1455#define MPI_BIOSPAGE2_FORM_SAS_WWN (0x05)
1456#define MPI_BIOSPAGE2_FORM_ENCLOSURE_SLOT (0x06)
1457
1263#define MPI_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001)
1264
1265/* values for the IOCSettings field */
1266#define MPI_BIOSPAGE1_IOCSET_MASK_INITIAL_SPINUP_DELAY (0x0F000000)
1267#define MPI_BIOSPAGE1_IOCSET_SHIFT_INITIAL_SPINUP_DELAY (24)
1268
1269#define MPI_BIOSPAGE1_IOCSET_MASK_PORT_ENABLE_DELAY (0x00F00000)
1270#define MPI_BIOSPAGE1_IOCSET_SHIFT_PORT_ENABLE_DELAY (20)

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1488#define MPI_BIOSPAGE2_FORM_ADAPTER_ORDER (0x00)
1489#define MPI_BIOSPAGE2_FORM_ADAPTER_NUMBER (0x01)
1490#define MPI_BIOSPAGE2_FORM_PCI_ADDRESS (0x02)
1491#define MPI_BIOSPAGE2_FORM_PCI_SLOT_NUMBER (0x03)
1492#define MPI_BIOSPAGE2_FORM_FC_WWN (0x04)
1493#define MPI_BIOSPAGE2_FORM_SAS_WWN (0x05)
1494#define MPI_BIOSPAGE2_FORM_ENCLOSURE_SLOT (0x06)
1495
1496typedef struct _CONFIG_PAGE_BIOS_4
1497{
1498 CONFIG_PAGE_HEADER Header; /* 00h */
1499 U64 ReassignmentBaseWWID; /* 04h */
1500} CONFIG_PAGE_BIOS_4, MPI_POINTER PTR_CONFIG_PAGE_BIOS_4,
1501 BIOSPage4_t, MPI_POINTER pBIOSPage4_t;
1458
1502
1503#define MPI_BIOSPAGE4_PAGEVERSION (0x00)
1504
1505
1459/****************************************************************************
1460* SCSI Port Config Pages
1461****************************************************************************/
1462
1463typedef struct _CONFIG_PAGE_SCSI_PORT_0
1464{
1465 CONFIG_PAGE_HEADER Header; /* 00h */
1466 U32 Capabilities; /* 04h */

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2441 U16 Flags; /* 16h */
2442} RAID_PHYS_DISK1_PATH, MPI_POINTER PTR_RAID_PHYS_DISK1_PATH,
2443 RaidPhysDisk1Path_t, MPI_POINTER pRaidPhysDisk1Path_t;
2444
2445/* RAID Physical Disk Page 1 Flags field defines */
2446#define MPI_RAID_PHYSDISK1_FLAG_BROKEN (0x0002)
2447#define MPI_RAID_PHYSDISK1_FLAG_INVALID (0x0001)
2448
1506/****************************************************************************
1507* SCSI Port Config Pages
1508****************************************************************************/
1509
1510typedef struct _CONFIG_PAGE_SCSI_PORT_0
1511{
1512 CONFIG_PAGE_HEADER Header; /* 00h */
1513 U32 Capabilities; /* 04h */

--- 974 unchanged lines hidden (view full) ---

2488 U16 Flags; /* 16h */
2489} RAID_PHYS_DISK1_PATH, MPI_POINTER PTR_RAID_PHYS_DISK1_PATH,
2490 RaidPhysDisk1Path_t, MPI_POINTER pRaidPhysDisk1Path_t;
2491
2492/* RAID Physical Disk Page 1 Flags field defines */
2493#define MPI_RAID_PHYSDISK1_FLAG_BROKEN (0x0002)
2494#define MPI_RAID_PHYSDISK1_FLAG_INVALID (0x0001)
2495
2496
2497/*
2498 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
2499 * one and check Header.PageLength or NumPhysDiskPaths at runtime.
2500 */
2501#ifndef MPI_RAID_PHYS_DISK1_PATH_MAX
2502#define MPI_RAID_PHYS_DISK1_PATH_MAX (1)
2503#endif
2504
2449typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_1
2450{
2451 CONFIG_PAGE_HEADER Header; /* 00h */
2452 U8 NumPhysDiskPaths; /* 04h */
2453 U8 PhysDiskNum; /* 05h */
2454 U16 Reserved2; /* 06h */
2455 U32 Reserved1; /* 08h */
2505typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_1
2506{
2507 CONFIG_PAGE_HEADER Header; /* 00h */
2508 U8 NumPhysDiskPaths; /* 04h */
2509 U8 PhysDiskNum; /* 05h */
2510 U16 Reserved2; /* 06h */
2511 U32 Reserved1; /* 08h */
2456 RAID_PHYS_DISK1_PATH Path[1]; /* 0Ch */
2512 RAID_PHYS_DISK1_PATH Path[MPI_RAID_PHYS_DISK1_PATH_MAX];/* 0Ch */
2457} CONFIG_PAGE_RAID_PHYS_DISK_1, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_1,
2458 RaidPhysDiskPage1_t, MPI_POINTER pRaidPhysDiskPage1_t;
2459
2460#define MPI_RAIDPHYSDISKPAGE1_PAGEVERSION (0x00)
2461
2462
2463/****************************************************************************
2464* LAN Config Pages

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2573
2574/* values for SAS IO Unit Page 0 NegotiatedLinkRate */
2575#define MPI_SAS_IOUNIT0_RATE_UNKNOWN (0x00)
2576#define MPI_SAS_IOUNIT0_RATE_PHY_DISABLED (0x01)
2577#define MPI_SAS_IOUNIT0_RATE_FAILED_SPEED_NEGOTIATION (0x02)
2578#define MPI_SAS_IOUNIT0_RATE_SATA_OOB_COMPLETE (0x03)
2579#define MPI_SAS_IOUNIT0_RATE_1_5 (0x08)
2580#define MPI_SAS_IOUNIT0_RATE_3_0 (0x09)
2513} CONFIG_PAGE_RAID_PHYS_DISK_1, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_1,
2514 RaidPhysDiskPage1_t, MPI_POINTER pRaidPhysDiskPage1_t;
2515
2516#define MPI_RAIDPHYSDISKPAGE1_PAGEVERSION (0x00)
2517
2518
2519/****************************************************************************
2520* LAN Config Pages

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2629
2630/* values for SAS IO Unit Page 0 NegotiatedLinkRate */
2631#define MPI_SAS_IOUNIT0_RATE_UNKNOWN (0x00)
2632#define MPI_SAS_IOUNIT0_RATE_PHY_DISABLED (0x01)
2633#define MPI_SAS_IOUNIT0_RATE_FAILED_SPEED_NEGOTIATION (0x02)
2634#define MPI_SAS_IOUNIT0_RATE_SATA_OOB_COMPLETE (0x03)
2635#define MPI_SAS_IOUNIT0_RATE_1_5 (0x08)
2636#define MPI_SAS_IOUNIT0_RATE_3_0 (0x09)
2637#define MPI_SAS_IOUNIT0_RATE_6_0 (0x0A)
2581
2582/* see mpi_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */
2583
2584/* values for SAS IO Unit Page 0 DiscoveryStatus */
2585#define MPI_SAS_IOUNIT0_DS_LOOP_DETECTED (0x00000001)
2586#define MPI_SAS_IOUNIT0_DS_UNADDRESSABLE_DEVICE (0x00000002)
2587#define MPI_SAS_IOUNIT0_DS_MULTIPLE_PORTS (0x00000004)
2588#define MPI_SAS_IOUNIT0_DS_EXPANDER_ERR (0x00000008)

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2692
2693/* see mpi_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */
2694
2695
2696typedef struct _CONFIG_PAGE_SAS_IO_UNIT_2
2697{
2698 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2699 U8 NumDevsPerEnclosure; /* 08h */
2638
2639/* see mpi_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */
2640
2641/* values for SAS IO Unit Page 0 DiscoveryStatus */
2642#define MPI_SAS_IOUNIT0_DS_LOOP_DETECTED (0x00000001)
2643#define MPI_SAS_IOUNIT0_DS_UNADDRESSABLE_DEVICE (0x00000002)
2644#define MPI_SAS_IOUNIT0_DS_MULTIPLE_PORTS (0x00000004)
2645#define MPI_SAS_IOUNIT0_DS_EXPANDER_ERR (0x00000008)

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2749
2750/* see mpi_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */
2751
2752
2753typedef struct _CONFIG_PAGE_SAS_IO_UNIT_2
2754{
2755 CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
2756 U8 NumDevsPerEnclosure; /* 08h */
2700 U8 Reserved1; /* 09h */
2757 U8 BootDeviceWaitTime; /* 09h */
2701 U16 Reserved2; /* 0Ah */
2702 U16 MaxPersistentIDs; /* 0Ch */
2703 U16 NumPersistentIDsUsed; /* 0Eh */
2704 U8 Status; /* 10h */
2705 U8 Flags; /* 11h */
2706 U16 MaxNumPhysicalMappedIDs;/* 12h */
2707} CONFIG_PAGE_SAS_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_2,
2708 SasIOUnitPage2_t, MPI_POINTER pSasIOUnitPage2_t;
2709
2758 U16 Reserved2; /* 0Ah */
2759 U16 MaxPersistentIDs; /* 0Ch */
2760 U16 NumPersistentIDsUsed; /* 0Eh */
2761 U8 Status; /* 10h */
2762 U8 Flags; /* 11h */
2763 U16 MaxNumPhysicalMappedIDs;/* 12h */
2764} CONFIG_PAGE_SAS_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_2,
2765 SasIOUnitPage2_t, MPI_POINTER pSasIOUnitPage2_t;
2766
2710#define MPI_SASIOUNITPAGE2_PAGEVERSION (0x06)
2767#define MPI_SASIOUNITPAGE2_PAGEVERSION (0x07)
2711
2712/* values for SAS IO Unit Page 2 Status field */
2713#define MPI_SAS_IOUNIT2_STATUS_DEVICE_LIMIT_EXCEEDED (0x08)
2714#define MPI_SAS_IOUNIT2_STATUS_ENCLOSURE_DEVICES_UNMAPPED (0x04)
2715#define MPI_SAS_IOUNIT2_STATUS_DISABLED_PERSISTENT_MAPPINGS (0x02)
2716#define MPI_SAS_IOUNIT2_STATUS_FULL_PERSISTENT_MAPPINGS (0x01)
2717
2718/* values for SAS IO Unit Page 2 Flags field */

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2866
2867#define MPI_SASDEVICE0_PAGEVERSION (0x05)
2868
2869/* values for SAS Device Page 0 AccessStatus field */
2870#define MPI_SAS_DEVICE0_ASTATUS_NO_ERRORS (0x00)
2871#define MPI_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED (0x01)
2872#define MPI_SAS_DEVICE0_ASTATUS_SATA_CAPABILITY_FAILED (0x02)
2873#define MPI_SAS_DEVICE0_ASTATUS_SATA_AFFILIATION_CONFLICT (0x03)
2768
2769/* values for SAS IO Unit Page 2 Status field */
2770#define MPI_SAS_IOUNIT2_STATUS_DEVICE_LIMIT_EXCEEDED (0x08)
2771#define MPI_SAS_IOUNIT2_STATUS_ENCLOSURE_DEVICES_UNMAPPED (0x04)
2772#define MPI_SAS_IOUNIT2_STATUS_DISABLED_PERSISTENT_MAPPINGS (0x02)
2773#define MPI_SAS_IOUNIT2_STATUS_FULL_PERSISTENT_MAPPINGS (0x01)
2774
2775/* values for SAS IO Unit Page 2 Flags field */

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2923
2924#define MPI_SASDEVICE0_PAGEVERSION (0x05)
2925
2926/* values for SAS Device Page 0 AccessStatus field */
2927#define MPI_SAS_DEVICE0_ASTATUS_NO_ERRORS (0x00)
2928#define MPI_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED (0x01)
2929#define MPI_SAS_DEVICE0_ASTATUS_SATA_CAPABILITY_FAILED (0x02)
2930#define MPI_SAS_DEVICE0_ASTATUS_SATA_AFFILIATION_CONFLICT (0x03)
2931#define MPI_SAS_DEVICE0_ASTATUS_SATA_NEEDS_INITIALIZATION (0x04)
2874/* specific values for SATA Init failures */
2875#define MPI_SAS_DEVICE0_ASTATUS_SIF_UNKNOWN (0x10)
2876#define MPI_SAS_DEVICE0_ASTATUS_SIF_AFFILIATION_CONFLICT (0x11)
2877#define MPI_SAS_DEVICE0_ASTATUS_SIF_DIAG (0x12)
2878#define MPI_SAS_DEVICE0_ASTATUS_SIF_IDENTIFICATION (0x13)
2879#define MPI_SAS_DEVICE0_ASTATUS_SIF_CHECK_POWER (0x14)
2880#define MPI_SAS_DEVICE0_ASTATUS_SIF_PIO_SN (0x15)
2881#define MPI_SAS_DEVICE0_ASTATUS_SIF_MDMA_SN (0x16)

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2976#define MPI_SAS_PHY0_HWRATE_MIN_RATE_MASK (0x0F)
2977#define MPI_SAS_PHY0_HWRATE_MIN_RATE_1_5 (0x08)
2978#define MPI_SAS_PHY0_HWRATE_MIN_RATE_3_0 (0x09)
2979
2980/* values for SAS PHY Page 0 Flags field */
2981#define MPI_SAS_PHY0_FLAGS_SGPIO_DIRECT_ATTACH_ENC (0x01)
2982
2983/* values for SAS PHY Page 0 PhyInfo field */
2932/* specific values for SATA Init failures */
2933#define MPI_SAS_DEVICE0_ASTATUS_SIF_UNKNOWN (0x10)
2934#define MPI_SAS_DEVICE0_ASTATUS_SIF_AFFILIATION_CONFLICT (0x11)
2935#define MPI_SAS_DEVICE0_ASTATUS_SIF_DIAG (0x12)
2936#define MPI_SAS_DEVICE0_ASTATUS_SIF_IDENTIFICATION (0x13)
2937#define MPI_SAS_DEVICE0_ASTATUS_SIF_CHECK_POWER (0x14)
2938#define MPI_SAS_DEVICE0_ASTATUS_SIF_PIO_SN (0x15)
2939#define MPI_SAS_DEVICE0_ASTATUS_SIF_MDMA_SN (0x16)

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3034#define MPI_SAS_PHY0_HWRATE_MIN_RATE_MASK (0x0F)
3035#define MPI_SAS_PHY0_HWRATE_MIN_RATE_1_5 (0x08)
3036#define MPI_SAS_PHY0_HWRATE_MIN_RATE_3_0 (0x09)
3037
3038/* values for SAS PHY Page 0 Flags field */
3039#define MPI_SAS_PHY0_FLAGS_SGPIO_DIRECT_ATTACH_ENC (0x01)
3040
3041/* values for SAS PHY Page 0 PhyInfo field */
3042#define MPI_SAS_PHY0_PHYINFO_PHY_VACANT (0x80000000)
2984#define MPI_SAS_PHY0_PHYINFO_SATA_PORT_ACTIVE (0x00004000)
2985#define MPI_SAS_PHY0_PHYINFO_SATA_PORT_SELECTOR (0x00002000)
2986#define MPI_SAS_PHY0_PHYINFO_VIRTUAL_PHY (0x00001000)
2987
2988#define MPI_SAS_PHY0_PHYINFO_MASK_PARTIAL_PATHWAY_TIME (0x00000F00)
2989#define MPI_SAS_PHY0_PHYINFO_SHIFT_PARTIAL_PATHWAY_TIME (8)
2990
2991#define MPI_SAS_PHY0_PHYINFO_MASK_ROUTING_ATTRIBUTE (0x000000F0)

--- 107 unchanged lines hidden --- 		3043#define MPI_SAS_PHY0_PHYINFO_SATA_PORT_ACTIVE (0x00004000)
3044#define MPI_SAS_PHY0_PHYINFO_SATA_PORT_SELECTOR (0x00002000)
3045#define MPI_SAS_PHY0_PHYINFO_VIRTUAL_PHY (0x00001000)
3046
3047#define MPI_SAS_PHY0_PHYINFO_MASK_PARTIAL_PATHWAY_TIME (0x00000F00)
3048#define MPI_SAS_PHY0_PHYINFO_SHIFT_PARTIAL_PATHWAY_TIME (8)
3049
3050#define MPI_SAS_PHY0_PHYINFO_MASK_ROUTING_ATTRIBUTE (0x000000F0)

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