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mpi_cnfg.h (139749) mpi_cnfg.h (147883)
1/* $FreeBSD: head/sys/dev/mpt/mpilib/mpi_cnfg.h 139749 2005-01-06 01:43:34Z imp $ */
1/* $FreeBSD: head/sys/dev/mpt/mpilib/mpi_cnfg.h 147883 2005-07-10 15:05:39Z scottl $ */
2/*-
2/*-
3 * Copyright (c) 2000, 2001 by LSI Logic Corporation
4 *
3 * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors.
4 * All rights reserved.
5 *
5 * Redistribution and use in source and binary forms, with or without
6 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
7 * modification, are permitted provided that the following conditions are
8 * met:
8 * 1. Redistributions of source code must retain the above copyright
9 * 1. Redistributions of source code must retain the above copyright
9 * notice immediately at the beginning of the file, without modification,
10 * this list of conditions, and the following disclaimer.
11 * 2. The name of the author may not be used to endorse or promote products
12 * derived from this software without specific prior written permission.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * substantially similar to the "NO WARRANTY" disclaimer below
13 * ("Disclaimer") and any redistribution must be conditioned upon including
14 * a substantially similar Disclaimer requirement for further binary
15 * redistribution.
16 * 3. Neither the name of the LSI Logic Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
30 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 *
27 * Name: MPI_CNFG.H
28 * Title: MPI Config message, structures, and Pages
29 * Creation Date: July 27, 2000
30 *
31 *
32 *
33 * Name: MPI_CNFG.H
34 * Title: MPI Config message, structures, and Pages
35 * Creation Date: July 27, 2000
36 *
31 * MPI_CNFG.H Version: 01.02.11
37 * MPI_CNFG.H Version: 01.02.13
32 *
33 * Version History
34 * ---------------
35 *
36 * Date Version Description
37 * -------- -------- ------------------------------------------------------
38 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
39 * 06-06-00 01.00.01 Update version number for 1.0 release.

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153 * 11-15-02 01.02.10 Added ConnectedID defines for CONFIG_PAGE_SCSI_PORT_0.
154 * Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
155 * Added more Flags defines for CONFIG_PAGE_FC_DEVICE_0.
156 * 04-01-03 01.02.11 Added RR_TOV field and additional Flags defines for
157 * CONFIG_PAGE_FC_PORT_1.
158 * Added define MPI_FCPORTPAGE5_FLAGS_DISABLE to disable
159 * an alias.
160 * Added more device id defines.
38 *
39 * Version History
40 * ---------------
41 *
42 * Date Version Description
43 * -------- -------- ------------------------------------------------------
44 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
45 * 06-06-00 01.00.01 Update version number for 1.0 release.

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159 * 11-15-02 01.02.10 Added ConnectedID defines for CONFIG_PAGE_SCSI_PORT_0.
160 * Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
161 * Added more Flags defines for CONFIG_PAGE_FC_DEVICE_0.
162 * 04-01-03 01.02.11 Added RR_TOV field and additional Flags defines for
163 * CONFIG_PAGE_FC_PORT_1.
164 * Added define MPI_FCPORTPAGE5_FLAGS_DISABLE to disable
165 * an alias.
166 * Added more device id defines.
167 * 06-26-03 01.02.12 Added MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID define.
168 * Added TargetConfig and IDConfig fields to
169 * CONFIG_PAGE_SCSI_PORT_1.
170 * Added more PortFlags defines for CONFIG_PAGE_SCSI_PORT_2
171 * to control DV.
172 * Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
173 * In CONFIG_PAGE_FC_DEVICE_0, replaced Reserved1 field
174 * with ADISCHardALPA.
175 * Added MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY define.
176 * 01-16-04 01.02.13 Added InitiatorDeviceTimeout and InitiatorIoPendTimeout
177 * fields and related defines to CONFIG_PAGE_FC_PORT_1.
178 * Added define for
179 * MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK.
180 * Added new fields to the substructures of
181 * CONFIG_PAGE_FC_PORT_10.
161 * --------------------------------------------------------------------------
162 */
163
164#ifndef MPI_CNFG_H
165#define MPI_CNFG_H
166
167
168/*****************************************************************************

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454#define MPI_IOUNITPAGE1_PAGEVERSION (0x00)
455
456/* IO Unit Page 1 Flags defines */
457
458#define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000)
459#define MPI_IOUNITPAGE1_SINGLE_FUNCTION (0x00000001)
460#define MPI_IOUNITPAGE1_MULTI_PATHING (0x00000002)
461#define MPI_IOUNITPAGE1_SINGLE_PATHING (0x00000000)
182 * --------------------------------------------------------------------------
183 */
184
185#ifndef MPI_CNFG_H
186#define MPI_CNFG_H
187
188
189/*****************************************************************************

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475#define MPI_IOUNITPAGE1_PAGEVERSION (0x00)
476
477/* IO Unit Page 1 Flags defines */
478
479#define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000)
480#define MPI_IOUNITPAGE1_SINGLE_FUNCTION (0x00000001)
481#define MPI_IOUNITPAGE1_MULTI_PATHING (0x00000002)
482#define MPI_IOUNITPAGE1_SINGLE_PATHING (0x00000000)
483#define MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID (0x00000004)
462#define MPI_IOUNITPAGE1_DISABLE_IR (0x00000040)
463#define MPI_IOUNITPAGE1_FORCE_32 (0x00000080)
464
465
466typedef struct _MPI_ADAPTER_INFO
467{
468 U8 PciBusNumber; /* 00h */
469 U8 PciDeviceAndFunctionNumber; /* 01h */

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737#define MPI_SCSIPORTPAGE0_PHY_UNKNOWN_CONNECTED_ID (0xFF)
738
739
740typedef struct _CONFIG_PAGE_SCSI_PORT_1
741{
742 CONFIG_PAGE_HEADER Header; /* 00h */
743 U32 Configuration; /* 04h */
744 U32 OnBusTimerValue; /* 08h */
484#define MPI_IOUNITPAGE1_DISABLE_IR (0x00000040)
485#define MPI_IOUNITPAGE1_FORCE_32 (0x00000080)
486
487
488typedef struct _MPI_ADAPTER_INFO
489{
490 U8 PciBusNumber; /* 00h */
491 U8 PciDeviceAndFunctionNumber; /* 01h */

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759#define MPI_SCSIPORTPAGE0_PHY_UNKNOWN_CONNECTED_ID (0xFF)
760
761
762typedef struct _CONFIG_PAGE_SCSI_PORT_1
763{
764 CONFIG_PAGE_HEADER Header; /* 00h */
765 U32 Configuration; /* 04h */
766 U32 OnBusTimerValue; /* 08h */
767 U8 TargetConfig; /* 0Ch */
768 U8 Reserved1; /* 0Dh */
769 U16 IDConfig; /* 0Eh */
745} CONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1,
746 SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t;
747
770} CONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1,
771 SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t;
772
748#define MPI_SCSIPORTPAGE1_PAGEVERSION (0x02)
773#define MPI_SCSIPORTPAGE1_PAGEVERSION (0x03)
749
774
775/* Configuration values */
750#define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK (0x000000FF)
751#define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK (0xFFFF0000)
752
776#define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK (0x000000FF)
777#define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK (0xFFFF0000)
778
779/* TargetConfig values */
780#define MPI_SCSIPORTPAGE1_TARGCONFIG_TARG_ONLY (0x01)
781#define MPI_SCSIPORTPAGE1_TARGCONFIG_INIT_TARG (0x02)
753
782
783
754typedef struct _MPI_DEVICE_INFO
755{
756 U8 Timeout; /* 00h */
757 U8 SyncFactor; /* 01h */
758 U16 DeviceFlags; /* 02h */
759} MPI_DEVICE_INFO, MPI_POINTER PTR_MPI_DEVICE_INFO,
760 MpiDeviceInfo_t, MPI_POINTER pMpiDeviceInfo_t;
761
762typedef struct _CONFIG_PAGE_SCSI_PORT_2
763{
764 CONFIG_PAGE_HEADER Header; /* 00h */
765 U32 PortFlags; /* 04h */
766 U32 PortSettings; /* 08h */
767 MPI_DEVICE_INFO DeviceSettings[16]; /* 0Ch */
768} CONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2,
769 SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t;
770
784typedef struct _MPI_DEVICE_INFO
785{
786 U8 Timeout; /* 00h */
787 U8 SyncFactor; /* 01h */
788 U16 DeviceFlags; /* 02h */
789} MPI_DEVICE_INFO, MPI_POINTER PTR_MPI_DEVICE_INFO,
790 MpiDeviceInfo_t, MPI_POINTER pMpiDeviceInfo_t;
791
792typedef struct _CONFIG_PAGE_SCSI_PORT_2
793{
794 CONFIG_PAGE_HEADER Header; /* 00h */
795 U32 PortFlags; /* 04h */
796 U32 PortSettings; /* 08h */
797 MPI_DEVICE_INFO DeviceSettings[16]; /* 0Ch */
798} CONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2,
799 SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t;
800
771#define MPI_SCSIPORTPAGE2_PAGEVERSION (0x01)
801#define MPI_SCSIPORTPAGE2_PAGEVERSION (0x02)
772
802
803/* PortFlags values */
773#define MPI_SCSIPORTPAGE2_PORT_FLAGS_SCAN_HIGH_TO_LOW (0x00000001)
774#define MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET (0x00000004)
775#define MPI_SCSIPORTPAGE2_PORT_FLAGS_ALTERNATE_CHS (0x00000008)
776#define MPI_SCSIPORTPAGE2_PORT_FLAGS_TERMINATION_DISABLE (0x00000010)
777
804#define MPI_SCSIPORTPAGE2_PORT_FLAGS_SCAN_HIGH_TO_LOW (0x00000001)
805#define MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET (0x00000004)
806#define MPI_SCSIPORTPAGE2_PORT_FLAGS_ALTERNATE_CHS (0x00000008)
807#define MPI_SCSIPORTPAGE2_PORT_FLAGS_TERMINATION_DISABLE (0x00000010)
808
809#define MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK (0x00000060)
810#define MPI_SCSIPORTPAGE2_PORT_FLAGS_FULL_DV (0x00000000)
811#define MPI_SCSIPORTPAGE2_PORT_FLAGS_BASIC_DV_ONLY (0x00000020)
812#define MPI_SCSIPORTPAGE2_PORT_FLAGS_OFF_DV (0x00000060)
813
814/* PortSettings values */
778#define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK (0x0000000F)
779#define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA (0x00000030)
780#define MPI_SCSIPORTPAGE2_PORT_DISABLE_INIT_HBA (0x00000000)
781#define MPI_SCSIPORTPAGE2_PORT_BIOS_INIT_HBA (0x00000010)
782#define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA (0x00000020)
783#define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA (0x00000030)
784#define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA (0x000000C0)
785#define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK (0x00000F00)

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1011 U64 NoSEEPROMWWNN; /* 08h */
1012 U64 NoSEEPROMWWPN; /* 10h */
1013 U8 HardALPA; /* 18h */
1014 U8 LinkConfig; /* 19h */
1015 U8 TopologyConfig; /* 1Ah */
1016 U8 AltConnector; /* 1Bh */
1017 U8 NumRequestedAliases; /* 1Ch */
1018 U8 RR_TOV; /* 1Dh */
815#define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK (0x0000000F)
816#define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA (0x00000030)
817#define MPI_SCSIPORTPAGE2_PORT_DISABLE_INIT_HBA (0x00000000)
818#define MPI_SCSIPORTPAGE2_PORT_BIOS_INIT_HBA (0x00000010)
819#define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA (0x00000020)
820#define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA (0x00000030)
821#define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA (0x000000C0)
822#define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK (0x00000F00)

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1048 U64 NoSEEPROMWWNN; /* 08h */
1049 U64 NoSEEPROMWWPN; /* 10h */
1050 U8 HardALPA; /* 18h */
1051 U8 LinkConfig; /* 19h */
1052 U8 TopologyConfig; /* 1Ah */
1053 U8 AltConnector; /* 1Bh */
1054 U8 NumRequestedAliases; /* 1Ch */
1055 U8 RR_TOV; /* 1Dh */
1019 U16 Reserved2; /* 1Eh */
1056 U8 InitiatorDeviceTimeout; /* 1Eh */
1057 U8 InitiatorIoPendTimeout; /* 1Fh */
1020} CONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1,
1021 FCPortPage1_t, MPI_POINTER pFCPortPage1_t;
1022
1058} CONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1,
1059 FCPortPage1_t, MPI_POINTER pFCPortPage1_t;
1060
1023#define MPI_FCPORTPAGE1_PAGEVERSION (0x05)
1061#define MPI_FCPORTPAGE1_PAGEVERSION (0x06)
1024
1025#define MPI_FCPORTPAGE1_FLAGS_EXT_FCP_STATUS_EN (0x08000000)
1026#define MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY (0x04000000)
1027#define MPI_FCPORTPAGE1_FLAGS_FORCE_USE_NOSEEPROM_WWNS (0x02000000)
1028#define MPI_FCPORTPAGE1_FLAGS_VERBOSE_RESCAN_EVENTS (0x01000000)
1029#define MPI_FCPORTPAGE1_FLAGS_TARGET_MODE_OXID (0x00800000)
1062
1063#define MPI_FCPORTPAGE1_FLAGS_EXT_FCP_STATUS_EN (0x08000000)
1064#define MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY (0x04000000)
1065#define MPI_FCPORTPAGE1_FLAGS_FORCE_USE_NOSEEPROM_WWNS (0x02000000)
1066#define MPI_FCPORTPAGE1_FLAGS_VERBOSE_RESCAN_EVENTS (0x01000000)
1067#define MPI_FCPORTPAGE1_FLAGS_TARGET_MODE_OXID (0x00800000)
1068#define MPI_FCPORTPAGE1_FLAGS_PORT_OFFLINE (0x00400000)
1069#define MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK (0x00200000)
1030#define MPI_FCPORTPAGE1_FLAGS_MASK_RR_TOV_UNITS (0x00000070)
1070#define MPI_FCPORTPAGE1_FLAGS_MASK_RR_TOV_UNITS (0x00000070)
1071#define MPI_FCPORTPAGE1_FLAGS_SUPPRESS_PROT_REG (0x00000008)
1072#define MPI_FCPORTPAGE1_FLAGS_PLOGI_ON_LOGO (0x00000004)
1031#define MPI_FCPORTPAGE1_FLAGS_MAINTAIN_LOGINS (0x00000002)
1032#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_DID (0x00000001)
1033#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_WWN (0x00000000)
1034
1035#define MPI_FCPORTPAGE1_FLAGS_PROT_MASK (0xF0000000)
1036#define MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT (28)
1037#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_INIT ((U32)MPI_PORTFACTS_PROTOCOL_INITIATOR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
1038#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_TARG ((U32)MPI_PORTFACTS_PROTOCOL_TARGET << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)

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1055
1056#define MPI_FCPORTPAGE1_TOPOLOGY_MASK (0x0F)
1057#define MPI_FCPORTPAGE1_TOPOLOGY_NLPORT (0x01)
1058#define MPI_FCPORTPAGE1_TOPOLOGY_NPORT (0x02)
1059#define MPI_FCPORTPAGE1_TOPOLOGY_AUTO (0x0F)
1060
1061#define MPI_FCPORTPAGE1_ALT_CONN_UNKNOWN (0x00)
1062
1073#define MPI_FCPORTPAGE1_FLAGS_MAINTAIN_LOGINS (0x00000002)
1074#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_DID (0x00000001)
1075#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_WWN (0x00000000)
1076
1077#define MPI_FCPORTPAGE1_FLAGS_PROT_MASK (0xF0000000)
1078#define MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT (28)
1079#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_INIT ((U32)MPI_PORTFACTS_PROTOCOL_INITIATOR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
1080#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_TARG ((U32)MPI_PORTFACTS_PROTOCOL_TARGET << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)

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1097
1098#define MPI_FCPORTPAGE1_TOPOLOGY_MASK (0x0F)
1099#define MPI_FCPORTPAGE1_TOPOLOGY_NLPORT (0x01)
1100#define MPI_FCPORTPAGE1_TOPOLOGY_NPORT (0x02)
1101#define MPI_FCPORTPAGE1_TOPOLOGY_AUTO (0x0F)
1102
1103#define MPI_FCPORTPAGE1_ALT_CONN_UNKNOWN (0x00)
1104
1105#define MPI_FCPORTPAGE1_INITIATOR_DEV_TIMEOUT_MASK (0x7F)
1106#define MPI_FCPORTPAGE1_INITIATOR_DEV_UNIT_16 (0x80)
1063
1107
1108
1064typedef struct _CONFIG_PAGE_FC_PORT_2
1065{
1066 CONFIG_PAGE_HEADER Header; /* 00h */
1067 U8 NumberActive; /* 04h */
1068 U8 ALPA[127]; /* 05h */
1069} CONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2,
1070 FCPortPage2_t, MPI_POINTER pFCPortPage2_t;
1071

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1249 U8 Length62p5u_10m; /* 21h */
1250 U8 LengthCopper_m; /* 22h */
1251 U8 Reseverved2; /* 22h */
1252 U8 VendorName[16]; /* 24h */
1253 U8 Reserved3; /* 34h */
1254 U8 VendorOUI[3]; /* 35h */
1255 U8 VendorPN[16]; /* 38h */
1256 U8 VendorRev[4]; /* 48h */
1109typedef struct _CONFIG_PAGE_FC_PORT_2
1110{
1111 CONFIG_PAGE_HEADER Header; /* 00h */
1112 U8 NumberActive; /* 04h */
1113 U8 ALPA[127]; /* 05h */
1114} CONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2,
1115 FCPortPage2_t, MPI_POINTER pFCPortPage2_t;
1116

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1294 U8 Length62p5u_10m; /* 21h */
1295 U8 LengthCopper_m; /* 22h */
1296 U8 Reseverved2; /* 22h */
1297 U8 VendorName[16]; /* 24h */
1298 U8 Reserved3; /* 34h */
1299 U8 VendorOUI[3]; /* 35h */
1300 U8 VendorPN[16]; /* 38h */
1301 U8 VendorRev[4]; /* 48h */
1257 U16 Reserved4; /* 4Ch */
1258 U8 Reserved5; /* 4Eh */
1302 U16 Wavelength; /* 4Ch */
1303 U8 Reserved4; /* 4Eh */
1259 U8 CC_BASE; /* 4Fh */
1260} CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
1261 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
1262 FCPortPage10BaseSfpData_t, MPI_POINTER pFCPortPage10BaseSfpData_t;
1263
1264#define MPI_FCPORT10_BASE_ID_UNKNOWN (0x00)
1265#define MPI_FCPORT10_BASE_ID_GBIC (0x01)
1266#define MPI_FCPORT10_BASE_ID_FIXED (0x02)

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1308
1309typedef struct _CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA
1310{
1311 U8 Options[2]; /* 50h */
1312 U8 BitRateMax; /* 52h */
1313 U8 BitRateMin; /* 53h */
1314 U8 VendorSN[16]; /* 54h */
1315 U8 DateCode[8]; /* 64h */
1304 U8 CC_BASE; /* 4Fh */
1305} CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
1306 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
1307 FCPortPage10BaseSfpData_t, MPI_POINTER pFCPortPage10BaseSfpData_t;
1308
1309#define MPI_FCPORT10_BASE_ID_UNKNOWN (0x00)
1310#define MPI_FCPORT10_BASE_ID_GBIC (0x01)
1311#define MPI_FCPORT10_BASE_ID_FIXED (0x02)

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1353
1354typedef struct _CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA
1355{
1356 U8 Options[2]; /* 50h */
1357 U8 BitRateMax; /* 52h */
1358 U8 BitRateMin; /* 53h */
1359 U8 VendorSN[16]; /* 54h */
1360 U8 DateCode[8]; /* 64h */
1316 U8 Reserved5[3]; /* 6Ch */
1361 U8 DiagMonitoringType; /* 6Ch */
1362 U8 EnhancedOptions; /* 6Dh */
1363 U8 SFF8472Compliance; /* 6Eh */
1317 U8 CC_EXT; /* 6Fh */
1318} CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
1319 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
1320 FCPortPage10ExtendedSfpData_t, MPI_POINTER pFCPortPage10ExtendedSfpData_t;
1321
1322#define MPI_FCPORT10_EXT_OPTION1_RATESEL (0x20)
1323#define MPI_FCPORT10_EXT_OPTION1_TX_DISABLE (0x10)
1324#define MPI_FCPORT10_EXT_OPTION1_TX_FAULT (0x08)

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1335 U32 HwConfig1; /* 08h */
1336 U32 HwConfig2; /* 0Ch */
1337 CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA Base; /* 10h */
1338 CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA Extended; /* 50h */
1339 U8 VendorSpecific[32]; /* 70h */
1340} CONFIG_PAGE_FC_PORT_10, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10,
1341 FCPortPage10_t, MPI_POINTER pFCPortPage10_t;
1342
1364 U8 CC_EXT; /* 6Fh */
1365} CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
1366 MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
1367 FCPortPage10ExtendedSfpData_t, MPI_POINTER pFCPortPage10ExtendedSfpData_t;
1368
1369#define MPI_FCPORT10_EXT_OPTION1_RATESEL (0x20)
1370#define MPI_FCPORT10_EXT_OPTION1_TX_DISABLE (0x10)
1371#define MPI_FCPORT10_EXT_OPTION1_TX_FAULT (0x08)

--- 10 unchanged lines hidden (view full) ---

1382 U32 HwConfig1; /* 08h */
1383 U32 HwConfig2; /* 0Ch */
1384 CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA Base; /* 10h */
1385 CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA Extended; /* 50h */
1386 U8 VendorSpecific[32]; /* 70h */
1387} CONFIG_PAGE_FC_PORT_10, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10,
1388 FCPortPage10_t, MPI_POINTER pFCPortPage10_t;
1389
1343#define MPI_FCPORTPAGE10_PAGEVERSION (0x00)
1390#define MPI_FCPORTPAGE10_PAGEVERSION (0x01)
1344
1345/* standard MODDEF pin definitions (from GBIC spec.) */
1346#define MPI_FCPORTPAGE10_FLAGS_MODDEF_MASK (0x00000007)
1347#define MPI_FCPORTPAGE10_FLAGS_MODDEF2 (0x00000001)
1348#define MPI_FCPORTPAGE10_FLAGS_MODDEF1 (0x00000002)
1349#define MPI_FCPORTPAGE10_FLAGS_MODDEF0 (0x00000004)
1350#define MPI_FCPORTPAGE10_FLAGS_MODDEF_NOGBIC (0x00000007)
1351#define MPI_FCPORTPAGE10_FLAGS_MODDEF_CPR_IEEE_CX (0x00000006)

--- 17 unchanged lines hidden (view full) ---

1369 CONFIG_PAGE_HEADER Header; /* 00h */
1370 U64 WWNN; /* 04h */
1371 U64 WWPN; /* 0Ch */
1372 U32 PortIdentifier; /* 14h */
1373 U8 Protocol; /* 18h */
1374 U8 Flags; /* 19h */
1375 U16 BBCredit; /* 1Ah */
1376 U16 MaxRxFrameSize; /* 1Ch */
1391
1392/* standard MODDEF pin definitions (from GBIC spec.) */
1393#define MPI_FCPORTPAGE10_FLAGS_MODDEF_MASK (0x00000007)
1394#define MPI_FCPORTPAGE10_FLAGS_MODDEF2 (0x00000001)
1395#define MPI_FCPORTPAGE10_FLAGS_MODDEF1 (0x00000002)
1396#define MPI_FCPORTPAGE10_FLAGS_MODDEF0 (0x00000004)
1397#define MPI_FCPORTPAGE10_FLAGS_MODDEF_NOGBIC (0x00000007)
1398#define MPI_FCPORTPAGE10_FLAGS_MODDEF_CPR_IEEE_CX (0x00000006)

--- 17 unchanged lines hidden (view full) ---

1416 CONFIG_PAGE_HEADER Header; /* 00h */
1417 U64 WWNN; /* 04h */
1418 U64 WWPN; /* 0Ch */
1419 U32 PortIdentifier; /* 14h */
1420 U8 Protocol; /* 18h */
1421 U8 Flags; /* 19h */
1422 U16 BBCredit; /* 1Ah */
1423 U16 MaxRxFrameSize; /* 1Ch */
1377 U8 Reserved1; /* 1Eh */
1424 U8 ADISCHardALPA; /* 1Eh */
1378 U8 PortNumber; /* 1Fh */
1379 U8 FcPhLowestVersion; /* 20h */
1380 U8 FcPhHighestVersion; /* 21h */
1381 U8 CurrentTargetID; /* 22h */
1382 U8 CurrentBus; /* 23h */
1383} CONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0,
1384 FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t;
1385
1425 U8 PortNumber; /* 1Fh */
1426 U8 FcPhLowestVersion; /* 20h */
1427 U8 FcPhHighestVersion; /* 21h */
1428 U8 CurrentTargetID; /* 22h */
1429 U8 CurrentBus; /* 23h */
1430} CONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0,
1431 FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t;
1432
1386#define MPI_FC_DEVICE_PAGE0_PAGEVERSION (0x02)
1433#define MPI_FC_DEVICE_PAGE0_PAGEVERSION (0x03)
1387
1388#define MPI_FC_DEVICE_PAGE0_FLAGS_TARGETID_BUS_VALID (0x01)
1389#define MPI_FC_DEVICE_PAGE0_FLAGS_PLOGI_INVALID (0x02)
1390#define MPI_FC_DEVICE_PAGE0_FLAGS_PRLI_INVALID (0x04)
1391
1392#define MPI_FC_DEVICE_PAGE0_PROT_IP (0x01)
1393#define MPI_FC_DEVICE_PAGE0_PROT_FCP_TARGET (0x02)
1394#define MPI_FC_DEVICE_PAGE0_PROT_FCP_INITIATOR (0x04)
1434
1435#define MPI_FC_DEVICE_PAGE0_FLAGS_TARGETID_BUS_VALID (0x01)
1436#define MPI_FC_DEVICE_PAGE0_FLAGS_PLOGI_INVALID (0x02)
1437#define MPI_FC_DEVICE_PAGE0_FLAGS_PRLI_INVALID (0x04)
1438
1439#define MPI_FC_DEVICE_PAGE0_PROT_IP (0x01)
1440#define MPI_FC_DEVICE_PAGE0_PROT_FCP_TARGET (0x02)
1441#define MPI_FC_DEVICE_PAGE0_PROT_FCP_INITIATOR (0x04)
1442#define MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY (0x08)
1395
1396#define MPI_FC_DEVICE_PAGE0_PGAD_PORT_MASK (MPI_FC_DEVICE_PGAD_PORT_MASK)
1397#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_MASK (MPI_FC_DEVICE_PGAD_FORM_MASK)
1398#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_NEXT_DID (MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
1399#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_BUS_TID (MPI_FC_DEVICE_PGAD_FORM_BUS_TID)
1400#define MPI_FC_DEVICE_PAGE0_PGAD_DID_MASK (MPI_FC_DEVICE_PGAD_ND_DID_MASK)
1401#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_MASK (MPI_FC_DEVICE_PGAD_BT_BUS_MASK)
1402#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_SHIFT (MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT)
1403#define MPI_FC_DEVICE_PAGE0_PGAD_TID_MASK (MPI_FC_DEVICE_PGAD_BT_TID_MASK)
1404
1443
1444#define MPI_FC_DEVICE_PAGE0_PGAD_PORT_MASK (MPI_FC_DEVICE_PGAD_PORT_MASK)
1445#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_MASK (MPI_FC_DEVICE_PGAD_FORM_MASK)
1446#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_NEXT_DID (MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
1447#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_BUS_TID (MPI_FC_DEVICE_PGAD_FORM_BUS_TID)
1448#define MPI_FC_DEVICE_PAGE0_PGAD_DID_MASK (MPI_FC_DEVICE_PGAD_ND_DID_MASK)
1449#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_MASK (MPI_FC_DEVICE_PGAD_BT_BUS_MASK)
1450#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_SHIFT (MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT)
1451#define MPI_FC_DEVICE_PAGE0_PGAD_TID_MASK (MPI_FC_DEVICE_PGAD_BT_TID_MASK)
1452
1453#define MPI_FC_DEVICE_PAGE0_HARD_ALPA_UNKNOWN (0xFF)
1405
1406/****************************************************************************
1407* RAID Volume Config Pages
1408****************************************************************************/
1409
1410typedef struct _RAID_VOL0_PHYS_DISK
1411{
1412 U16 Reserved; /* 00h */

--- 69 unchanged lines hidden (view full) ---

1482 RAID_VOL0_STATUS VolumeStatus; /* 08h */
1483 RAID_VOL0_SETTINGS VolumeSettings; /* 0Ch */
1484 U32 MaxLBA; /* 10h */
1485 U32 Reserved1; /* 14h */
1486 U32 StripeSize; /* 18h */
1487 U32 Reserved2; /* 1Ch */
1488 U32 Reserved3; /* 20h */
1489 U8 NumPhysDisks; /* 24h */
1454
1455/****************************************************************************
1456* RAID Volume Config Pages
1457****************************************************************************/
1458
1459typedef struct _RAID_VOL0_PHYS_DISK
1460{
1461 U16 Reserved; /* 00h */

--- 69 unchanged lines hidden (view full) ---

1531 RAID_VOL0_STATUS VolumeStatus; /* 08h */
1532 RAID_VOL0_SETTINGS VolumeSettings; /* 0Ch */
1533 U32 MaxLBA; /* 10h */
1534 U32 Reserved1; /* 14h */
1535 U32 StripeSize; /* 18h */
1536 U32 Reserved2; /* 1Ch */
1537 U32 Reserved3; /* 20h */
1538 U8 NumPhysDisks; /* 24h */
1490 U8 Reserved4; /* 25h */
1491 U16 Reserved5; /* 26h */
1539 U8 DataScrubRate; /* 25h */
1540 U8 ResyncRate; /* 26h */
1541 U8 InactiveStatus; /* 27h */
1492 RAID_VOL0_PHYS_DISK PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];/* 28h */
1493} CONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0,
1494 RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t;
1495
1496#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x01)
1497
1498
1499/****************************************************************************

--- 124 unchanged lines hidden --- 		1542 RAID_VOL0_PHYS_DISK PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];/* 28h */
1543} CONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0,
1544 RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t;
1545
1546#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x01)
1547
1548
1549/****************************************************************************

--- 124 unchanged lines hidden ---