31
32/* Communications core for LSI MPT2 */
33
34/* TODO Move headers to mprvar */
35#include <sys/types.h>
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/kernel.h>
39#include <sys/selinfo.h>
40#include <sys/lock.h>
41#include <sys/mutex.h>
42#include <sys/module.h>
43#include <sys/bus.h>
44#include <sys/conf.h>
45#include <sys/bio.h>
46#include <sys/malloc.h>
47#include <sys/uio.h>
48#include <sys/sysctl.h>
49#include <sys/queue.h>
50#include <sys/kthread.h>
51#include <sys/taskqueue.h>
52#include <sys/endian.h>
53#include <sys/eventhandler.h>
54
55#include <machine/bus.h>
56#include <machine/resource.h>
57#include <sys/rman.h>
58#include <sys/proc.h>
59
60#include <dev/pci/pcivar.h>
61
62#include <cam/cam.h>
63#include <cam/scsi/scsi_all.h>
64
65#include <dev/mpr/mpi/mpi2_type.h>
66#include <dev/mpr/mpi/mpi2.h>
67#include <dev/mpr/mpi/mpi2_ioc.h>
68#include <dev/mpr/mpi/mpi2_sas.h>
69#include <dev/mpr/mpi/mpi2_cnfg.h>
70#include <dev/mpr/mpi/mpi2_init.h>
71#include <dev/mpr/mpi/mpi2_tool.h>
72#include <dev/mpr/mpr_ioctl.h>
73#include <dev/mpr/mprvar.h>
74#include <dev/mpr/mpr_table.h>
75#include <dev/mpr/mpr_sas.h>
76
77static int mpr_diag_reset(struct mpr_softc *sc, int sleep_flag);
78static int mpr_init_queues(struct mpr_softc *sc);
79static int mpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag);
80static int mpr_transition_operational(struct mpr_softc *sc);
81static int mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching);
82static void mpr_iocfacts_free(struct mpr_softc *sc);
83static void mpr_startup(void *arg);
84static int mpr_send_iocinit(struct mpr_softc *sc);
85static int mpr_alloc_queues(struct mpr_softc *sc);
86static int mpr_alloc_replies(struct mpr_softc *sc);
87static int mpr_alloc_requests(struct mpr_softc *sc);
88static int mpr_attach_log(struct mpr_softc *sc);
89static __inline void mpr_complete_command(struct mpr_softc *sc,
90 struct mpr_command *cm);
91static void mpr_dispatch_event(struct mpr_softc *sc, uintptr_t data,
92 MPI2_EVENT_NOTIFICATION_REPLY *reply);
93static void mpr_config_complete(struct mpr_softc *sc,
94 struct mpr_command *cm);
95static void mpr_periodic(void *);
96static int mpr_reregister_events(struct mpr_softc *sc);
97static void mpr_enqueue_request(struct mpr_softc *sc,
98 struct mpr_command *cm);
99static int mpr_get_iocfacts(struct mpr_softc *sc,
100 MPI2_IOC_FACTS_REPLY *facts);
101static int mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag);
102SYSCTL_NODE(_hw, OID_AUTO, mpr, CTLFLAG_RD, 0, "MPR Driver Parameters");
103
104MALLOC_DEFINE(M_MPR, "mpr", "mpr driver memory");
105
106/*
107 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of
108 * any state and back to its initialization state machine.
109 */
110static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d };
111
112/*
113 * Added this union to smoothly convert le64toh cm->cm_desc.Words.
114 * Compiler only supports unint64_t to be passed as an argument.
115 * Otherwise it will through this error:
116 * "aggregate value used where an integer was expected"
117 */
118typedef union _reply_descriptor {
119 u64 word;
120 struct {
121 u32 low;
122 u32 high;
123 } u;
124}reply_descriptor,address_descriptor;
125
126/* Rate limit chain-fail messages to 1 per minute */
127static struct timeval mpr_chainfail_interval = { 60, 0 };
128
129/*
130 * sleep_flag can be either CAN_SLEEP or NO_SLEEP.
131 * If this function is called from process context, it can sleep
132 * and there is no harm to sleep, in case if this fuction is called
133 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set.
134 * based on sleep flags driver will call either msleep, pause or DELAY.
135 * msleep and pause are of same variant, but pause is used when mpr_mtx
136 * is not hold by driver.
137 */
138static int
139mpr_diag_reset(struct mpr_softc *sc,int sleep_flag)
140{
141 uint32_t reg;
142 int i, error, tries = 0;
143 uint8_t first_wait_done = FALSE;
144
145 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
146
147 /* Clear any pending interrupts */
148 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
149
150 /*
151 * Force NO_SLEEP for threads prohibited to sleep
152 * e.a Thread from interrupt handler are prohibited to sleep.
153 */
154#if __FreeBSD_version >= 1000029
155 if (curthread->td_no_sleeping)
156#else //__FreeBSD_version < 1000029
157 if (curthread->td_pflags & TDP_NOSLEEPING)
158#endif //__FreeBSD_version >= 1000029
159 sleep_flag = NO_SLEEP;
160
161 /* Push the magic sequence */
162 error = ETIMEDOUT;
163 while (tries++ < 20) {
164 for (i = 0; i < sizeof(mpt2_reset_magic); i++)
165 mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET,
166 mpt2_reset_magic[i]);
167
168 /* wait 100 msec */
169 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP)
170 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0,
171 "mprdiag", hz/10);
172 else if (sleep_flag == CAN_SLEEP)
173 pause("mprdiag", hz/10);
174 else
175 DELAY(100 * 1000);
176
177 reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
178 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) {
179 error = 0;
180 break;
181 }
182 }
183 if (error)
184 return (error);
185
186 /* Send the actual reset. XXX need to refresh the reg? */
187 mpr_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET,
188 reg | MPI2_DIAG_RESET_ADAPTER);
189
190 /* Wait up to 300 seconds in 50ms intervals */
191 error = ETIMEDOUT;
192 for (i = 0; i < 6000; i++) {
193 /*
194 * Wait 50 msec. If this is the first time through, wait 256
195 * msec to satisfy Diag Reset timing requirements.
196 */
197 if (first_wait_done) {
198 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP)
199 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0,
200 "mprdiag", hz/20);
201 else if (sleep_flag == CAN_SLEEP)
202 pause("mprdiag", hz/20);
203 else
204 DELAY(50 * 1000);
205 } else {
206 DELAY(256 * 1000);
207 first_wait_done = TRUE;
208 }
209 /*
210 * Check for the RESET_ADAPTER bit to be cleared first, then
211 * wait for the RESET state to be cleared, which takes a little
212 * longer.
213 */
214 reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
215 if (reg & MPI2_DIAG_RESET_ADAPTER) {
216 continue;
217 }
218 reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
219 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) {
220 error = 0;
221 break;
222 }
223 }
224 if (error)
225 return (error);
226
227 mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0);
228
229 return (0);
230}
231
232static int
233mpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag)
234{
235
236 MPR_FUNCTRACE(sc);
237
238 mpr_regwrite(sc, MPI2_DOORBELL_OFFSET,
239 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET <<
240 MPI2_DOORBELL_FUNCTION_SHIFT);
241
242 if (mpr_wait_db_ack(sc, 5, sleep_flag) != 0) {
243 mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed : <%s>\n",
244 __func__);
245 return (ETIMEDOUT);
246 }
247
248 return (0);
249}
250
251static int
252mpr_transition_ready(struct mpr_softc *sc)
253{
254 uint32_t reg, state;
255 int error, tries = 0;
256 int sleep_flags;
257
258 MPR_FUNCTRACE(sc);
259 /* If we are in attach call, do not sleep */
260 sleep_flags = (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE)
261 ? CAN_SLEEP : NO_SLEEP;
262
263 error = 0;
264 while (tries++ < 1200) {
265 reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
266 mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg);
267
268 /*
269 * Ensure the IOC is ready to talk. If it's not, try
270 * resetting it.
271 */
272 if (reg & MPI2_DOORBELL_USED) {
273 mpr_diag_reset(sc, sleep_flags);
274 DELAY(50000);
275 continue;
276 }
277
278 /* Is the adapter owned by another peer? */
279 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) ==
280 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) {
281 device_printf(sc->mpr_dev, "IOC is under the control "
282 "of another peer host, aborting initialization.\n");
283 return (ENXIO);
284 }
285
286 state = reg & MPI2_IOC_STATE_MASK;
287 if (state == MPI2_IOC_STATE_READY) {
288 /* Ready to go! */
289 error = 0;
290 break;
291 } else if (state == MPI2_IOC_STATE_FAULT) {
292 mpr_dprint(sc, MPR_FAULT, "IOC in fault state 0x%x\n",
293 state & MPI2_DOORBELL_FAULT_CODE_MASK);
294 mpr_diag_reset(sc, sleep_flags);
295 } else if (state == MPI2_IOC_STATE_OPERATIONAL) {
296 /* Need to take ownership */
297 mpr_message_unit_reset(sc, sleep_flags);
298 } else if (state == MPI2_IOC_STATE_RESET) {
299 /* Wait a bit, IOC might be in transition */
300 mpr_dprint(sc, MPR_FAULT,
301 "IOC in unexpected reset state\n");
302 } else {
303 mpr_dprint(sc, MPR_FAULT,
304 "IOC in unknown state 0x%x\n", state);
305 error = EINVAL;
306 break;
307 }
308
309 /* Wait 50ms for things to settle down. */
310 DELAY(50000);
311 }
312
313 if (error)
314 device_printf(sc->mpr_dev, "Cannot transition IOC to ready\n");
315
316 return (error);
317}
318
319static int
320mpr_transition_operational(struct mpr_softc *sc)
321{
322 uint32_t reg, state;
323 int error;
324
325 MPR_FUNCTRACE(sc);
326
327 error = 0;
328 reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
329 mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg);
330
331 state = reg & MPI2_IOC_STATE_MASK;
332 if (state != MPI2_IOC_STATE_READY) {
333 if ((error = mpr_transition_ready(sc)) != 0) {
334 mpr_dprint(sc, MPR_FAULT,
335 "%s failed to transition ready\n", __func__);
336 return (error);
337 }
338 }
339
340 error = mpr_send_iocinit(sc);
341 return (error);
342}
343
344/*
345 * This is called during attach and when re-initializing due to a Diag Reset.
346 * IOC Facts is used to allocate many of the structures needed by the driver.
347 * If called from attach, de-allocation is not required because the driver has
348 * not allocated any structures yet, but if called from a Diag Reset, previously
349 * allocated structures based on IOC Facts will need to be freed and re-
350 * allocated bases on the latest IOC Facts.
351 */
352static int
353mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching)
354{
355 int error, i;
356 Mpi2IOCFactsReply_t saved_facts;
357 uint8_t saved_mode, reallocating;
358 struct mprsas_lun *lun, *lun_tmp;
359 struct mprsas_target *targ;
360
361 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
362
363 /* Save old IOC Facts and then only reallocate if Facts have changed */
364 if (!attaching) {
365 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY));
366 }
367
368 /*
369 * Get IOC Facts. In all cases throughout this function, panic if doing
370 * a re-initialization and only return the error if attaching so the OS
371 * can handle it.
372 */
373 if ((error = mpr_get_iocfacts(sc, sc->facts)) != 0) {
374 if (attaching) {
375 mpr_dprint(sc, MPR_FAULT, "%s failed to get IOC Facts "
376 "with error %d\n", __func__, error);
377 return (error);
378 } else {
379 panic("%s failed to get IOC Facts with error %d\n",
380 __func__, error);
381 }
382 }
383
384 mpr_print_iocfacts(sc, sc->facts);
385
386 snprintf(sc->fw_version, sizeof(sc->fw_version),
387 "%02d.%02d.%02d.%02d",
388 sc->facts->FWVersion.Struct.Major,
389 sc->facts->FWVersion.Struct.Minor,
390 sc->facts->FWVersion.Struct.Unit,
391 sc->facts->FWVersion.Struct.Dev);
392
393 mpr_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version,
394 MPR_DRIVER_VERSION);
395 mpr_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities,
396 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf"
397 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR"
398 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc");
399
400 /*
401 * If the chip doesn't support event replay then a hard reset will be
402 * required to trigger a full discovery. Do the reset here then
403 * retransition to Ready. A hard reset might have already been done,
404 * but it doesn't hurt to do it again. Only do this if attaching, not
405 * for a Diag Reset.
406 */
407 if (attaching) {
408 if ((sc->facts->IOCCapabilities &
409 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) {
410 mpr_diag_reset(sc, NO_SLEEP);
411 if ((error = mpr_transition_ready(sc)) != 0) {
412 mpr_dprint(sc, MPR_FAULT, "%s failed to "
413 "transition to ready with error %d\n",
414 __func__, error);
415 return (error);
416 }
417 }
418 }
419
420 /*
421 * Set flag if IR Firmware is loaded. If the RAID Capability has
422 * changed from the previous IOC Facts, log a warning, but only if
423 * checking this after a Diag Reset and not during attach.
424 */
425 saved_mode = sc->ir_firmware;
426 if (sc->facts->IOCCapabilities &
427 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)
428 sc->ir_firmware = 1;
429 if (!attaching) {
430 if (sc->ir_firmware != saved_mode) {
431 mpr_dprint(sc, MPR_FAULT, "%s new IR/IT mode in IOC "
432 "Facts does not match previous mode\n", __func__);
433 }
434 }
435
436 /* Only deallocate and reallocate if relevant IOC Facts have changed */
437 reallocating = FALSE;
438 if ((!attaching) &&
439 ((saved_facts.MsgVersion != sc->facts->MsgVersion) ||
440 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) ||
441 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) ||
442 (saved_facts.RequestCredit != sc->facts->RequestCredit) ||
443 (saved_facts.ProductID != sc->facts->ProductID) ||
444 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) ||
445 (saved_facts.IOCRequestFrameSize !=
446 sc->facts->IOCRequestFrameSize) ||
447 (saved_facts.MaxTargets != sc->facts->MaxTargets) ||
448 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) ||
449 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) ||
450 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) ||
451 (saved_facts.MaxReplyDescriptorPostQueueDepth !=
452 sc->facts->MaxReplyDescriptorPostQueueDepth) ||
453 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) ||
454 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) ||
455 (saved_facts.MaxPersistentEntries !=
456 sc->facts->MaxPersistentEntries))) {
457 reallocating = TRUE;
458 }
459
460 /*
461 * Some things should be done if attaching or re-allocating after a Diag
462 * Reset, but are not needed after a Diag Reset if the FW has not
463 * changed.
464 */
465 if (attaching || reallocating) {
466 /*
467 * Check if controller supports FW diag buffers and set flag to
468 * enable each type.
469 */
470 if (sc->facts->IOCCapabilities &
471 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER)
472 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE].
473 enabled = TRUE;
474 if (sc->facts->IOCCapabilities &
475 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER)
476 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT].
477 enabled = TRUE;
478 if (sc->facts->IOCCapabilities &
479 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER)
480 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED].
481 enabled = TRUE;
482
483 /*
484 * Set flag if EEDP is supported and if TLR is supported.
485 */
486 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP)
487 sc->eedp_enabled = TRUE;
488 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR)
489 sc->control_TLR = TRUE;
490
491 /*
492 * Size the queues. Since the reply queues always need one free
493 * entry, we'll just deduct one reply message here.
494 */
495 sc->num_reqs = MIN(MPR_REQ_FRAMES, sc->facts->RequestCredit);
496 sc->num_replies = MIN(MPR_REPLY_FRAMES + MPR_EVT_REPLY_FRAMES,
497 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1;
498
499 /*
500 * Initialize all Tail Queues
501 */
502 TAILQ_INIT(&sc->req_list);
503 TAILQ_INIT(&sc->high_priority_req_list);
504 TAILQ_INIT(&sc->chain_list);
505 TAILQ_INIT(&sc->tm_list);
506 }
507
508 /*
509 * If doing a Diag Reset and the FW is significantly different
510 * (reallocating will be set above in IOC Facts comparison), then all
511 * buffers based on the IOC Facts will need to be freed before they are
512 * reallocated.
513 */
514 if (reallocating) {
515 mpr_iocfacts_free(sc);
516
517 /*
518 * The number of targets is based on IOC Facts, so free all of
519 * the allocated LUNs for each target and then the target buffer
520 * itself.
521 */
522 for (i=0; i< saved_facts.MaxTargets; i++) {
523 targ = &sc->sassc->targets[i];
524 SLIST_FOREACH_SAFE(lun, &targ->luns, lun_link,
525 lun_tmp) {
526 free(lun, M_MPR);
527 }
528 }
529 free(sc->sassc->targets, M_MPR);
530
531 sc->sassc->targets = malloc(sizeof(struct mprsas_target) *
532 sc->facts->MaxTargets, M_MPR, M_WAITOK|M_ZERO);
533 if (!sc->sassc->targets) {
534 panic("%s failed to alloc targets with error %d\n",
535 __func__, ENOMEM);
536 }
537 }
538
539 /*
540 * Any deallocation has been completed. Now start reallocating
541 * if needed. Will only need to reallocate if attaching or if the new
542 * IOC Facts are different from the previous IOC Facts after a Diag
543 * Reset. Targets have already been allocated above if needed.
544 */
545 if (attaching || reallocating) {
546 if (((error = mpr_alloc_queues(sc)) != 0) ||
547 ((error = mpr_alloc_replies(sc)) != 0) ||
548 ((error = mpr_alloc_requests(sc)) != 0)) {
549 if (attaching ) {
550 mpr_dprint(sc, MPR_FAULT, "%s failed to alloc "
551 "queues with error %d\n", __func__, error);
552 mpr_free(sc);
553 return (error);
554 } else {
555 panic("%s failed to alloc queues with error "
556 "%d\n", __func__, error);
557 }
558 }
559 }
560
561 /* Always initialize the queues */
562 bzero(sc->free_queue, sc->fqdepth * 4);
563 mpr_init_queues(sc);
564
565 /*
566 * Always get the chip out of the reset state, but only panic if not
567 * attaching. If attaching and there is an error, that is handled by
568 * the OS.
569 */
570 error = mpr_transition_operational(sc);
571 if (error != 0) {
572 if (attaching) {
573 mpr_printf(sc, "%s failed to transition to "
574 "operational with error %d\n", __func__, error);
575 mpr_free(sc);
576 return (error);
577 } else {
578 panic("%s failed to transition to operational with "
579 "error %d\n", __func__, error);
580 }
581 }
582
583 /*
584 * Finish the queue initialization.
585 * These are set here instead of in mpr_init_queues() because the
586 * IOC resets these values during the state transition in
587 * mpr_transition_operational(). The free index is set to 1
588 * because the corresponding index in the IOC is set to 0, and the
589 * IOC treats the queues as full if both are set to the same value.
590 * Hence the reason that the queue can't hold all of the possible
591 * replies.
592 */
593 sc->replypostindex = 0;
594 mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
595 mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0);
596
597 /*
598 * Attach the subsystems so they can prepare their event masks.
599 */
600 /* XXX Should be dynamic so that IM/IR and user modules can attach */
601 if (attaching) {
602 if (((error = mpr_attach_log(sc)) != 0) ||
603 ((error = mpr_attach_sas(sc)) != 0) ||
604 ((error = mpr_attach_user(sc)) != 0)) {
605 mpr_printf(sc, "%s failed to attach all subsystems: "
606 "error %d\n", __func__, error);
607 mpr_free(sc);
608 return (error);
609 }
610
611 if ((error = mpr_pci_setup_interrupts(sc)) != 0) {
612 mpr_printf(sc, "%s failed to setup interrupts\n",
613 __func__);
614 mpr_free(sc);
615 return (error);
616 }
617 }
618
619 return (error);
620}
621
622/*
623 * This is called if memory is being free (during detach for example) and when
624 * buffers need to be reallocated due to a Diag Reset.
625 */
626static void
627mpr_iocfacts_free(struct mpr_softc *sc)
628{
629 struct mpr_command *cm;
630 int i;
631
632 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
633
634 if (sc->free_busaddr != 0)
635 bus_dmamap_unload(sc->queues_dmat, sc->queues_map);
636 if (sc->free_queue != NULL)
637 bus_dmamem_free(sc->queues_dmat, sc->free_queue,
638 sc->queues_map);
639 if (sc->queues_dmat != NULL)
640 bus_dma_tag_destroy(sc->queues_dmat);
641
642 if (sc->chain_busaddr != 0)
643 bus_dmamap_unload(sc->chain_dmat, sc->chain_map);
644 if (sc->chain_frames != NULL)
645 bus_dmamem_free(sc->chain_dmat, sc->chain_frames,
646 sc->chain_map);
647 if (sc->chain_dmat != NULL)
648 bus_dma_tag_destroy(sc->chain_dmat);
649
650 if (sc->sense_busaddr != 0)
651 bus_dmamap_unload(sc->sense_dmat, sc->sense_map);
652 if (sc->sense_frames != NULL)
653 bus_dmamem_free(sc->sense_dmat, sc->sense_frames,
654 sc->sense_map);
655 if (sc->sense_dmat != NULL)
656 bus_dma_tag_destroy(sc->sense_dmat);
657
658 if (sc->reply_busaddr != 0)
659 bus_dmamap_unload(sc->reply_dmat, sc->reply_map);
660 if (sc->reply_frames != NULL)
661 bus_dmamem_free(sc->reply_dmat, sc->reply_frames,
662 sc->reply_map);
663 if (sc->reply_dmat != NULL)
664 bus_dma_tag_destroy(sc->reply_dmat);
665
666 if (sc->req_busaddr != 0)
667 bus_dmamap_unload(sc->req_dmat, sc->req_map);
668 if (sc->req_frames != NULL)
669 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map);
670 if (sc->req_dmat != NULL)
671 bus_dma_tag_destroy(sc->req_dmat);
672
673 if (sc->chains != NULL)
674 free(sc->chains, M_MPR);
675 if (sc->commands != NULL) {
676 for (i = 1; i < sc->num_reqs; i++) {
677 cm = &sc->commands[i];
678 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap);
679 }
680 free(sc->commands, M_MPR);
681 }
682 if (sc->buffer_dmat != NULL)
683 bus_dma_tag_destroy(sc->buffer_dmat);
684}
685
686/*
687 * The terms diag reset and hard reset are used interchangeably in the MPI
688 * docs to mean resetting the controller chip. In this code diag reset
689 * cleans everything up, and the hard reset function just sends the reset
690 * sequence to the chip. This should probably be refactored so that every
691 * subsystem gets a reset notification of some sort, and can clean up
692 * appropriately.
693 */
694int
695mpr_reinit(struct mpr_softc *sc)
696{
697 int error;
698 struct mprsas_softc *sassc;
699
700 sassc = sc->sassc;
701
702 MPR_FUNCTRACE(sc);
703
704 mtx_assert(&sc->mpr_mtx, MA_OWNED);
705
706 if (sc->mpr_flags & MPR_FLAGS_DIAGRESET) {
707 mpr_dprint(sc, MPR_INIT, "%s reset already in progress\n",
708 __func__);
709 return 0;
710 }
711
712 mpr_dprint(sc, MPR_INFO, "Reinitializing controller,\n");
713 /* make sure the completion callbacks can recognize they're getting
714 * a NULL cm_reply due to a reset.
715 */
716 sc->mpr_flags |= MPR_FLAGS_DIAGRESET;
717
718 /*
719 * Mask interrupts here.
720 */
721 mpr_dprint(sc, MPR_INIT, "%s mask interrupts\n", __func__);
722 mpr_mask_intr(sc);
723
724 error = mpr_diag_reset(sc, CAN_SLEEP);
725 if (error != 0) {
726 panic("%s hard reset failed with error %d\n", __func__, error);
727 }
728
729 /* Restore the PCI state, including the MSI-X registers */
730 mpr_pci_restore(sc);
731
732 /* Give the I/O subsystem special priority to get itself prepared */
733 mprsas_handle_reinit(sc);
734
735 /*
736 * Get IOC Facts and allocate all structures based on this information.
737 * The attach function will also call mpr_iocfacts_allocate at startup.
738 * If relevant values have changed in IOC Facts, this function will free
739 * all of the memory based on IOC Facts and reallocate that memory.
740 */
741 if ((error = mpr_iocfacts_allocate(sc, FALSE)) != 0) {
742 panic("%s IOC Facts based allocation failed with error %d\n",
743 __func__, error);
744 }
745
746 /*
747 * Mapping structures will be re-allocated after getting IOC Page8, so
748 * free these structures here.
749 */
750 mpr_mapping_exit(sc);
751
752 /*
753 * The static page function currently read is IOC Page8. Others can be
754 * added in future. It's possible that the values in IOC Page8 have
755 * changed after a Diag Reset due to user modification, so always read
756 * these. Interrupts are masked, so unmask them before getting config
757 * pages.
758 */
759 mpr_unmask_intr(sc);
760 sc->mpr_flags &= ~MPR_FLAGS_DIAGRESET;
761 mpr_base_static_config_pages(sc);
762
763 /*
764 * Some mapping info is based in IOC Page8 data, so re-initialize the
765 * mapping tables.
766 */
767 mpr_mapping_initialize(sc);
768
769 /*
770 * Restart will reload the event masks clobbered by the reset, and
771 * then enable the port.
772 */
773 mpr_reregister_events(sc);
774
775 /* the end of discovery will release the simq, so we're done. */
776 mpr_dprint(sc, MPR_INFO, "%s finished sc %p post %u free %u\n",
777 __func__, sc, sc->replypostindex, sc->replyfreeindex);
778 mprsas_release_simq_reinit(sassc);
779
780 return 0;
781}
782
783/* Wait for the chip to ACK a word that we've put into its FIFO
784 * Wait for <timeout> seconds. In single loop wait for busy loop
785 * for 500 microseconds.
786 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds.
787 * */
788static int
789mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag)
790{
791 u32 cntdn, count;
792 u32 int_status;
793 u32 doorbell;
794
795 count = 0;
796 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
797 do {
798 int_status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
799 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
800 mpr_dprint(sc, MPR_INIT, "%s: successful count(%d), "
801 "timeout(%d)\n", __func__, count, timeout);
802 return 0;
803 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
804 doorbell = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
805 if ((doorbell & MPI2_IOC_STATE_MASK) ==
806 MPI2_IOC_STATE_FAULT) {
807 mpr_dprint(sc, MPR_FAULT,
808 "fault_state(0x%04x)!\n", doorbell);
809 return (EFAULT);
810 }
811 } else if (int_status == 0xFFFFFFFF)
812 goto out;
813
814 /*
815 * If it can sleep, sleep for 1 milisecond, else busy loop for
816 * 0.5 milisecond
817 */
818 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP)
819 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, "mprdba", hz/1000);
820 else if (sleep_flag == CAN_SLEEP)
821 pause("mprdba", hz/1000);
822 else
823 DELAY(500);
824 count++;
825 } while (--cntdn);
826
827 out:
828 mpr_dprint(sc, MPR_FAULT, "%s: failed due to timeout count(%d), "
829 "int_status(%x)!\n", __func__, count, int_status);
830 return (ETIMEDOUT);
831}
832
833/* Wait for the chip to signal that the next word in its FIFO can be fetched */
834static int
835mpr_wait_db_int(struct mpr_softc *sc)
836{
837 int retry;
838
839 for (retry = 0; retry < MPR_DB_MAX_WAIT; retry++) {
840 if ((mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
841 MPI2_HIS_IOC2SYS_DB_STATUS) != 0)
842 return (0);
843 DELAY(2000);
844 }
845 return (ETIMEDOUT);
846}
847
848/* Step through the synchronous command state machine, i.e. "Doorbell mode" */
849static int
850mpr_request_sync(struct mpr_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply,
851 int req_sz, int reply_sz, int timeout)
852{
853 uint32_t *data32;
854 uint16_t *data16;
855 int i, count, ioc_sz, residual;
856 int sleep_flags = CAN_SLEEP;
857
858#if __FreeBSD_version >= 1000029
859 if (curthread->td_no_sleeping)
860#else //__FreeBSD_version < 1000029
861 if (curthread->td_pflags & TDP_NOSLEEPING)
862#endif //__FreeBSD_version >= 1000029
863 sleep_flags = NO_SLEEP;
864
865 /* Step 1 */
866 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
867
868 /* Step 2 */
869 if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
870 return (EBUSY);
871
872 /* Step 3
873 * Announce that a message is coming through the doorbell. Messages
874 * are pushed at 32bit words, so round up if needed.
875 */
876 count = (req_sz + 3) / 4;
877 mpr_regwrite(sc, MPI2_DOORBELL_OFFSET,
878 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
879 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT));
880
881 /* Step 4 */
882 if (mpr_wait_db_int(sc) ||
883 (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) {
884 mpr_dprint(sc, MPR_FAULT, "Doorbell failed to activate\n");
885 return (ENXIO);
886 }
887 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
888 if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) {
889 mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed\n");
890 return (ENXIO);
891 }
892
893 /* Step 5 */
894 /* Clock out the message data synchronously in 32-bit dwords*/
895 data32 = (uint32_t *)req;
896 for (i = 0; i < count; i++) {
897 mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i]));
898 if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) {
899 mpr_dprint(sc, MPR_FAULT,
900 "Timeout while writing doorbell\n");
901 return (ENXIO);
902 }
903 }
904
905 /* Step 6 */
906 /* Clock in the reply in 16-bit words. The total length of the
907 * message is always in the 4th byte, so clock out the first 2 words
908 * manually, then loop the rest.
909 */
910 data16 = (uint16_t *)reply;
911 if (mpr_wait_db_int(sc) != 0) {
912 mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 0\n");
913 return (ENXIO);
914 }
915 data16[0] =
916 mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
917 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
918 if (mpr_wait_db_int(sc) != 0) {
919 mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 1\n");
920 return (ENXIO);
921 }
922 data16[1] =
923 mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
924 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
925
926 /* Number of 32bit words in the message */
927 ioc_sz = reply->MsgLength;
928
929 /*
930 * Figure out how many 16bit words to clock in without overrunning.
931 * The precision loss with dividing reply_sz can safely be
932 * ignored because the messages can only be multiples of 32bits.
933 */
934 residual = 0;
935 count = MIN((reply_sz / 4), ioc_sz) * 2;
936 if (count < ioc_sz * 2) {
937 residual = ioc_sz * 2 - count;
938 mpr_dprint(sc, MPR_ERROR, "Driver error, throwing away %d "
939 "residual message words\n", residual);
940 }
941
942 for (i = 2; i < count; i++) {
943 if (mpr_wait_db_int(sc) != 0) {
944 mpr_dprint(sc, MPR_FAULT,
945 "Timeout reading doorbell %d\n", i);
946 return (ENXIO);
947 }
948 data16[i] = mpr_regread(sc, MPI2_DOORBELL_OFFSET) &
949 MPI2_DOORBELL_DATA_MASK;
950 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
951 }
952
953 /*
954 * Pull out residual words that won't fit into the provided buffer.
955 * This keeps the chip from hanging due to a driver programming
956 * error.
957 */
958 while (residual--) {
959 if (mpr_wait_db_int(sc) != 0) {
960 mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell\n");
961 return (ENXIO);
962 }
963 (void)mpr_regread(sc, MPI2_DOORBELL_OFFSET);
964 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
965 }
966
967 /* Step 7 */
968 if (mpr_wait_db_int(sc) != 0) {
969 mpr_dprint(sc, MPR_FAULT, "Timeout waiting to exit doorbell\n");
970 return (ENXIO);
971 }
972 if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
973 mpr_dprint(sc, MPR_FAULT, "Warning, doorbell still active\n");
974 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
975
976 return (0);
977}
978
979static void
980mpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm)
981{
982 reply_descriptor rd;
983
984 MPR_FUNCTRACE(sc);
985 mpr_dprint(sc, MPR_TRACE, "%s SMID %u cm %p ccb %p\n", __func__,
986 cm->cm_desc.Default.SMID, cm, cm->cm_ccb);
987
988 if (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE && !(sc->mpr_flags &
989 MPR_FLAGS_SHUTDOWN))
990 mtx_assert(&sc->mpr_mtx, MA_OWNED);
991
992 if (++sc->io_cmds_active > sc->io_cmds_highwater)
993 sc->io_cmds_highwater++;
994
995 rd.u.low = cm->cm_desc.Words.Low;
996 rd.u.high = cm->cm_desc.Words.High;
997 rd.word = htole64(rd.word);
998 /* TODO-We may need to make below regwrite atomic */
999 mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET,
1000 rd.u.low);
1001 mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET,
1002 rd.u.high);
1003}
1004
1005/*
1006 * Just the FACTS, ma'am.
1007 */
1008static int
1009mpr_get_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
1010{
1011 MPI2_DEFAULT_REPLY *reply;
1012 MPI2_IOC_FACTS_REQUEST request;
1013 int error, req_sz, reply_sz;
1014
1015 MPR_FUNCTRACE(sc);
1016
1017 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST);
1018 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY);
1019 reply = (MPI2_DEFAULT_REPLY *)facts;
1020
1021 bzero(&request, req_sz);
1022 request.Function = MPI2_FUNCTION_IOC_FACTS;
1023 error = mpr_request_sync(sc, &request, reply, req_sz, reply_sz, 5);
1024
1025 return (error);
1026}
1027
1028static int
1029mpr_send_iocinit(struct mpr_softc *sc)
1030{
1031 MPI2_IOC_INIT_REQUEST init;
1032 MPI2_DEFAULT_REPLY reply;
1033 int req_sz, reply_sz, error;
1034 struct timeval now;
1035 uint64_t time_in_msec;
1036
1037 MPR_FUNCTRACE(sc);
1038
1039 req_sz = sizeof(MPI2_IOC_INIT_REQUEST);
1040 reply_sz = sizeof(MPI2_IOC_INIT_REPLY);
1041 bzero(&init, req_sz);
1042 bzero(&reply, reply_sz);
1043
1044 /*
1045 * Fill in the init block. Note that most addresses are
1046 * deliberately in the lower 32bits of memory. This is a micro-
1047 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe.
1048 */
1049 init.Function = MPI2_FUNCTION_IOC_INIT;
1050 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
1051 init.MsgVersion = htole16(MPI2_VERSION);
1052 init.HeaderVersion = htole16(MPI2_HEADER_VERSION);
1053 init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize);
1054 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth);
1055 init.ReplyFreeQueueDepth = htole16(sc->fqdepth);
1056 init.SenseBufferAddressHigh = 0;
1057 init.SystemReplyAddressHigh = 0;
1058 init.SystemRequestFrameBaseAddress.High = 0;
1059 init.SystemRequestFrameBaseAddress.Low =
1060 htole32((uint32_t)sc->req_busaddr);
1061 init.ReplyDescriptorPostQueueAddress.High = 0;
1062 init.ReplyDescriptorPostQueueAddress.Low =
1063 htole32((uint32_t)sc->post_busaddr);
1064 init.ReplyFreeQueueAddress.High = 0;
1065 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr);
1066 getmicrotime(&now);
1067 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000);
1068 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF);
1069 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF);
1070
1071 error = mpr_request_sync(sc, &init, &reply, req_sz, reply_sz, 5);
1072 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
1073 error = ENXIO;
1074
1075 mpr_dprint(sc, MPR_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus);
1076 return (error);
1077}
1078
1079void
1080mpr_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1081{
1082 bus_addr_t *addr;
1083
1084 addr = arg;
1085 *addr = segs[0].ds_addr;
1086}
1087
1088static int
1089mpr_alloc_queues(struct mpr_softc *sc)
1090{
1091 bus_addr_t queues_busaddr;
1092 uint8_t *queues;
1093 int qsize, fqsize, pqsize;
1094
1095 /*
1096 * The reply free queue contains 4 byte entries in multiples of 16 and
1097 * aligned on a 16 byte boundary. There must always be an unused entry.
1098 * This queue supplies fresh reply frames for the firmware to use.
1099 *
1100 * The reply descriptor post queue contains 8 byte entries in
1101 * multiples of 16 and aligned on a 16 byte boundary. This queue
1102 * contains filled-in reply frames sent from the firmware to the host.
1103 *
1104 * These two queues are allocated together for simplicity.
1105 */
1106 sc->fqdepth = roundup2((sc->num_replies + 1), 16);
1107 sc->pqdepth = roundup2((sc->num_replies + 1), 16);
1108 fqsize= sc->fqdepth * 4;
1109 pqsize = sc->pqdepth * 8;
1110 qsize = fqsize + pqsize;
1111
1112 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1113 16, 0, /* algnmnt, boundary */
1114 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1115 BUS_SPACE_MAXADDR, /* highaddr */
1116 NULL, NULL, /* filter, filterarg */
1117 qsize, /* maxsize */
1118 1, /* nsegments */
1119 qsize, /* maxsegsize */
1120 0, /* flags */
1121 NULL, NULL, /* lockfunc, lockarg */
1122 &sc->queues_dmat)) {
1123 device_printf(sc->mpr_dev, "Cannot allocate queues DMA tag\n");
1124 return (ENOMEM);
1125 }
1126 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT,
1127 &sc->queues_map)) {
1128 device_printf(sc->mpr_dev, "Cannot allocate queues memory\n");
1129 return (ENOMEM);
1130 }
1131 bzero(queues, qsize);
1132 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
1133 mpr_memaddr_cb, &queues_busaddr, 0);
1134
1135 sc->free_queue = (uint32_t *)queues;
1136 sc->free_busaddr = queues_busaddr;
1137 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize);
1138 sc->post_busaddr = queues_busaddr + fqsize;
1139
1140 return (0);
1141}
1142
1143static int
1144mpr_alloc_replies(struct mpr_softc *sc)
1145{
1146 int rsize, num_replies;
1147
1148 /*
1149 * sc->num_replies should be one less than sc->fqdepth. We need to
1150 * allocate space for sc->fqdepth replies, but only sc->num_replies
1151 * replies can be used at once.
1152 */
1153 num_replies = max(sc->fqdepth, sc->num_replies);
1154
1155 rsize = sc->facts->ReplyFrameSize * num_replies * 4;
1156 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1157 4, 0, /* algnmnt, boundary */
1158 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1159 BUS_SPACE_MAXADDR, /* highaddr */
1160 NULL, NULL, /* filter, filterarg */
1161 rsize, /* maxsize */
1162 1, /* nsegments */
1163 rsize, /* maxsegsize */
1164 0, /* flags */
1165 NULL, NULL, /* lockfunc, lockarg */
1166 &sc->reply_dmat)) {
1167 device_printf(sc->mpr_dev, "Cannot allocate replies DMA tag\n");
1168 return (ENOMEM);
1169 }
1170 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames,
1171 BUS_DMA_NOWAIT, &sc->reply_map)) {
1172 device_printf(sc->mpr_dev, "Cannot allocate replies memory\n");
1173 return (ENOMEM);
1174 }
1175 bzero(sc->reply_frames, rsize);
1176 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize,
1177 mpr_memaddr_cb, &sc->reply_busaddr, 0);
1178
1179 return (0);
1180}
1181
1182static int
1183mpr_alloc_requests(struct mpr_softc *sc)
1184{
1185 struct mpr_command *cm;
1186 struct mpr_chain *chain;
1187 int i, rsize, nsegs;
1188
1189 rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4;
1190 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1191 16, 0, /* algnmnt, boundary */
1192 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1193 BUS_SPACE_MAXADDR, /* highaddr */
1194 NULL, NULL, /* filter, filterarg */
1195 rsize, /* maxsize */
1196 1, /* nsegments */
1197 rsize, /* maxsegsize */
1198 0, /* flags */
1199 NULL, NULL, /* lockfunc, lockarg */
1200 &sc->req_dmat)) {
1201 device_printf(sc->mpr_dev, "Cannot allocate request DMA tag\n");
1202 return (ENOMEM);
1203 }
1204 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames,
1205 BUS_DMA_NOWAIT, &sc->req_map)) {
1206 device_printf(sc->mpr_dev, "Cannot allocate request memory\n");
1207 return (ENOMEM);
1208 }
1209 bzero(sc->req_frames, rsize);
1210 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize,
1211 mpr_memaddr_cb, &sc->req_busaddr, 0);
1212
1213 rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4;
1214 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1215 16, 0, /* algnmnt, boundary */
1216 BUS_SPACE_MAXADDR, /* lowaddr */
1217 BUS_SPACE_MAXADDR, /* highaddr */
1218 NULL, NULL, /* filter, filterarg */
1219 rsize, /* maxsize */
1220 1, /* nsegments */
1221 rsize, /* maxsegsize */
1222 0, /* flags */
1223 NULL, NULL, /* lockfunc, lockarg */
1224 &sc->chain_dmat)) {
1225 device_printf(sc->mpr_dev, "Cannot allocate chain DMA tag\n");
1226 return (ENOMEM);
1227 }
1228 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames,
1229 BUS_DMA_NOWAIT, &sc->chain_map)) {
1230 device_printf(sc->mpr_dev, "Cannot allocate chain memory\n");
1231 return (ENOMEM);
1232 }
1233 bzero(sc->chain_frames, rsize);
1234 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize,
1235 mpr_memaddr_cb, &sc->chain_busaddr, 0);
1236
1237 rsize = MPR_SENSE_LEN * sc->num_reqs;
1238 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1239 1, 0, /* algnmnt, boundary */
1240 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1241 BUS_SPACE_MAXADDR, /* highaddr */
1242 NULL, NULL, /* filter, filterarg */
1243 rsize, /* maxsize */
1244 1, /* nsegments */
1245 rsize, /* maxsegsize */
1246 0, /* flags */
1247 NULL, NULL, /* lockfunc, lockarg */
1248 &sc->sense_dmat)) {
1249 device_printf(sc->mpr_dev, "Cannot allocate sense DMA tag\n");
1250 return (ENOMEM);
1251 }
1252 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames,
1253 BUS_DMA_NOWAIT, &sc->sense_map)) {
1254 device_printf(sc->mpr_dev, "Cannot allocate sense memory\n");
1255 return (ENOMEM);
1256 }
1257 bzero(sc->sense_frames, rsize);
1258 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize,
1259 mpr_memaddr_cb, &sc->sense_busaddr, 0);
1260
1261 sc->chains = malloc(sizeof(struct mpr_chain) * sc->max_chains, M_MPR,
1262 M_WAITOK | M_ZERO);
1263 if (!sc->chains) {
1264 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
1265 __func__, __LINE__);
1266 return (ENOMEM);
1267 }
1268 for (i = 0; i < sc->max_chains; i++) {
1269 chain = &sc->chains[i];
1270 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames +
1271 i * sc->facts->IOCRequestFrameSize * 4);
1272 chain->chain_busaddr = sc->chain_busaddr +
1273 i * sc->facts->IOCRequestFrameSize * 4;
1274 mpr_free_chain(sc, chain);
1275 sc->chain_free_lowwater++;
1276 }
1277
1278 /* XXX Need to pick a more precise value */
1279 nsegs = (MAXPHYS / PAGE_SIZE) + 1;
1280 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1281 1, 0, /* algnmnt, boundary */
1282 BUS_SPACE_MAXADDR, /* lowaddr */
1283 BUS_SPACE_MAXADDR, /* highaddr */
1284 NULL, NULL, /* filter, filterarg */
1285 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
1286 nsegs, /* nsegments */
1287 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
1288 BUS_DMA_ALLOCNOW, /* flags */
1289 busdma_lock_mutex, /* lockfunc */
1290 &sc->mpr_mtx, /* lockarg */
1291 &sc->buffer_dmat)) {
1292 device_printf(sc->mpr_dev, "Cannot allocate buffer DMA tag\n");
1293 return (ENOMEM);
1294 }
1295
1296 /*
1297 * SMID 0 cannot be used as a free command per the firmware spec.
1298 * Just drop that command instead of risking accounting bugs.
1299 */
1300 sc->commands = malloc(sizeof(struct mpr_command) * sc->num_reqs,
1301 M_MPR, M_WAITOK | M_ZERO);
1302 if (!sc->commands) {
1303 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
1304 __func__, __LINE__);
1305 return (ENOMEM);
1306 }
1307 for (i = 1; i < sc->num_reqs; i++) {
1308 cm = &sc->commands[i];
1309 cm->cm_req = sc->req_frames +
1310 i * sc->facts->IOCRequestFrameSize * 4;
1311 cm->cm_req_busaddr = sc->req_busaddr +
1312 i * sc->facts->IOCRequestFrameSize * 4;
1313 cm->cm_sense = &sc->sense_frames[i];
1314 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPR_SENSE_LEN;
1315 cm->cm_desc.Default.SMID = i;
1316 cm->cm_sc = sc;
1317 TAILQ_INIT(&cm->cm_chain_list);
1318 callout_init_mtx(&cm->cm_callout, &sc->mpr_mtx, 0);
1319
1320 /* XXX Is a failure here a critical problem? */
1321 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0)
1322 if (i <= sc->facts->HighPriorityCredit)
1323 mpr_free_high_priority_command(sc, cm);
1324 else
1325 mpr_free_command(sc, cm);
1326 else {
1327 panic("failed to allocate command %d\n", i);
1328 sc->num_reqs = i;
1329 break;
1330 }
1331 }
1332
1333 return (0);
1334}
1335
1336static int
1337mpr_init_queues(struct mpr_softc *sc)
1338{
1339 int i;
1340
1341 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8);
1342
1343 /*
1344 * According to the spec, we need to use one less reply than we
1345 * have space for on the queue. So sc->num_replies (the number we
1346 * use) should be less than sc->fqdepth (allocated size).
1347 */
1348 if (sc->num_replies >= sc->fqdepth)
1349 return (EINVAL);
1350
1351 /*
1352 * Initialize all of the free queue entries.
1353 */
1354 for (i = 0; i < sc->fqdepth; i++)
1355 sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4);
1356 sc->replyfreeindex = sc->num_replies;
1357
1358 return (0);
1359}
1360
1361/* Get the driver parameter tunables. Lowest priority are the driver defaults.
1362 * Next are the global settings, if they exist. Highest are the per-unit
1363 * settings, if they exist.
1364 */
1365static void
1366mpr_get_tunables(struct mpr_softc *sc)
1367{
1368 char tmpstr[80];
1369
1370 /* XXX default to some debugging for now */
1371 sc->mpr_debug = MPR_INFO | MPR_FAULT;
1372 sc->disable_msix = 0;
1373 sc->disable_msi = 0;
1374 sc->max_chains = MPR_CHAIN_FRAMES;
1375
1376 /*
1377 * Grab the global variables.
1378 */
1379 TUNABLE_INT_FETCH("hw.mpr.debug_level", &sc->mpr_debug);
1380 TUNABLE_INT_FETCH("hw.mpr.disable_msix", &sc->disable_msix);
1381 TUNABLE_INT_FETCH("hw.mpr.disable_msi", &sc->disable_msi);
1382 TUNABLE_INT_FETCH("hw.mpr.max_chains", &sc->max_chains);
1383
1384 /* Grab the unit-instance variables */
1385 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.debug_level",
1386 device_get_unit(sc->mpr_dev));
1387 TUNABLE_INT_FETCH(tmpstr, &sc->mpr_debug);
1388
1389 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msix",
1390 device_get_unit(sc->mpr_dev));
1391 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix);
1392
1393 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msi",
1394 device_get_unit(sc->mpr_dev));
1395 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi);
1396
1397 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.max_chains",
1398 device_get_unit(sc->mpr_dev));
1399 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains);
1400
1401 bzero(sc->exclude_ids, sizeof(sc->exclude_ids));
1402 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.exclude_ids",
1403 device_get_unit(sc->mpr_dev));
1404 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids));
1405}
1406
1407static void
1408mpr_setup_sysctl(struct mpr_softc *sc)
1409{
1410 struct sysctl_ctx_list *sysctl_ctx = NULL;
1411 struct sysctl_oid *sysctl_tree = NULL;
1412 char tmpstr[80], tmpstr2[80];
1413
1414 /*
1415 * Setup the sysctl variable so the user can change the debug level
1416 * on the fly.
1417 */
1418 snprintf(tmpstr, sizeof(tmpstr), "MPR controller %d",
1419 device_get_unit(sc->mpr_dev));
1420 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mpr_dev));
1421
1422 sysctl_ctx = device_get_sysctl_ctx(sc->mpr_dev);
1423 if (sysctl_ctx != NULL)
1424 sysctl_tree = device_get_sysctl_tree(sc->mpr_dev);
1425
1426 if (sysctl_tree == NULL) {
1427 sysctl_ctx_init(&sc->sysctl_ctx);
1428 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
1429 SYSCTL_STATIC_CHILDREN(_hw_mpr), OID_AUTO, tmpstr2,
1430 CTLFLAG_RD, 0, tmpstr);
1431 if (sc->sysctl_tree == NULL)
1432 return;
1433 sysctl_ctx = &sc->sysctl_ctx;
1434 sysctl_tree = sc->sysctl_tree;
1435 }
1436
1437 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1438 OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mpr_debug, 0,
1439 "mpr debug level");
1440
1441 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1442 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0,
1443 "Disable the use of MSI-X interrupts");
1444
1445 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1446 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0,
1447 "Disable the use of MSI interrupts");
1448
1449 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1450 OID_AUTO, "firmware_version", CTLFLAG_RW, &sc->fw_version,
1451 strlen(sc->fw_version), "firmware version");
1452
1453 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1454 OID_AUTO, "driver_version", CTLFLAG_RW, MPR_DRIVER_VERSION,
1455 strlen(MPR_DRIVER_VERSION), "driver version");
1456
1457 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1458 OID_AUTO, "io_cmds_active", CTLFLAG_RD,
1459 &sc->io_cmds_active, 0, "number of currently active commands");
1460
1461 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1462 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD,
1463 &sc->io_cmds_highwater, 0, "maximum active commands seen");
1464
1465 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1466 OID_AUTO, "chain_free", CTLFLAG_RD,
1467 &sc->chain_free, 0, "number of free chain elements");
1468
1469 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1470 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD,
1471 &sc->chain_free_lowwater, 0,"lowest number of free chain elements");
1472
1473 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1474 OID_AUTO, "max_chains", CTLFLAG_RD,
1475 &sc->max_chains, 0,"maximum chain frames that will be allocated");
1476
1477#if __FreeBSD_version >= 900030
1478 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1479 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD,
1480 &sc->chain_alloc_fail, "chain allocation failures");
1481#endif //FreeBSD_version >= 900030
1482}
1483
1484int
1485mpr_attach(struct mpr_softc *sc)
1486{
1487 int error;
1488
1489 mpr_get_tunables(sc);
1490
1491 MPR_FUNCTRACE(sc);
1492
1493 mtx_init(&sc->mpr_mtx, "MPR lock", NULL, MTX_DEF);
1494 callout_init_mtx(&sc->periodic, &sc->mpr_mtx, 0);
1495 TAILQ_INIT(&sc->event_list);
1496 timevalclear(&sc->lastfail);
1497
1498 if ((error = mpr_transition_ready(sc)) != 0) {
1499 mpr_printf(sc, "%s failed to transition ready\n", __func__);
1500 return (error);
1501 }
1502
1503 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPR,
1504 M_ZERO|M_NOWAIT);
1505 if (!sc->facts) {
1506 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
1507 __func__, __LINE__);
1508 return (ENOMEM);
1509 }
1510
1511 /*
1512 * Get IOC Facts and allocate all structures based on this information.
1513 * A Diag Reset will also call mpr_iocfacts_allocate and re-read the IOC
1514 * Facts. If relevant values have changed in IOC Facts, this function
1515 * will free all of the memory based on IOC Facts and reallocate that
1516 * memory. If this fails, any allocated memory should already be freed.
1517 */
1518 if ((error = mpr_iocfacts_allocate(sc, TRUE)) != 0) {
1519 mpr_dprint(sc, MPR_FAULT, "%s IOC Facts based allocation "
1520 "failed with error %d\n", __func__, error);
1521 return (error);
1522 }
1523
1524 /* Start the periodic watchdog check on the IOC Doorbell */
1525 mpr_periodic(sc);
1526
1527 /*
1528 * The portenable will kick off discovery events that will drive the
1529 * rest of the initialization process. The CAM/SAS module will
1530 * hold up the boot sequence until discovery is complete.
1531 */
1532 sc->mpr_ich.ich_func = mpr_startup;
1533 sc->mpr_ich.ich_arg = sc;
1534 if (config_intrhook_establish(&sc->mpr_ich) != 0) {
1535 mpr_dprint(sc, MPR_ERROR, "Cannot establish MPR config hook\n");
1536 error = EINVAL;
1537 }
1538
1539 /*
1540 * Allow IR to shutdown gracefully when shutdown occurs.
1541 */
1542 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final,
1543 mprsas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT);
1544
1545 if (sc->shutdown_eh == NULL)
1546 mpr_dprint(sc, MPR_ERROR, "shutdown event registration "
1547 "failed\n");
1548
1549 mpr_setup_sysctl(sc);
1550
1551 sc->mpr_flags |= MPR_FLAGS_ATTACH_DONE;
1552
1553 return (error);
1554}
1555
1556/* Run through any late-start handlers. */
1557static void
1558mpr_startup(void *arg)
1559{
1560 struct mpr_softc *sc;
1561
1562 sc = (struct mpr_softc *)arg;
1563
1564 mpr_lock(sc);
1565 mpr_unmask_intr(sc);
1566
1567 /* initialize device mapping tables */
1568 mpr_base_static_config_pages(sc);
1569 mpr_mapping_initialize(sc);
1570 mprsas_startup(sc);
1571 mpr_unlock(sc);
1572}
1573
1574/* Periodic watchdog. Is called with the driver lock already held. */
1575static void
1576mpr_periodic(void *arg)
1577{
1578 struct mpr_softc *sc;
1579 uint32_t db;
1580
1581 sc = (struct mpr_softc *)arg;
1582 if (sc->mpr_flags & MPR_FLAGS_SHUTDOWN)
1583 return;
1584
1585 db = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
1586 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
1587 if ((db & MPI2_DOORBELL_FAULT_CODE_MASK) ==
1588 IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED) {
1589 panic("TEMPERATURE FAULT: STOPPING.");
1590 }
1591 mpr_dprint(sc, MPR_FAULT, "IOC Fault 0x%08x, Resetting\n", db);
1592 mpr_reinit(sc);
1593 }
1594
1595 callout_reset(&sc->periodic, MPR_PERIODIC_DELAY * hz, mpr_periodic, sc);
1596}
1597
1598static void
1599mpr_log_evt_handler(struct mpr_softc *sc, uintptr_t data,
1600 MPI2_EVENT_NOTIFICATION_REPLY *event)
1601{
1602 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry;
1603
1604 mpr_print_event(sc, event);
1605
1606 switch (event->Event) {
1607 case MPI2_EVENT_LOG_DATA:
1608 mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_DATA:\n");
1609 if (sc->mpr_debug & MPR_EVENT)
1610 hexdump(event->EventData, event->EventDataLength, NULL,
1611 0);
1612 break;
1613 case MPI2_EVENT_LOG_ENTRY_ADDED:
1614 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData;
1615 mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event "
1616 "0x%x Sequence %d:\n", entry->LogEntryQualifier,
1617 entry->LogSequence);
1618 break;
1619 default:
1620 break;
1621 }
1622 return;
1623}
1624
1625static int
1626mpr_attach_log(struct mpr_softc *sc)
1627{
1628 uint8_t events[16];
1629
1630 bzero(events, 16);
1631 setbit(events, MPI2_EVENT_LOG_DATA);
1632 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED);
1633
1634 mpr_register_events(sc, events, mpr_log_evt_handler, NULL,
1635 &sc->mpr_log_eh);
1636
1637 return (0);
1638}
1639
1640static int
1641mpr_detach_log(struct mpr_softc *sc)
1642{
1643
1644 if (sc->mpr_log_eh != NULL)
1645 mpr_deregister_events(sc, sc->mpr_log_eh);
1646 return (0);
1647}
1648
1649/*
1650 * Free all of the driver resources and detach submodules. Should be called
1651 * without the lock held.
1652 */
1653int
1654mpr_free(struct mpr_softc *sc)
1655{
1656 int error;
1657
1658 /* Turn off the watchdog */
1659 mpr_lock(sc);
1660 sc->mpr_flags |= MPR_FLAGS_SHUTDOWN;
1661 mpr_unlock(sc);
1662 /* Lock must not be held for this */
1663 callout_drain(&sc->periodic);
1664
1665 if (((error = mpr_detach_log(sc)) != 0) ||
1666 ((error = mpr_detach_sas(sc)) != 0))
1667 return (error);
1668
1669 mpr_detach_user(sc);
1670
1671 /* Put the IOC back in the READY state. */
1672 mpr_lock(sc);
1673 if ((error = mpr_transition_ready(sc)) != 0) {
1674 mpr_unlock(sc);
1675 return (error);
1676 }
1677 mpr_unlock(sc);
1678
1679 if (sc->facts != NULL)
1680 free(sc->facts, M_MPR);
1681
1682 /*
1683 * Free all buffers that are based on IOC Facts. A Diag Reset may need
1684 * to free these buffers too.
1685 */
1686 mpr_iocfacts_free(sc);
1687
1688 if (sc->sysctl_tree != NULL)
1689 sysctl_ctx_free(&sc->sysctl_ctx);
1690
1691 /* Deregister the shutdown function */
1692 if (sc->shutdown_eh != NULL)
1693 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh);
1694
1695 mtx_destroy(&sc->mpr_mtx);
1696
1697 return (0);
1698}
1699
1700static __inline void
1701mpr_complete_command(struct mpr_softc *sc, struct mpr_command *cm)
1702{
1703 MPR_FUNCTRACE(sc);
1704
1705 if (cm == NULL) {
1706 mpr_dprint(sc, MPR_ERROR, "Completing NULL command\n");
1707 return;
1708 }
1709
1710 if (cm->cm_flags & MPR_CM_FLAGS_POLLED)
1711 cm->cm_flags |= MPR_CM_FLAGS_COMPLETE;
1712
1713 if (cm->cm_complete != NULL) {
1714 mpr_dprint(sc, MPR_TRACE,
1715 "%s cm %p calling cm_complete %p data %p reply %p\n",
1716 __func__, cm, cm->cm_complete, cm->cm_complete_data,
1717 cm->cm_reply);
1718 cm->cm_complete(sc, cm);
1719 }
1720
1721 if (cm->cm_flags & MPR_CM_FLAGS_WAKEUP) {
1722 mpr_dprint(sc, MPR_TRACE, "waking up %p\n", cm);
1723 wakeup(cm);
1724 }
1725
1726 if (sc->io_cmds_active != 0) {
1727 sc->io_cmds_active--;
1728 } else {
1729 mpr_dprint(sc, MPR_ERROR, "Warning: io_cmds_active is "
1730 "out of sync - resynching to 0\n");
1731 }
1732}
1733
1734static void
1735mpr_sas_log_info(struct mpr_softc *sc , u32 log_info)
1736{
1737 union loginfo_type {
1738 u32 loginfo;
1739 struct {
1740 u32 subcode:16;
1741 u32 code:8;
1742 u32 originator:4;
1743 u32 bus_type:4;
1744 } dw;
1745 };
1746 union loginfo_type sas_loginfo;
1747 char *originator_str = NULL;
1748
1749 sas_loginfo.loginfo = log_info;
1750 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
1751 return;
1752
1753 /* each nexus loss loginfo */
1754 if (log_info == 0x31170000)
1755 return;
1756
1757 /* eat the loginfos associated with task aborts */
1758 if ((log_info == 30050000) || (log_info == 0x31140000) ||
1759 (log_info == 0x31130000))
1760 return;
1761
1762 switch (sas_loginfo.dw.originator) {
1763 case 0:
1764 originator_str = "IOP";
1765 break;
1766 case 1:
1767 originator_str = "PL";
1768 break;
1769 case 2:
1770 originator_str = "IR";
1771 break;
1772 }
1773
1774 mpr_dprint(sc, MPR_INFO, "log_info(0x%08x): originator(%s), "
1775 "code(0x%02x), sub_code(0x%04x)\n", log_info,
1776 originator_str, sas_loginfo.dw.code,
1777 sas_loginfo.dw.subcode);
1778}
1779
1780static void
1781mpr_display_reply_info(struct mpr_softc *sc, uint8_t *reply)
1782{
1783 MPI2DefaultReply_t *mpi_reply;
1784 u16 sc_status;
1785
1786 mpi_reply = (MPI2DefaultReply_t*)reply;
1787 sc_status = le16toh(mpi_reply->IOCStatus);
1788 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
1789 mpr_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo));
1790}
1791
1792void
1793mpr_intr(void *data)
1794{
1795 struct mpr_softc *sc;
1796 uint32_t status;
1797
1798 sc = (struct mpr_softc *)data;
1799 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
1800
1801 /*
1802 * Check interrupt status register to flush the bus. This is
1803 * needed for both INTx interrupts and driver-driven polling
1804 */
1805 status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
1806 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0)
1807 return;
1808
1809 mpr_lock(sc);
1810 mpr_intr_locked(data);
1811 mpr_unlock(sc);
1812 return;
1813}
1814
1815/*
1816 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the
1817 * chip. Hopefully this theory is correct.
1818 */
1819void
1820mpr_intr_msi(void *data)
1821{
1822 struct mpr_softc *sc;
1823
1824 sc = (struct mpr_softc *)data;
1825 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
1826 mpr_lock(sc);
1827 mpr_intr_locked(data);
1828 mpr_unlock(sc);
1829 return;
1830}
1831
1832/*
1833 * The locking is overly broad and simplistic, but easy to deal with for now.
1834 */
1835void
1836mpr_intr_locked(void *data)
1837{
1838 MPI2_REPLY_DESCRIPTORS_UNION *desc;
1839 struct mpr_softc *sc;
1840 struct mpr_command *cm = NULL;
1841 uint8_t flags;
1842 u_int pq;
1843 MPI2_DIAG_RELEASE_REPLY *rel_rep;
1844 mpr_fw_diagnostic_buffer_t *pBuffer;
1845
1846 sc = (struct mpr_softc *)data;
1847
1848 pq = sc->replypostindex;
1849 mpr_dprint(sc, MPR_TRACE,
1850 "%s sc %p starting with replypostindex %u\n",
1851 __func__, sc, sc->replypostindex);
1852
1853 for ( ;; ) {
1854 cm = NULL;
1855 desc = &sc->post_queue[sc->replypostindex];
1856 flags = desc->Default.ReplyFlags &
1857 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1858 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) ||
1859 (le32toh(desc->Words.High) == 0xffffffff))
1860 break;
1861
1862 /* increment the replypostindex now, so that event handlers
1863 * and cm completion handlers which decide to do a diag
1864 * reset can zero it without it getting incremented again
1865 * afterwards, and we break out of this loop on the next
1866 * iteration since the reply post queue has been cleared to
1867 * 0xFF and all descriptors look unused (which they are).
1868 */
1869 if (++sc->replypostindex >= sc->pqdepth)
1870 sc->replypostindex = 0;
1871
1872 switch (flags) {
1873 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS:
1874 case MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS:
1875 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)];
1876 cm->cm_reply = NULL;
1877 break;
1878 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY:
1879 {
1880 uint32_t baddr;
1881 uint8_t *reply;
1882
1883 /*
1884 * Re-compose the reply address from the address
1885 * sent back from the chip. The ReplyFrameAddress
1886 * is the lower 32 bits of the physical address of
1887 * particular reply frame. Convert that address to
1888 * host format, and then use that to provide the
1889 * offset against the virtual address base
1890 * (sc->reply_frames).
1891 */
1892 baddr = le32toh(desc->AddressReply.ReplyFrameAddress);
1893 reply = sc->reply_frames +
1894 (baddr - ((uint32_t)sc->reply_busaddr));
1895 /*
1896 * Make sure the reply we got back is in a valid
1897 * range. If not, go ahead and panic here, since
1898 * we'll probably panic as soon as we deference the
1899 * reply pointer anyway.
1900 */
1901 if ((reply < sc->reply_frames)
1902 || (reply > (sc->reply_frames +
1903 (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) {
1904 printf("%s: WARNING: reply %p out of range!\n",
1905 __func__, reply);
1906 printf("%s: reply_frames %p, fqdepth %d, "
1907 "frame size %d\n", __func__,
1908 sc->reply_frames, sc->fqdepth,
1909 sc->facts->ReplyFrameSize * 4);
1910 printf("%s: baddr %#x,\n", __func__, baddr);
1911 /* LSI-TODO. See Linux Code for Graceful exit */
1912 panic("Reply address out of range");
1913 }
1914 if (le16toh(desc->AddressReply.SMID) == 0) {
1915 if (((MPI2_DEFAULT_REPLY *)reply)->Function ==
1916 MPI2_FUNCTION_DIAG_BUFFER_POST) {
1917 /*
1918 * If SMID is 0 for Diag Buffer Post,
1919 * this implies that the reply is due to
1920 * a release function with a status that
1921 * the buffer has been released. Set
1922 * the buffer flags accordingly.
1923 */
1924 rel_rep =
1925 (MPI2_DIAG_RELEASE_REPLY *)reply;
1926 if (le16toh(rel_rep->IOCStatus) ==
1927 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED)
1928 {
1929 pBuffer =
1930 &sc->fw_diag_buffer_list[
1931 rel_rep->BufferType];
1932 pBuffer->valid_data = TRUE;
1933 pBuffer->owned_by_firmware =
1934 FALSE;
1935 pBuffer->immediate = FALSE;
1936 }
1937 } else
1938 mpr_dispatch_event(sc, baddr,
1939 (MPI2_EVENT_NOTIFICATION_REPLY *)
1940 reply);
1941 } else {
1942 cm = &sc->commands[
1943 le16toh(desc->AddressReply.SMID)];
1944 cm->cm_reply = reply;
1945 cm->cm_reply_data =
1946 le32toh(desc->AddressReply.
1947 ReplyFrameAddress);
1948 }
1949 break;
1950 }
1951 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS:
1952 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER:
1953 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS:
1954 default:
1955 /* Unhandled */
1956 mpr_dprint(sc, MPR_ERROR, "Unhandled reply 0x%x\n",
1957 desc->Default.ReplyFlags);
1958 cm = NULL;
1959 break;
1960 }
1961
1962 if (cm != NULL) {
1963 // Print Error reply frame
1964 if (cm->cm_reply)
1965 mpr_display_reply_info(sc,cm->cm_reply);
1966 mpr_complete_command(sc, cm);
1967 }
1968
1969 desc->Words.Low = 0xffffffff;
1970 desc->Words.High = 0xffffffff;
1971 }
1972
1973 if (pq != sc->replypostindex) {
1974 mpr_dprint(sc, MPR_TRACE,
1975 "%s sc %p writing postindex %d\n",
1976 __func__, sc, sc->replypostindex);
1977 mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET,
1978 sc->replypostindex);
1979 }
1980
1981 return;
1982}
1983
1984static void
1985mpr_dispatch_event(struct mpr_softc *sc, uintptr_t data,
1986 MPI2_EVENT_NOTIFICATION_REPLY *reply)
1987{
1988 struct mpr_event_handle *eh;
1989 int event, handled = 0;
1990
1991 event = le16toh(reply->Event);
1992 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
1993 if (isset(eh->mask, event)) {
1994 eh->callback(sc, data, reply);
1995 handled++;
1996 }
1997 }
1998
1999 if (handled == 0)
2000 mpr_dprint(sc, MPR_EVENT, "Unhandled event 0x%x\n",
2001 le16toh(event));
2002
2003 /*
2004 * This is the only place that the event/reply should be freed.
2005 * Anything wanting to hold onto the event data should have
2006 * already copied it into their own storage.
2007 */
2008 mpr_free_reply(sc, data);
2009}
2010
2011static void
2012mpr_reregister_events_complete(struct mpr_softc *sc, struct mpr_command *cm)
2013{
2014 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
2015
2016 if (cm->cm_reply)
2017 mpr_print_event(sc,
2018 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply);
2019
2020 mpr_free_command(sc, cm);
2021
2022 /* next, send a port enable */
2023 mprsas_startup(sc);
2024}
2025
2026/*
2027 * For both register_events and update_events, the caller supplies a bitmap
2028 * of events that it _wants_. These functions then turn that into a bitmask
2029 * suitable for the controller.
2030 */
2031int
2032mpr_register_events(struct mpr_softc *sc, uint8_t *mask,
2033 mpr_evt_callback_t *cb, void *data, struct mpr_event_handle **handle)
2034{
2035 struct mpr_event_handle *eh;
2036 int error = 0;
2037
2038 eh = malloc(sizeof(struct mpr_event_handle), M_MPR, M_WAITOK|M_ZERO);
2039 if (!eh) {
2040 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
2041 __func__, __LINE__);
2042 return (ENOMEM);
2043 }
2044 eh->callback = cb;
2045 eh->data = data;
2046 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list);
2047 if (mask != NULL)
2048 error = mpr_update_events(sc, eh, mask);
2049 *handle = eh;
2050
2051 return (error);
2052}
2053
2054int
2055mpr_update_events(struct mpr_softc *sc, struct mpr_event_handle *handle,
2056 uint8_t *mask)
2057{
2058 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2059 MPI2_EVENT_NOTIFICATION_REPLY *reply;
2060 struct mpr_command *cm;
2061 struct mpr_event_handle *eh;
2062 int error, i;
2063
2064 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
2065
2066 if ((mask != NULL) && (handle != NULL))
2067 bcopy(mask, &handle->mask[0], 16);
2068 memset(sc->event_mask, 0xff, 16);
2069
2070 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2071 for (i = 0; i < 16; i++)
2072 sc->event_mask[i] &= ~eh->mask[i];
2073 }
2074
2075 if ((cm = mpr_alloc_command(sc)) == NULL)
2076 return (EBUSY);
2077 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2078 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2079 evtreq->MsgFlags = 0;
2080 evtreq->SASBroadcastPrimitiveMasks = 0;
2081#ifdef MPR_DEBUG_ALL_EVENTS
2082 {
2083 u_char fullmask[16];
2084 memset(fullmask, 0x00, 16);
2085 bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16);
2086 }
2087#else
2088 bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16);
2089#endif
2090 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2091 cm->cm_data = NULL;
2092
2093 error = mpr_request_polled(sc, cm);
2094 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply;
2095 if ((reply == NULL) ||
2096 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
2097 error = ENXIO;
2098
2099 if(reply)
2100 mpr_print_event(sc, reply);
2101
2102 mpr_dprint(sc, MPR_TRACE, "%s finished error %d\n", __func__, error);
2103
2104 mpr_free_command(sc, cm);
2105 return (error);
2106}
2107
2108static int
2109mpr_reregister_events(struct mpr_softc *sc)
2110{
2111 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2112 struct mpr_command *cm;
2113 struct mpr_event_handle *eh;
2114 int error, i;
2115
2116 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
2117
2118 /* first, reregister events */
2119
2120 memset(sc->event_mask, 0xff, 16);
2121
2122 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2123 for (i = 0; i < 16; i++)
2124 sc->event_mask[i] &= ~eh->mask[i];
2125 }
2126
2127 if ((cm = mpr_alloc_command(sc)) == NULL)
2128 return (EBUSY);
2129 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2130 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2131 evtreq->MsgFlags = 0;
2132 evtreq->SASBroadcastPrimitiveMasks = 0;
2133#ifdef MPR_DEBUG_ALL_EVENTS
2134 {
2135 u_char fullmask[16];
2136 memset(fullmask, 0x00, 16);
2137 bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16);
2138 }
2139#else
2140 bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16);
2141#endif
2142 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2143 cm->cm_data = NULL;
2144 cm->cm_complete = mpr_reregister_events_complete;
2145
2146 error = mpr_map_command(sc, cm);
2147
2148 mpr_dprint(sc, MPR_TRACE, "%s finished with error %d\n", __func__,
2149 error);
2150 return (error);
2151}
2152
2153int
2154mpr_deregister_events(struct mpr_softc *sc, struct mpr_event_handle *handle)
2155{
2156
2157 TAILQ_REMOVE(&sc->event_list, handle, eh_list);
2158 free(handle, M_MPR);
2159 return (mpr_update_events(sc, NULL, NULL));
2160}
2161
2162/*
2163 * Add a chain element as the next SGE for the specified command.
2164 * Reset cm_sge and cm_sgesize to indicate all the available space. Chains are
2165 * only required for IEEE commands. Therefore there is no code for commands
2166 * that have the MPR_CM_FLAGS_SGE_SIMPLE flag set (and those commands shouldn't
2167 * be requesting chains).
2168 */
2169static int
2170mpr_add_chain(struct mpr_command *cm, int segsleft)
2171{
2172 struct mpr_softc *sc = cm->cm_sc;
2173 MPI2_REQUEST_HEADER *req;
2174 MPI25_IEEE_SGE_CHAIN64 *ieee_sgc;
2175 struct mpr_chain *chain;
2176 int space, sgc_size, current_segs, rem_segs, segs_per_frame;
2177 uint8_t next_chain_offset = 0;
2178
2179 /*
2180 * Fail if a command is requesting a chain for SIMPLE SGE's. For SAS3
2181 * only IEEE commands should be requesting chains. Return some error
2182 * code other than 0.
2183 */
2184 if (cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE) {
| 31
32/* Communications core for LSI MPT2 */
33
34/* TODO Move headers to mprvar */
35#include <sys/types.h>
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/kernel.h>
39#include <sys/selinfo.h>
40#include <sys/lock.h>
41#include <sys/mutex.h>
42#include <sys/module.h>
43#include <sys/bus.h>
44#include <sys/conf.h>
45#include <sys/bio.h>
46#include <sys/malloc.h>
47#include <sys/uio.h>
48#include <sys/sysctl.h>
49#include <sys/queue.h>
50#include <sys/kthread.h>
51#include <sys/taskqueue.h>
52#include <sys/endian.h>
53#include <sys/eventhandler.h>
54
55#include <machine/bus.h>
56#include <machine/resource.h>
57#include <sys/rman.h>
58#include <sys/proc.h>
59
60#include <dev/pci/pcivar.h>
61
62#include <cam/cam.h>
63#include <cam/scsi/scsi_all.h>
64
65#include <dev/mpr/mpi/mpi2_type.h>
66#include <dev/mpr/mpi/mpi2.h>
67#include <dev/mpr/mpi/mpi2_ioc.h>
68#include <dev/mpr/mpi/mpi2_sas.h>
69#include <dev/mpr/mpi/mpi2_cnfg.h>
70#include <dev/mpr/mpi/mpi2_init.h>
71#include <dev/mpr/mpi/mpi2_tool.h>
72#include <dev/mpr/mpr_ioctl.h>
73#include <dev/mpr/mprvar.h>
74#include <dev/mpr/mpr_table.h>
75#include <dev/mpr/mpr_sas.h>
76
77static int mpr_diag_reset(struct mpr_softc *sc, int sleep_flag);
78static int mpr_init_queues(struct mpr_softc *sc);
79static int mpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag);
80static int mpr_transition_operational(struct mpr_softc *sc);
81static int mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching);
82static void mpr_iocfacts_free(struct mpr_softc *sc);
83static void mpr_startup(void *arg);
84static int mpr_send_iocinit(struct mpr_softc *sc);
85static int mpr_alloc_queues(struct mpr_softc *sc);
86static int mpr_alloc_replies(struct mpr_softc *sc);
87static int mpr_alloc_requests(struct mpr_softc *sc);
88static int mpr_attach_log(struct mpr_softc *sc);
89static __inline void mpr_complete_command(struct mpr_softc *sc,
90 struct mpr_command *cm);
91static void mpr_dispatch_event(struct mpr_softc *sc, uintptr_t data,
92 MPI2_EVENT_NOTIFICATION_REPLY *reply);
93static void mpr_config_complete(struct mpr_softc *sc,
94 struct mpr_command *cm);
95static void mpr_periodic(void *);
96static int mpr_reregister_events(struct mpr_softc *sc);
97static void mpr_enqueue_request(struct mpr_softc *sc,
98 struct mpr_command *cm);
99static int mpr_get_iocfacts(struct mpr_softc *sc,
100 MPI2_IOC_FACTS_REPLY *facts);
101static int mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag);
102SYSCTL_NODE(_hw, OID_AUTO, mpr, CTLFLAG_RD, 0, "MPR Driver Parameters");
103
104MALLOC_DEFINE(M_MPR, "mpr", "mpr driver memory");
105
106/*
107 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of
108 * any state and back to its initialization state machine.
109 */
110static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d };
111
112/*
113 * Added this union to smoothly convert le64toh cm->cm_desc.Words.
114 * Compiler only supports unint64_t to be passed as an argument.
115 * Otherwise it will through this error:
116 * "aggregate value used where an integer was expected"
117 */
118typedef union _reply_descriptor {
119 u64 word;
120 struct {
121 u32 low;
122 u32 high;
123 } u;
124}reply_descriptor,address_descriptor;
125
126/* Rate limit chain-fail messages to 1 per minute */
127static struct timeval mpr_chainfail_interval = { 60, 0 };
128
129/*
130 * sleep_flag can be either CAN_SLEEP or NO_SLEEP.
131 * If this function is called from process context, it can sleep
132 * and there is no harm to sleep, in case if this fuction is called
133 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set.
134 * based on sleep flags driver will call either msleep, pause or DELAY.
135 * msleep and pause are of same variant, but pause is used when mpr_mtx
136 * is not hold by driver.
137 */
138static int
139mpr_diag_reset(struct mpr_softc *sc,int sleep_flag)
140{
141 uint32_t reg;
142 int i, error, tries = 0;
143 uint8_t first_wait_done = FALSE;
144
145 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
146
147 /* Clear any pending interrupts */
148 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
149
150 /*
151 * Force NO_SLEEP for threads prohibited to sleep
152 * e.a Thread from interrupt handler are prohibited to sleep.
153 */
154#if __FreeBSD_version >= 1000029
155 if (curthread->td_no_sleeping)
156#else //__FreeBSD_version < 1000029
157 if (curthread->td_pflags & TDP_NOSLEEPING)
158#endif //__FreeBSD_version >= 1000029
159 sleep_flag = NO_SLEEP;
160
161 /* Push the magic sequence */
162 error = ETIMEDOUT;
163 while (tries++ < 20) {
164 for (i = 0; i < sizeof(mpt2_reset_magic); i++)
165 mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET,
166 mpt2_reset_magic[i]);
167
168 /* wait 100 msec */
169 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP)
170 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0,
171 "mprdiag", hz/10);
172 else if (sleep_flag == CAN_SLEEP)
173 pause("mprdiag", hz/10);
174 else
175 DELAY(100 * 1000);
176
177 reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
178 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) {
179 error = 0;
180 break;
181 }
182 }
183 if (error)
184 return (error);
185
186 /* Send the actual reset. XXX need to refresh the reg? */
187 mpr_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET,
188 reg | MPI2_DIAG_RESET_ADAPTER);
189
190 /* Wait up to 300 seconds in 50ms intervals */
191 error = ETIMEDOUT;
192 for (i = 0; i < 6000; i++) {
193 /*
194 * Wait 50 msec. If this is the first time through, wait 256
195 * msec to satisfy Diag Reset timing requirements.
196 */
197 if (first_wait_done) {
198 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP)
199 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0,
200 "mprdiag", hz/20);
201 else if (sleep_flag == CAN_SLEEP)
202 pause("mprdiag", hz/20);
203 else
204 DELAY(50 * 1000);
205 } else {
206 DELAY(256 * 1000);
207 first_wait_done = TRUE;
208 }
209 /*
210 * Check for the RESET_ADAPTER bit to be cleared first, then
211 * wait for the RESET state to be cleared, which takes a little
212 * longer.
213 */
214 reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
215 if (reg & MPI2_DIAG_RESET_ADAPTER) {
216 continue;
217 }
218 reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
219 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) {
220 error = 0;
221 break;
222 }
223 }
224 if (error)
225 return (error);
226
227 mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0);
228
229 return (0);
230}
231
232static int
233mpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag)
234{
235
236 MPR_FUNCTRACE(sc);
237
238 mpr_regwrite(sc, MPI2_DOORBELL_OFFSET,
239 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET <<
240 MPI2_DOORBELL_FUNCTION_SHIFT);
241
242 if (mpr_wait_db_ack(sc, 5, sleep_flag) != 0) {
243 mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed : <%s>\n",
244 __func__);
245 return (ETIMEDOUT);
246 }
247
248 return (0);
249}
250
251static int
252mpr_transition_ready(struct mpr_softc *sc)
253{
254 uint32_t reg, state;
255 int error, tries = 0;
256 int sleep_flags;
257
258 MPR_FUNCTRACE(sc);
259 /* If we are in attach call, do not sleep */
260 sleep_flags = (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE)
261 ? CAN_SLEEP : NO_SLEEP;
262
263 error = 0;
264 while (tries++ < 1200) {
265 reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
266 mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg);
267
268 /*
269 * Ensure the IOC is ready to talk. If it's not, try
270 * resetting it.
271 */
272 if (reg & MPI2_DOORBELL_USED) {
273 mpr_diag_reset(sc, sleep_flags);
274 DELAY(50000);
275 continue;
276 }
277
278 /* Is the adapter owned by another peer? */
279 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) ==
280 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) {
281 device_printf(sc->mpr_dev, "IOC is under the control "
282 "of another peer host, aborting initialization.\n");
283 return (ENXIO);
284 }
285
286 state = reg & MPI2_IOC_STATE_MASK;
287 if (state == MPI2_IOC_STATE_READY) {
288 /* Ready to go! */
289 error = 0;
290 break;
291 } else if (state == MPI2_IOC_STATE_FAULT) {
292 mpr_dprint(sc, MPR_FAULT, "IOC in fault state 0x%x\n",
293 state & MPI2_DOORBELL_FAULT_CODE_MASK);
294 mpr_diag_reset(sc, sleep_flags);
295 } else if (state == MPI2_IOC_STATE_OPERATIONAL) {
296 /* Need to take ownership */
297 mpr_message_unit_reset(sc, sleep_flags);
298 } else if (state == MPI2_IOC_STATE_RESET) {
299 /* Wait a bit, IOC might be in transition */
300 mpr_dprint(sc, MPR_FAULT,
301 "IOC in unexpected reset state\n");
302 } else {
303 mpr_dprint(sc, MPR_FAULT,
304 "IOC in unknown state 0x%x\n", state);
305 error = EINVAL;
306 break;
307 }
308
309 /* Wait 50ms for things to settle down. */
310 DELAY(50000);
311 }
312
313 if (error)
314 device_printf(sc->mpr_dev, "Cannot transition IOC to ready\n");
315
316 return (error);
317}
318
319static int
320mpr_transition_operational(struct mpr_softc *sc)
321{
322 uint32_t reg, state;
323 int error;
324
325 MPR_FUNCTRACE(sc);
326
327 error = 0;
328 reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
329 mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg);
330
331 state = reg & MPI2_IOC_STATE_MASK;
332 if (state != MPI2_IOC_STATE_READY) {
333 if ((error = mpr_transition_ready(sc)) != 0) {
334 mpr_dprint(sc, MPR_FAULT,
335 "%s failed to transition ready\n", __func__);
336 return (error);
337 }
338 }
339
340 error = mpr_send_iocinit(sc);
341 return (error);
342}
343
344/*
345 * This is called during attach and when re-initializing due to a Diag Reset.
346 * IOC Facts is used to allocate many of the structures needed by the driver.
347 * If called from attach, de-allocation is not required because the driver has
348 * not allocated any structures yet, but if called from a Diag Reset, previously
349 * allocated structures based on IOC Facts will need to be freed and re-
350 * allocated bases on the latest IOC Facts.
351 */
352static int
353mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching)
354{
355 int error, i;
356 Mpi2IOCFactsReply_t saved_facts;
357 uint8_t saved_mode, reallocating;
358 struct mprsas_lun *lun, *lun_tmp;
359 struct mprsas_target *targ;
360
361 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
362
363 /* Save old IOC Facts and then only reallocate if Facts have changed */
364 if (!attaching) {
365 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY));
366 }
367
368 /*
369 * Get IOC Facts. In all cases throughout this function, panic if doing
370 * a re-initialization and only return the error if attaching so the OS
371 * can handle it.
372 */
373 if ((error = mpr_get_iocfacts(sc, sc->facts)) != 0) {
374 if (attaching) {
375 mpr_dprint(sc, MPR_FAULT, "%s failed to get IOC Facts "
376 "with error %d\n", __func__, error);
377 return (error);
378 } else {
379 panic("%s failed to get IOC Facts with error %d\n",
380 __func__, error);
381 }
382 }
383
384 mpr_print_iocfacts(sc, sc->facts);
385
386 snprintf(sc->fw_version, sizeof(sc->fw_version),
387 "%02d.%02d.%02d.%02d",
388 sc->facts->FWVersion.Struct.Major,
389 sc->facts->FWVersion.Struct.Minor,
390 sc->facts->FWVersion.Struct.Unit,
391 sc->facts->FWVersion.Struct.Dev);
392
393 mpr_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version,
394 MPR_DRIVER_VERSION);
395 mpr_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities,
396 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf"
397 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR"
398 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc");
399
400 /*
401 * If the chip doesn't support event replay then a hard reset will be
402 * required to trigger a full discovery. Do the reset here then
403 * retransition to Ready. A hard reset might have already been done,
404 * but it doesn't hurt to do it again. Only do this if attaching, not
405 * for a Diag Reset.
406 */
407 if (attaching) {
408 if ((sc->facts->IOCCapabilities &
409 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) {
410 mpr_diag_reset(sc, NO_SLEEP);
411 if ((error = mpr_transition_ready(sc)) != 0) {
412 mpr_dprint(sc, MPR_FAULT, "%s failed to "
413 "transition to ready with error %d\n",
414 __func__, error);
415 return (error);
416 }
417 }
418 }
419
420 /*
421 * Set flag if IR Firmware is loaded. If the RAID Capability has
422 * changed from the previous IOC Facts, log a warning, but only if
423 * checking this after a Diag Reset and not during attach.
424 */
425 saved_mode = sc->ir_firmware;
426 if (sc->facts->IOCCapabilities &
427 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)
428 sc->ir_firmware = 1;
429 if (!attaching) {
430 if (sc->ir_firmware != saved_mode) {
431 mpr_dprint(sc, MPR_FAULT, "%s new IR/IT mode in IOC "
432 "Facts does not match previous mode\n", __func__);
433 }
434 }
435
436 /* Only deallocate and reallocate if relevant IOC Facts have changed */
437 reallocating = FALSE;
438 if ((!attaching) &&
439 ((saved_facts.MsgVersion != sc->facts->MsgVersion) ||
440 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) ||
441 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) ||
442 (saved_facts.RequestCredit != sc->facts->RequestCredit) ||
443 (saved_facts.ProductID != sc->facts->ProductID) ||
444 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) ||
445 (saved_facts.IOCRequestFrameSize !=
446 sc->facts->IOCRequestFrameSize) ||
447 (saved_facts.MaxTargets != sc->facts->MaxTargets) ||
448 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) ||
449 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) ||
450 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) ||
451 (saved_facts.MaxReplyDescriptorPostQueueDepth !=
452 sc->facts->MaxReplyDescriptorPostQueueDepth) ||
453 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) ||
454 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) ||
455 (saved_facts.MaxPersistentEntries !=
456 sc->facts->MaxPersistentEntries))) {
457 reallocating = TRUE;
458 }
459
460 /*
461 * Some things should be done if attaching or re-allocating after a Diag
462 * Reset, but are not needed after a Diag Reset if the FW has not
463 * changed.
464 */
465 if (attaching || reallocating) {
466 /*
467 * Check if controller supports FW diag buffers and set flag to
468 * enable each type.
469 */
470 if (sc->facts->IOCCapabilities &
471 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER)
472 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE].
473 enabled = TRUE;
474 if (sc->facts->IOCCapabilities &
475 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER)
476 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT].
477 enabled = TRUE;
478 if (sc->facts->IOCCapabilities &
479 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER)
480 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED].
481 enabled = TRUE;
482
483 /*
484 * Set flag if EEDP is supported and if TLR is supported.
485 */
486 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP)
487 sc->eedp_enabled = TRUE;
488 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR)
489 sc->control_TLR = TRUE;
490
491 /*
492 * Size the queues. Since the reply queues always need one free
493 * entry, we'll just deduct one reply message here.
494 */
495 sc->num_reqs = MIN(MPR_REQ_FRAMES, sc->facts->RequestCredit);
496 sc->num_replies = MIN(MPR_REPLY_FRAMES + MPR_EVT_REPLY_FRAMES,
497 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1;
498
499 /*
500 * Initialize all Tail Queues
501 */
502 TAILQ_INIT(&sc->req_list);
503 TAILQ_INIT(&sc->high_priority_req_list);
504 TAILQ_INIT(&sc->chain_list);
505 TAILQ_INIT(&sc->tm_list);
506 }
507
508 /*
509 * If doing a Diag Reset and the FW is significantly different
510 * (reallocating will be set above in IOC Facts comparison), then all
511 * buffers based on the IOC Facts will need to be freed before they are
512 * reallocated.
513 */
514 if (reallocating) {
515 mpr_iocfacts_free(sc);
516
517 /*
518 * The number of targets is based on IOC Facts, so free all of
519 * the allocated LUNs for each target and then the target buffer
520 * itself.
521 */
522 for (i=0; i< saved_facts.MaxTargets; i++) {
523 targ = &sc->sassc->targets[i];
524 SLIST_FOREACH_SAFE(lun, &targ->luns, lun_link,
525 lun_tmp) {
526 free(lun, M_MPR);
527 }
528 }
529 free(sc->sassc->targets, M_MPR);
530
531 sc->sassc->targets = malloc(sizeof(struct mprsas_target) *
532 sc->facts->MaxTargets, M_MPR, M_WAITOK|M_ZERO);
533 if (!sc->sassc->targets) {
534 panic("%s failed to alloc targets with error %d\n",
535 __func__, ENOMEM);
536 }
537 }
538
539 /*
540 * Any deallocation has been completed. Now start reallocating
541 * if needed. Will only need to reallocate if attaching or if the new
542 * IOC Facts are different from the previous IOC Facts after a Diag
543 * Reset. Targets have already been allocated above if needed.
544 */
545 if (attaching || reallocating) {
546 if (((error = mpr_alloc_queues(sc)) != 0) ||
547 ((error = mpr_alloc_replies(sc)) != 0) ||
548 ((error = mpr_alloc_requests(sc)) != 0)) {
549 if (attaching ) {
550 mpr_dprint(sc, MPR_FAULT, "%s failed to alloc "
551 "queues with error %d\n", __func__, error);
552 mpr_free(sc);
553 return (error);
554 } else {
555 panic("%s failed to alloc queues with error "
556 "%d\n", __func__, error);
557 }
558 }
559 }
560
561 /* Always initialize the queues */
562 bzero(sc->free_queue, sc->fqdepth * 4);
563 mpr_init_queues(sc);
564
565 /*
566 * Always get the chip out of the reset state, but only panic if not
567 * attaching. If attaching and there is an error, that is handled by
568 * the OS.
569 */
570 error = mpr_transition_operational(sc);
571 if (error != 0) {
572 if (attaching) {
573 mpr_printf(sc, "%s failed to transition to "
574 "operational with error %d\n", __func__, error);
575 mpr_free(sc);
576 return (error);
577 } else {
578 panic("%s failed to transition to operational with "
579 "error %d\n", __func__, error);
580 }
581 }
582
583 /*
584 * Finish the queue initialization.
585 * These are set here instead of in mpr_init_queues() because the
586 * IOC resets these values during the state transition in
587 * mpr_transition_operational(). The free index is set to 1
588 * because the corresponding index in the IOC is set to 0, and the
589 * IOC treats the queues as full if both are set to the same value.
590 * Hence the reason that the queue can't hold all of the possible
591 * replies.
592 */
593 sc->replypostindex = 0;
594 mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
595 mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0);
596
597 /*
598 * Attach the subsystems so they can prepare their event masks.
599 */
600 /* XXX Should be dynamic so that IM/IR and user modules can attach */
601 if (attaching) {
602 if (((error = mpr_attach_log(sc)) != 0) ||
603 ((error = mpr_attach_sas(sc)) != 0) ||
604 ((error = mpr_attach_user(sc)) != 0)) {
605 mpr_printf(sc, "%s failed to attach all subsystems: "
606 "error %d\n", __func__, error);
607 mpr_free(sc);
608 return (error);
609 }
610
611 if ((error = mpr_pci_setup_interrupts(sc)) != 0) {
612 mpr_printf(sc, "%s failed to setup interrupts\n",
613 __func__);
614 mpr_free(sc);
615 return (error);
616 }
617 }
618
619 return (error);
620}
621
622/*
623 * This is called if memory is being free (during detach for example) and when
624 * buffers need to be reallocated due to a Diag Reset.
625 */
626static void
627mpr_iocfacts_free(struct mpr_softc *sc)
628{
629 struct mpr_command *cm;
630 int i;
631
632 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
633
634 if (sc->free_busaddr != 0)
635 bus_dmamap_unload(sc->queues_dmat, sc->queues_map);
636 if (sc->free_queue != NULL)
637 bus_dmamem_free(sc->queues_dmat, sc->free_queue,
638 sc->queues_map);
639 if (sc->queues_dmat != NULL)
640 bus_dma_tag_destroy(sc->queues_dmat);
641
642 if (sc->chain_busaddr != 0)
643 bus_dmamap_unload(sc->chain_dmat, sc->chain_map);
644 if (sc->chain_frames != NULL)
645 bus_dmamem_free(sc->chain_dmat, sc->chain_frames,
646 sc->chain_map);
647 if (sc->chain_dmat != NULL)
648 bus_dma_tag_destroy(sc->chain_dmat);
649
650 if (sc->sense_busaddr != 0)
651 bus_dmamap_unload(sc->sense_dmat, sc->sense_map);
652 if (sc->sense_frames != NULL)
653 bus_dmamem_free(sc->sense_dmat, sc->sense_frames,
654 sc->sense_map);
655 if (sc->sense_dmat != NULL)
656 bus_dma_tag_destroy(sc->sense_dmat);
657
658 if (sc->reply_busaddr != 0)
659 bus_dmamap_unload(sc->reply_dmat, sc->reply_map);
660 if (sc->reply_frames != NULL)
661 bus_dmamem_free(sc->reply_dmat, sc->reply_frames,
662 sc->reply_map);
663 if (sc->reply_dmat != NULL)
664 bus_dma_tag_destroy(sc->reply_dmat);
665
666 if (sc->req_busaddr != 0)
667 bus_dmamap_unload(sc->req_dmat, sc->req_map);
668 if (sc->req_frames != NULL)
669 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map);
670 if (sc->req_dmat != NULL)
671 bus_dma_tag_destroy(sc->req_dmat);
672
673 if (sc->chains != NULL)
674 free(sc->chains, M_MPR);
675 if (sc->commands != NULL) {
676 for (i = 1; i < sc->num_reqs; i++) {
677 cm = &sc->commands[i];
678 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap);
679 }
680 free(sc->commands, M_MPR);
681 }
682 if (sc->buffer_dmat != NULL)
683 bus_dma_tag_destroy(sc->buffer_dmat);
684}
685
686/*
687 * The terms diag reset and hard reset are used interchangeably in the MPI
688 * docs to mean resetting the controller chip. In this code diag reset
689 * cleans everything up, and the hard reset function just sends the reset
690 * sequence to the chip. This should probably be refactored so that every
691 * subsystem gets a reset notification of some sort, and can clean up
692 * appropriately.
693 */
694int
695mpr_reinit(struct mpr_softc *sc)
696{
697 int error;
698 struct mprsas_softc *sassc;
699
700 sassc = sc->sassc;
701
702 MPR_FUNCTRACE(sc);
703
704 mtx_assert(&sc->mpr_mtx, MA_OWNED);
705
706 if (sc->mpr_flags & MPR_FLAGS_DIAGRESET) {
707 mpr_dprint(sc, MPR_INIT, "%s reset already in progress\n",
708 __func__);
709 return 0;
710 }
711
712 mpr_dprint(sc, MPR_INFO, "Reinitializing controller,\n");
713 /* make sure the completion callbacks can recognize they're getting
714 * a NULL cm_reply due to a reset.
715 */
716 sc->mpr_flags |= MPR_FLAGS_DIAGRESET;
717
718 /*
719 * Mask interrupts here.
720 */
721 mpr_dprint(sc, MPR_INIT, "%s mask interrupts\n", __func__);
722 mpr_mask_intr(sc);
723
724 error = mpr_diag_reset(sc, CAN_SLEEP);
725 if (error != 0) {
726 panic("%s hard reset failed with error %d\n", __func__, error);
727 }
728
729 /* Restore the PCI state, including the MSI-X registers */
730 mpr_pci_restore(sc);
731
732 /* Give the I/O subsystem special priority to get itself prepared */
733 mprsas_handle_reinit(sc);
734
735 /*
736 * Get IOC Facts and allocate all structures based on this information.
737 * The attach function will also call mpr_iocfacts_allocate at startup.
738 * If relevant values have changed in IOC Facts, this function will free
739 * all of the memory based on IOC Facts and reallocate that memory.
740 */
741 if ((error = mpr_iocfacts_allocate(sc, FALSE)) != 0) {
742 panic("%s IOC Facts based allocation failed with error %d\n",
743 __func__, error);
744 }
745
746 /*
747 * Mapping structures will be re-allocated after getting IOC Page8, so
748 * free these structures here.
749 */
750 mpr_mapping_exit(sc);
751
752 /*
753 * The static page function currently read is IOC Page8. Others can be
754 * added in future. It's possible that the values in IOC Page8 have
755 * changed after a Diag Reset due to user modification, so always read
756 * these. Interrupts are masked, so unmask them before getting config
757 * pages.
758 */
759 mpr_unmask_intr(sc);
760 sc->mpr_flags &= ~MPR_FLAGS_DIAGRESET;
761 mpr_base_static_config_pages(sc);
762
763 /*
764 * Some mapping info is based in IOC Page8 data, so re-initialize the
765 * mapping tables.
766 */
767 mpr_mapping_initialize(sc);
768
769 /*
770 * Restart will reload the event masks clobbered by the reset, and
771 * then enable the port.
772 */
773 mpr_reregister_events(sc);
774
775 /* the end of discovery will release the simq, so we're done. */
776 mpr_dprint(sc, MPR_INFO, "%s finished sc %p post %u free %u\n",
777 __func__, sc, sc->replypostindex, sc->replyfreeindex);
778 mprsas_release_simq_reinit(sassc);
779
780 return 0;
781}
782
783/* Wait for the chip to ACK a word that we've put into its FIFO
784 * Wait for <timeout> seconds. In single loop wait for busy loop
785 * for 500 microseconds.
786 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds.
787 * */
788static int
789mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag)
790{
791 u32 cntdn, count;
792 u32 int_status;
793 u32 doorbell;
794
795 count = 0;
796 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
797 do {
798 int_status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
799 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
800 mpr_dprint(sc, MPR_INIT, "%s: successful count(%d), "
801 "timeout(%d)\n", __func__, count, timeout);
802 return 0;
803 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
804 doorbell = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
805 if ((doorbell & MPI2_IOC_STATE_MASK) ==
806 MPI2_IOC_STATE_FAULT) {
807 mpr_dprint(sc, MPR_FAULT,
808 "fault_state(0x%04x)!\n", doorbell);
809 return (EFAULT);
810 }
811 } else if (int_status == 0xFFFFFFFF)
812 goto out;
813
814 /*
815 * If it can sleep, sleep for 1 milisecond, else busy loop for
816 * 0.5 milisecond
817 */
818 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP)
819 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, "mprdba", hz/1000);
820 else if (sleep_flag == CAN_SLEEP)
821 pause("mprdba", hz/1000);
822 else
823 DELAY(500);
824 count++;
825 } while (--cntdn);
826
827 out:
828 mpr_dprint(sc, MPR_FAULT, "%s: failed due to timeout count(%d), "
829 "int_status(%x)!\n", __func__, count, int_status);
830 return (ETIMEDOUT);
831}
832
833/* Wait for the chip to signal that the next word in its FIFO can be fetched */
834static int
835mpr_wait_db_int(struct mpr_softc *sc)
836{
837 int retry;
838
839 for (retry = 0; retry < MPR_DB_MAX_WAIT; retry++) {
840 if ((mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
841 MPI2_HIS_IOC2SYS_DB_STATUS) != 0)
842 return (0);
843 DELAY(2000);
844 }
845 return (ETIMEDOUT);
846}
847
848/* Step through the synchronous command state machine, i.e. "Doorbell mode" */
849static int
850mpr_request_sync(struct mpr_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply,
851 int req_sz, int reply_sz, int timeout)
852{
853 uint32_t *data32;
854 uint16_t *data16;
855 int i, count, ioc_sz, residual;
856 int sleep_flags = CAN_SLEEP;
857
858#if __FreeBSD_version >= 1000029
859 if (curthread->td_no_sleeping)
860#else //__FreeBSD_version < 1000029
861 if (curthread->td_pflags & TDP_NOSLEEPING)
862#endif //__FreeBSD_version >= 1000029
863 sleep_flags = NO_SLEEP;
864
865 /* Step 1 */
866 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
867
868 /* Step 2 */
869 if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
870 return (EBUSY);
871
872 /* Step 3
873 * Announce that a message is coming through the doorbell. Messages
874 * are pushed at 32bit words, so round up if needed.
875 */
876 count = (req_sz + 3) / 4;
877 mpr_regwrite(sc, MPI2_DOORBELL_OFFSET,
878 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
879 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT));
880
881 /* Step 4 */
882 if (mpr_wait_db_int(sc) ||
883 (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) {
884 mpr_dprint(sc, MPR_FAULT, "Doorbell failed to activate\n");
885 return (ENXIO);
886 }
887 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
888 if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) {
889 mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed\n");
890 return (ENXIO);
891 }
892
893 /* Step 5 */
894 /* Clock out the message data synchronously in 32-bit dwords*/
895 data32 = (uint32_t *)req;
896 for (i = 0; i < count; i++) {
897 mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i]));
898 if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) {
899 mpr_dprint(sc, MPR_FAULT,
900 "Timeout while writing doorbell\n");
901 return (ENXIO);
902 }
903 }
904
905 /* Step 6 */
906 /* Clock in the reply in 16-bit words. The total length of the
907 * message is always in the 4th byte, so clock out the first 2 words
908 * manually, then loop the rest.
909 */
910 data16 = (uint16_t *)reply;
911 if (mpr_wait_db_int(sc) != 0) {
912 mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 0\n");
913 return (ENXIO);
914 }
915 data16[0] =
916 mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
917 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
918 if (mpr_wait_db_int(sc) != 0) {
919 mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 1\n");
920 return (ENXIO);
921 }
922 data16[1] =
923 mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
924 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
925
926 /* Number of 32bit words in the message */
927 ioc_sz = reply->MsgLength;
928
929 /*
930 * Figure out how many 16bit words to clock in without overrunning.
931 * The precision loss with dividing reply_sz can safely be
932 * ignored because the messages can only be multiples of 32bits.
933 */
934 residual = 0;
935 count = MIN((reply_sz / 4), ioc_sz) * 2;
936 if (count < ioc_sz * 2) {
937 residual = ioc_sz * 2 - count;
938 mpr_dprint(sc, MPR_ERROR, "Driver error, throwing away %d "
939 "residual message words\n", residual);
940 }
941
942 for (i = 2; i < count; i++) {
943 if (mpr_wait_db_int(sc) != 0) {
944 mpr_dprint(sc, MPR_FAULT,
945 "Timeout reading doorbell %d\n", i);
946 return (ENXIO);
947 }
948 data16[i] = mpr_regread(sc, MPI2_DOORBELL_OFFSET) &
949 MPI2_DOORBELL_DATA_MASK;
950 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
951 }
952
953 /*
954 * Pull out residual words that won't fit into the provided buffer.
955 * This keeps the chip from hanging due to a driver programming
956 * error.
957 */
958 while (residual--) {
959 if (mpr_wait_db_int(sc) != 0) {
960 mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell\n");
961 return (ENXIO);
962 }
963 (void)mpr_regread(sc, MPI2_DOORBELL_OFFSET);
964 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
965 }
966
967 /* Step 7 */
968 if (mpr_wait_db_int(sc) != 0) {
969 mpr_dprint(sc, MPR_FAULT, "Timeout waiting to exit doorbell\n");
970 return (ENXIO);
971 }
972 if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
973 mpr_dprint(sc, MPR_FAULT, "Warning, doorbell still active\n");
974 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
975
976 return (0);
977}
978
979static void
980mpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm)
981{
982 reply_descriptor rd;
983
984 MPR_FUNCTRACE(sc);
985 mpr_dprint(sc, MPR_TRACE, "%s SMID %u cm %p ccb %p\n", __func__,
986 cm->cm_desc.Default.SMID, cm, cm->cm_ccb);
987
988 if (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE && !(sc->mpr_flags &
989 MPR_FLAGS_SHUTDOWN))
990 mtx_assert(&sc->mpr_mtx, MA_OWNED);
991
992 if (++sc->io_cmds_active > sc->io_cmds_highwater)
993 sc->io_cmds_highwater++;
994
995 rd.u.low = cm->cm_desc.Words.Low;
996 rd.u.high = cm->cm_desc.Words.High;
997 rd.word = htole64(rd.word);
998 /* TODO-We may need to make below regwrite atomic */
999 mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET,
1000 rd.u.low);
1001 mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET,
1002 rd.u.high);
1003}
1004
1005/*
1006 * Just the FACTS, ma'am.
1007 */
1008static int
1009mpr_get_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
1010{
1011 MPI2_DEFAULT_REPLY *reply;
1012 MPI2_IOC_FACTS_REQUEST request;
1013 int error, req_sz, reply_sz;
1014
1015 MPR_FUNCTRACE(sc);
1016
1017 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST);
1018 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY);
1019 reply = (MPI2_DEFAULT_REPLY *)facts;
1020
1021 bzero(&request, req_sz);
1022 request.Function = MPI2_FUNCTION_IOC_FACTS;
1023 error = mpr_request_sync(sc, &request, reply, req_sz, reply_sz, 5);
1024
1025 return (error);
1026}
1027
1028static int
1029mpr_send_iocinit(struct mpr_softc *sc)
1030{
1031 MPI2_IOC_INIT_REQUEST init;
1032 MPI2_DEFAULT_REPLY reply;
1033 int req_sz, reply_sz, error;
1034 struct timeval now;
1035 uint64_t time_in_msec;
1036
1037 MPR_FUNCTRACE(sc);
1038
1039 req_sz = sizeof(MPI2_IOC_INIT_REQUEST);
1040 reply_sz = sizeof(MPI2_IOC_INIT_REPLY);
1041 bzero(&init, req_sz);
1042 bzero(&reply, reply_sz);
1043
1044 /*
1045 * Fill in the init block. Note that most addresses are
1046 * deliberately in the lower 32bits of memory. This is a micro-
1047 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe.
1048 */
1049 init.Function = MPI2_FUNCTION_IOC_INIT;
1050 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
1051 init.MsgVersion = htole16(MPI2_VERSION);
1052 init.HeaderVersion = htole16(MPI2_HEADER_VERSION);
1053 init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize);
1054 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth);
1055 init.ReplyFreeQueueDepth = htole16(sc->fqdepth);
1056 init.SenseBufferAddressHigh = 0;
1057 init.SystemReplyAddressHigh = 0;
1058 init.SystemRequestFrameBaseAddress.High = 0;
1059 init.SystemRequestFrameBaseAddress.Low =
1060 htole32((uint32_t)sc->req_busaddr);
1061 init.ReplyDescriptorPostQueueAddress.High = 0;
1062 init.ReplyDescriptorPostQueueAddress.Low =
1063 htole32((uint32_t)sc->post_busaddr);
1064 init.ReplyFreeQueueAddress.High = 0;
1065 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr);
1066 getmicrotime(&now);
1067 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000);
1068 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF);
1069 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF);
1070
1071 error = mpr_request_sync(sc, &init, &reply, req_sz, reply_sz, 5);
1072 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
1073 error = ENXIO;
1074
1075 mpr_dprint(sc, MPR_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus);
1076 return (error);
1077}
1078
1079void
1080mpr_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1081{
1082 bus_addr_t *addr;
1083
1084 addr = arg;
1085 *addr = segs[0].ds_addr;
1086}
1087
1088static int
1089mpr_alloc_queues(struct mpr_softc *sc)
1090{
1091 bus_addr_t queues_busaddr;
1092 uint8_t *queues;
1093 int qsize, fqsize, pqsize;
1094
1095 /*
1096 * The reply free queue contains 4 byte entries in multiples of 16 and
1097 * aligned on a 16 byte boundary. There must always be an unused entry.
1098 * This queue supplies fresh reply frames for the firmware to use.
1099 *
1100 * The reply descriptor post queue contains 8 byte entries in
1101 * multiples of 16 and aligned on a 16 byte boundary. This queue
1102 * contains filled-in reply frames sent from the firmware to the host.
1103 *
1104 * These two queues are allocated together for simplicity.
1105 */
1106 sc->fqdepth = roundup2((sc->num_replies + 1), 16);
1107 sc->pqdepth = roundup2((sc->num_replies + 1), 16);
1108 fqsize= sc->fqdepth * 4;
1109 pqsize = sc->pqdepth * 8;
1110 qsize = fqsize + pqsize;
1111
1112 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1113 16, 0, /* algnmnt, boundary */
1114 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1115 BUS_SPACE_MAXADDR, /* highaddr */
1116 NULL, NULL, /* filter, filterarg */
1117 qsize, /* maxsize */
1118 1, /* nsegments */
1119 qsize, /* maxsegsize */
1120 0, /* flags */
1121 NULL, NULL, /* lockfunc, lockarg */
1122 &sc->queues_dmat)) {
1123 device_printf(sc->mpr_dev, "Cannot allocate queues DMA tag\n");
1124 return (ENOMEM);
1125 }
1126 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT,
1127 &sc->queues_map)) {
1128 device_printf(sc->mpr_dev, "Cannot allocate queues memory\n");
1129 return (ENOMEM);
1130 }
1131 bzero(queues, qsize);
1132 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
1133 mpr_memaddr_cb, &queues_busaddr, 0);
1134
1135 sc->free_queue = (uint32_t *)queues;
1136 sc->free_busaddr = queues_busaddr;
1137 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize);
1138 sc->post_busaddr = queues_busaddr + fqsize;
1139
1140 return (0);
1141}
1142
1143static int
1144mpr_alloc_replies(struct mpr_softc *sc)
1145{
1146 int rsize, num_replies;
1147
1148 /*
1149 * sc->num_replies should be one less than sc->fqdepth. We need to
1150 * allocate space for sc->fqdepth replies, but only sc->num_replies
1151 * replies can be used at once.
1152 */
1153 num_replies = max(sc->fqdepth, sc->num_replies);
1154
1155 rsize = sc->facts->ReplyFrameSize * num_replies * 4;
1156 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1157 4, 0, /* algnmnt, boundary */
1158 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1159 BUS_SPACE_MAXADDR, /* highaddr */
1160 NULL, NULL, /* filter, filterarg */
1161 rsize, /* maxsize */
1162 1, /* nsegments */
1163 rsize, /* maxsegsize */
1164 0, /* flags */
1165 NULL, NULL, /* lockfunc, lockarg */
1166 &sc->reply_dmat)) {
1167 device_printf(sc->mpr_dev, "Cannot allocate replies DMA tag\n");
1168 return (ENOMEM);
1169 }
1170 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames,
1171 BUS_DMA_NOWAIT, &sc->reply_map)) {
1172 device_printf(sc->mpr_dev, "Cannot allocate replies memory\n");
1173 return (ENOMEM);
1174 }
1175 bzero(sc->reply_frames, rsize);
1176 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize,
1177 mpr_memaddr_cb, &sc->reply_busaddr, 0);
1178
1179 return (0);
1180}
1181
1182static int
1183mpr_alloc_requests(struct mpr_softc *sc)
1184{
1185 struct mpr_command *cm;
1186 struct mpr_chain *chain;
1187 int i, rsize, nsegs;
1188
1189 rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4;
1190 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1191 16, 0, /* algnmnt, boundary */
1192 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1193 BUS_SPACE_MAXADDR, /* highaddr */
1194 NULL, NULL, /* filter, filterarg */
1195 rsize, /* maxsize */
1196 1, /* nsegments */
1197 rsize, /* maxsegsize */
1198 0, /* flags */
1199 NULL, NULL, /* lockfunc, lockarg */
1200 &sc->req_dmat)) {
1201 device_printf(sc->mpr_dev, "Cannot allocate request DMA tag\n");
1202 return (ENOMEM);
1203 }
1204 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames,
1205 BUS_DMA_NOWAIT, &sc->req_map)) {
1206 device_printf(sc->mpr_dev, "Cannot allocate request memory\n");
1207 return (ENOMEM);
1208 }
1209 bzero(sc->req_frames, rsize);
1210 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize,
1211 mpr_memaddr_cb, &sc->req_busaddr, 0);
1212
1213 rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4;
1214 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1215 16, 0, /* algnmnt, boundary */
1216 BUS_SPACE_MAXADDR, /* lowaddr */
1217 BUS_SPACE_MAXADDR, /* highaddr */
1218 NULL, NULL, /* filter, filterarg */
1219 rsize, /* maxsize */
1220 1, /* nsegments */
1221 rsize, /* maxsegsize */
1222 0, /* flags */
1223 NULL, NULL, /* lockfunc, lockarg */
1224 &sc->chain_dmat)) {
1225 device_printf(sc->mpr_dev, "Cannot allocate chain DMA tag\n");
1226 return (ENOMEM);
1227 }
1228 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames,
1229 BUS_DMA_NOWAIT, &sc->chain_map)) {
1230 device_printf(sc->mpr_dev, "Cannot allocate chain memory\n");
1231 return (ENOMEM);
1232 }
1233 bzero(sc->chain_frames, rsize);
1234 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize,
1235 mpr_memaddr_cb, &sc->chain_busaddr, 0);
1236
1237 rsize = MPR_SENSE_LEN * sc->num_reqs;
1238 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1239 1, 0, /* algnmnt, boundary */
1240 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1241 BUS_SPACE_MAXADDR, /* highaddr */
1242 NULL, NULL, /* filter, filterarg */
1243 rsize, /* maxsize */
1244 1, /* nsegments */
1245 rsize, /* maxsegsize */
1246 0, /* flags */
1247 NULL, NULL, /* lockfunc, lockarg */
1248 &sc->sense_dmat)) {
1249 device_printf(sc->mpr_dev, "Cannot allocate sense DMA tag\n");
1250 return (ENOMEM);
1251 }
1252 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames,
1253 BUS_DMA_NOWAIT, &sc->sense_map)) {
1254 device_printf(sc->mpr_dev, "Cannot allocate sense memory\n");
1255 return (ENOMEM);
1256 }
1257 bzero(sc->sense_frames, rsize);
1258 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize,
1259 mpr_memaddr_cb, &sc->sense_busaddr, 0);
1260
1261 sc->chains = malloc(sizeof(struct mpr_chain) * sc->max_chains, M_MPR,
1262 M_WAITOK | M_ZERO);
1263 if (!sc->chains) {
1264 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
1265 __func__, __LINE__);
1266 return (ENOMEM);
1267 }
1268 for (i = 0; i < sc->max_chains; i++) {
1269 chain = &sc->chains[i];
1270 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames +
1271 i * sc->facts->IOCRequestFrameSize * 4);
1272 chain->chain_busaddr = sc->chain_busaddr +
1273 i * sc->facts->IOCRequestFrameSize * 4;
1274 mpr_free_chain(sc, chain);
1275 sc->chain_free_lowwater++;
1276 }
1277
1278 /* XXX Need to pick a more precise value */
1279 nsegs = (MAXPHYS / PAGE_SIZE) + 1;
1280 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1281 1, 0, /* algnmnt, boundary */
1282 BUS_SPACE_MAXADDR, /* lowaddr */
1283 BUS_SPACE_MAXADDR, /* highaddr */
1284 NULL, NULL, /* filter, filterarg */
1285 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
1286 nsegs, /* nsegments */
1287 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
1288 BUS_DMA_ALLOCNOW, /* flags */
1289 busdma_lock_mutex, /* lockfunc */
1290 &sc->mpr_mtx, /* lockarg */
1291 &sc->buffer_dmat)) {
1292 device_printf(sc->mpr_dev, "Cannot allocate buffer DMA tag\n");
1293 return (ENOMEM);
1294 }
1295
1296 /*
1297 * SMID 0 cannot be used as a free command per the firmware spec.
1298 * Just drop that command instead of risking accounting bugs.
1299 */
1300 sc->commands = malloc(sizeof(struct mpr_command) * sc->num_reqs,
1301 M_MPR, M_WAITOK | M_ZERO);
1302 if (!sc->commands) {
1303 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
1304 __func__, __LINE__);
1305 return (ENOMEM);
1306 }
1307 for (i = 1; i < sc->num_reqs; i++) {
1308 cm = &sc->commands[i];
1309 cm->cm_req = sc->req_frames +
1310 i * sc->facts->IOCRequestFrameSize * 4;
1311 cm->cm_req_busaddr = sc->req_busaddr +
1312 i * sc->facts->IOCRequestFrameSize * 4;
1313 cm->cm_sense = &sc->sense_frames[i];
1314 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPR_SENSE_LEN;
1315 cm->cm_desc.Default.SMID = i;
1316 cm->cm_sc = sc;
1317 TAILQ_INIT(&cm->cm_chain_list);
1318 callout_init_mtx(&cm->cm_callout, &sc->mpr_mtx, 0);
1319
1320 /* XXX Is a failure here a critical problem? */
1321 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0)
1322 if (i <= sc->facts->HighPriorityCredit)
1323 mpr_free_high_priority_command(sc, cm);
1324 else
1325 mpr_free_command(sc, cm);
1326 else {
1327 panic("failed to allocate command %d\n", i);
1328 sc->num_reqs = i;
1329 break;
1330 }
1331 }
1332
1333 return (0);
1334}
1335
1336static int
1337mpr_init_queues(struct mpr_softc *sc)
1338{
1339 int i;
1340
1341 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8);
1342
1343 /*
1344 * According to the spec, we need to use one less reply than we
1345 * have space for on the queue. So sc->num_replies (the number we
1346 * use) should be less than sc->fqdepth (allocated size).
1347 */
1348 if (sc->num_replies >= sc->fqdepth)
1349 return (EINVAL);
1350
1351 /*
1352 * Initialize all of the free queue entries.
1353 */
1354 for (i = 0; i < sc->fqdepth; i++)
1355 sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4);
1356 sc->replyfreeindex = sc->num_replies;
1357
1358 return (0);
1359}
1360
1361/* Get the driver parameter tunables. Lowest priority are the driver defaults.
1362 * Next are the global settings, if they exist. Highest are the per-unit
1363 * settings, if they exist.
1364 */
1365static void
1366mpr_get_tunables(struct mpr_softc *sc)
1367{
1368 char tmpstr[80];
1369
1370 /* XXX default to some debugging for now */
1371 sc->mpr_debug = MPR_INFO | MPR_FAULT;
1372 sc->disable_msix = 0;
1373 sc->disable_msi = 0;
1374 sc->max_chains = MPR_CHAIN_FRAMES;
1375
1376 /*
1377 * Grab the global variables.
1378 */
1379 TUNABLE_INT_FETCH("hw.mpr.debug_level", &sc->mpr_debug);
1380 TUNABLE_INT_FETCH("hw.mpr.disable_msix", &sc->disable_msix);
1381 TUNABLE_INT_FETCH("hw.mpr.disable_msi", &sc->disable_msi);
1382 TUNABLE_INT_FETCH("hw.mpr.max_chains", &sc->max_chains);
1383
1384 /* Grab the unit-instance variables */
1385 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.debug_level",
1386 device_get_unit(sc->mpr_dev));
1387 TUNABLE_INT_FETCH(tmpstr, &sc->mpr_debug);
1388
1389 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msix",
1390 device_get_unit(sc->mpr_dev));
1391 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix);
1392
1393 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msi",
1394 device_get_unit(sc->mpr_dev));
1395 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi);
1396
1397 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.max_chains",
1398 device_get_unit(sc->mpr_dev));
1399 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains);
1400
1401 bzero(sc->exclude_ids, sizeof(sc->exclude_ids));
1402 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.exclude_ids",
1403 device_get_unit(sc->mpr_dev));
1404 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids));
1405}
1406
1407static void
1408mpr_setup_sysctl(struct mpr_softc *sc)
1409{
1410 struct sysctl_ctx_list *sysctl_ctx = NULL;
1411 struct sysctl_oid *sysctl_tree = NULL;
1412 char tmpstr[80], tmpstr2[80];
1413
1414 /*
1415 * Setup the sysctl variable so the user can change the debug level
1416 * on the fly.
1417 */
1418 snprintf(tmpstr, sizeof(tmpstr), "MPR controller %d",
1419 device_get_unit(sc->mpr_dev));
1420 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mpr_dev));
1421
1422 sysctl_ctx = device_get_sysctl_ctx(sc->mpr_dev);
1423 if (sysctl_ctx != NULL)
1424 sysctl_tree = device_get_sysctl_tree(sc->mpr_dev);
1425
1426 if (sysctl_tree == NULL) {
1427 sysctl_ctx_init(&sc->sysctl_ctx);
1428 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
1429 SYSCTL_STATIC_CHILDREN(_hw_mpr), OID_AUTO, tmpstr2,
1430 CTLFLAG_RD, 0, tmpstr);
1431 if (sc->sysctl_tree == NULL)
1432 return;
1433 sysctl_ctx = &sc->sysctl_ctx;
1434 sysctl_tree = sc->sysctl_tree;
1435 }
1436
1437 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1438 OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mpr_debug, 0,
1439 "mpr debug level");
1440
1441 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1442 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0,
1443 "Disable the use of MSI-X interrupts");
1444
1445 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1446 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0,
1447 "Disable the use of MSI interrupts");
1448
1449 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1450 OID_AUTO, "firmware_version", CTLFLAG_RW, &sc->fw_version,
1451 strlen(sc->fw_version), "firmware version");
1452
1453 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1454 OID_AUTO, "driver_version", CTLFLAG_RW, MPR_DRIVER_VERSION,
1455 strlen(MPR_DRIVER_VERSION), "driver version");
1456
1457 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1458 OID_AUTO, "io_cmds_active", CTLFLAG_RD,
1459 &sc->io_cmds_active, 0, "number of currently active commands");
1460
1461 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1462 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD,
1463 &sc->io_cmds_highwater, 0, "maximum active commands seen");
1464
1465 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1466 OID_AUTO, "chain_free", CTLFLAG_RD,
1467 &sc->chain_free, 0, "number of free chain elements");
1468
1469 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1470 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD,
1471 &sc->chain_free_lowwater, 0,"lowest number of free chain elements");
1472
1473 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1474 OID_AUTO, "max_chains", CTLFLAG_RD,
1475 &sc->max_chains, 0,"maximum chain frames that will be allocated");
1476
1477#if __FreeBSD_version >= 900030
1478 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1479 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD,
1480 &sc->chain_alloc_fail, "chain allocation failures");
1481#endif //FreeBSD_version >= 900030
1482}
1483
1484int
1485mpr_attach(struct mpr_softc *sc)
1486{
1487 int error;
1488
1489 mpr_get_tunables(sc);
1490
1491 MPR_FUNCTRACE(sc);
1492
1493 mtx_init(&sc->mpr_mtx, "MPR lock", NULL, MTX_DEF);
1494 callout_init_mtx(&sc->periodic, &sc->mpr_mtx, 0);
1495 TAILQ_INIT(&sc->event_list);
1496 timevalclear(&sc->lastfail);
1497
1498 if ((error = mpr_transition_ready(sc)) != 0) {
1499 mpr_printf(sc, "%s failed to transition ready\n", __func__);
1500 return (error);
1501 }
1502
1503 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPR,
1504 M_ZERO|M_NOWAIT);
1505 if (!sc->facts) {
1506 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
1507 __func__, __LINE__);
1508 return (ENOMEM);
1509 }
1510
1511 /*
1512 * Get IOC Facts and allocate all structures based on this information.
1513 * A Diag Reset will also call mpr_iocfacts_allocate and re-read the IOC
1514 * Facts. If relevant values have changed in IOC Facts, this function
1515 * will free all of the memory based on IOC Facts and reallocate that
1516 * memory. If this fails, any allocated memory should already be freed.
1517 */
1518 if ((error = mpr_iocfacts_allocate(sc, TRUE)) != 0) {
1519 mpr_dprint(sc, MPR_FAULT, "%s IOC Facts based allocation "
1520 "failed with error %d\n", __func__, error);
1521 return (error);
1522 }
1523
1524 /* Start the periodic watchdog check on the IOC Doorbell */
1525 mpr_periodic(sc);
1526
1527 /*
1528 * The portenable will kick off discovery events that will drive the
1529 * rest of the initialization process. The CAM/SAS module will
1530 * hold up the boot sequence until discovery is complete.
1531 */
1532 sc->mpr_ich.ich_func = mpr_startup;
1533 sc->mpr_ich.ich_arg = sc;
1534 if (config_intrhook_establish(&sc->mpr_ich) != 0) {
1535 mpr_dprint(sc, MPR_ERROR, "Cannot establish MPR config hook\n");
1536 error = EINVAL;
1537 }
1538
1539 /*
1540 * Allow IR to shutdown gracefully when shutdown occurs.
1541 */
1542 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final,
1543 mprsas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT);
1544
1545 if (sc->shutdown_eh == NULL)
1546 mpr_dprint(sc, MPR_ERROR, "shutdown event registration "
1547 "failed\n");
1548
1549 mpr_setup_sysctl(sc);
1550
1551 sc->mpr_flags |= MPR_FLAGS_ATTACH_DONE;
1552
1553 return (error);
1554}
1555
1556/* Run through any late-start handlers. */
1557static void
1558mpr_startup(void *arg)
1559{
1560 struct mpr_softc *sc;
1561
1562 sc = (struct mpr_softc *)arg;
1563
1564 mpr_lock(sc);
1565 mpr_unmask_intr(sc);
1566
1567 /* initialize device mapping tables */
1568 mpr_base_static_config_pages(sc);
1569 mpr_mapping_initialize(sc);
1570 mprsas_startup(sc);
1571 mpr_unlock(sc);
1572}
1573
1574/* Periodic watchdog. Is called with the driver lock already held. */
1575static void
1576mpr_periodic(void *arg)
1577{
1578 struct mpr_softc *sc;
1579 uint32_t db;
1580
1581 sc = (struct mpr_softc *)arg;
1582 if (sc->mpr_flags & MPR_FLAGS_SHUTDOWN)
1583 return;
1584
1585 db = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
1586 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
1587 if ((db & MPI2_DOORBELL_FAULT_CODE_MASK) ==
1588 IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED) {
1589 panic("TEMPERATURE FAULT: STOPPING.");
1590 }
1591 mpr_dprint(sc, MPR_FAULT, "IOC Fault 0x%08x, Resetting\n", db);
1592 mpr_reinit(sc);
1593 }
1594
1595 callout_reset(&sc->periodic, MPR_PERIODIC_DELAY * hz, mpr_periodic, sc);
1596}
1597
1598static void
1599mpr_log_evt_handler(struct mpr_softc *sc, uintptr_t data,
1600 MPI2_EVENT_NOTIFICATION_REPLY *event)
1601{
1602 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry;
1603
1604 mpr_print_event(sc, event);
1605
1606 switch (event->Event) {
1607 case MPI2_EVENT_LOG_DATA:
1608 mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_DATA:\n");
1609 if (sc->mpr_debug & MPR_EVENT)
1610 hexdump(event->EventData, event->EventDataLength, NULL,
1611 0);
1612 break;
1613 case MPI2_EVENT_LOG_ENTRY_ADDED:
1614 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData;
1615 mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event "
1616 "0x%x Sequence %d:\n", entry->LogEntryQualifier,
1617 entry->LogSequence);
1618 break;
1619 default:
1620 break;
1621 }
1622 return;
1623}
1624
1625static int
1626mpr_attach_log(struct mpr_softc *sc)
1627{
1628 uint8_t events[16];
1629
1630 bzero(events, 16);
1631 setbit(events, MPI2_EVENT_LOG_DATA);
1632 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED);
1633
1634 mpr_register_events(sc, events, mpr_log_evt_handler, NULL,
1635 &sc->mpr_log_eh);
1636
1637 return (0);
1638}
1639
1640static int
1641mpr_detach_log(struct mpr_softc *sc)
1642{
1643
1644 if (sc->mpr_log_eh != NULL)
1645 mpr_deregister_events(sc, sc->mpr_log_eh);
1646 return (0);
1647}
1648
1649/*
1650 * Free all of the driver resources and detach submodules. Should be called
1651 * without the lock held.
1652 */
1653int
1654mpr_free(struct mpr_softc *sc)
1655{
1656 int error;
1657
1658 /* Turn off the watchdog */
1659 mpr_lock(sc);
1660 sc->mpr_flags |= MPR_FLAGS_SHUTDOWN;
1661 mpr_unlock(sc);
1662 /* Lock must not be held for this */
1663 callout_drain(&sc->periodic);
1664
1665 if (((error = mpr_detach_log(sc)) != 0) ||
1666 ((error = mpr_detach_sas(sc)) != 0))
1667 return (error);
1668
1669 mpr_detach_user(sc);
1670
1671 /* Put the IOC back in the READY state. */
1672 mpr_lock(sc);
1673 if ((error = mpr_transition_ready(sc)) != 0) {
1674 mpr_unlock(sc);
1675 return (error);
1676 }
1677 mpr_unlock(sc);
1678
1679 if (sc->facts != NULL)
1680 free(sc->facts, M_MPR);
1681
1682 /*
1683 * Free all buffers that are based on IOC Facts. A Diag Reset may need
1684 * to free these buffers too.
1685 */
1686 mpr_iocfacts_free(sc);
1687
1688 if (sc->sysctl_tree != NULL)
1689 sysctl_ctx_free(&sc->sysctl_ctx);
1690
1691 /* Deregister the shutdown function */
1692 if (sc->shutdown_eh != NULL)
1693 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh);
1694
1695 mtx_destroy(&sc->mpr_mtx);
1696
1697 return (0);
1698}
1699
1700static __inline void
1701mpr_complete_command(struct mpr_softc *sc, struct mpr_command *cm)
1702{
1703 MPR_FUNCTRACE(sc);
1704
1705 if (cm == NULL) {
1706 mpr_dprint(sc, MPR_ERROR, "Completing NULL command\n");
1707 return;
1708 }
1709
1710 if (cm->cm_flags & MPR_CM_FLAGS_POLLED)
1711 cm->cm_flags |= MPR_CM_FLAGS_COMPLETE;
1712
1713 if (cm->cm_complete != NULL) {
1714 mpr_dprint(sc, MPR_TRACE,
1715 "%s cm %p calling cm_complete %p data %p reply %p\n",
1716 __func__, cm, cm->cm_complete, cm->cm_complete_data,
1717 cm->cm_reply);
1718 cm->cm_complete(sc, cm);
1719 }
1720
1721 if (cm->cm_flags & MPR_CM_FLAGS_WAKEUP) {
1722 mpr_dprint(sc, MPR_TRACE, "waking up %p\n", cm);
1723 wakeup(cm);
1724 }
1725
1726 if (sc->io_cmds_active != 0) {
1727 sc->io_cmds_active--;
1728 } else {
1729 mpr_dprint(sc, MPR_ERROR, "Warning: io_cmds_active is "
1730 "out of sync - resynching to 0\n");
1731 }
1732}
1733
1734static void
1735mpr_sas_log_info(struct mpr_softc *sc , u32 log_info)
1736{
1737 union loginfo_type {
1738 u32 loginfo;
1739 struct {
1740 u32 subcode:16;
1741 u32 code:8;
1742 u32 originator:4;
1743 u32 bus_type:4;
1744 } dw;
1745 };
1746 union loginfo_type sas_loginfo;
1747 char *originator_str = NULL;
1748
1749 sas_loginfo.loginfo = log_info;
1750 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
1751 return;
1752
1753 /* each nexus loss loginfo */
1754 if (log_info == 0x31170000)
1755 return;
1756
1757 /* eat the loginfos associated with task aborts */
1758 if ((log_info == 30050000) || (log_info == 0x31140000) ||
1759 (log_info == 0x31130000))
1760 return;
1761
1762 switch (sas_loginfo.dw.originator) {
1763 case 0:
1764 originator_str = "IOP";
1765 break;
1766 case 1:
1767 originator_str = "PL";
1768 break;
1769 case 2:
1770 originator_str = "IR";
1771 break;
1772 }
1773
1774 mpr_dprint(sc, MPR_INFO, "log_info(0x%08x): originator(%s), "
1775 "code(0x%02x), sub_code(0x%04x)\n", log_info,
1776 originator_str, sas_loginfo.dw.code,
1777 sas_loginfo.dw.subcode);
1778}
1779
1780static void
1781mpr_display_reply_info(struct mpr_softc *sc, uint8_t *reply)
1782{
1783 MPI2DefaultReply_t *mpi_reply;
1784 u16 sc_status;
1785
1786 mpi_reply = (MPI2DefaultReply_t*)reply;
1787 sc_status = le16toh(mpi_reply->IOCStatus);
1788 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
1789 mpr_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo));
1790}
1791
1792void
1793mpr_intr(void *data)
1794{
1795 struct mpr_softc *sc;
1796 uint32_t status;
1797
1798 sc = (struct mpr_softc *)data;
1799 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
1800
1801 /*
1802 * Check interrupt status register to flush the bus. This is
1803 * needed for both INTx interrupts and driver-driven polling
1804 */
1805 status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
1806 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0)
1807 return;
1808
1809 mpr_lock(sc);
1810 mpr_intr_locked(data);
1811 mpr_unlock(sc);
1812 return;
1813}
1814
1815/*
1816 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the
1817 * chip. Hopefully this theory is correct.
1818 */
1819void
1820mpr_intr_msi(void *data)
1821{
1822 struct mpr_softc *sc;
1823
1824 sc = (struct mpr_softc *)data;
1825 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
1826 mpr_lock(sc);
1827 mpr_intr_locked(data);
1828 mpr_unlock(sc);
1829 return;
1830}
1831
1832/*
1833 * The locking is overly broad and simplistic, but easy to deal with for now.
1834 */
1835void
1836mpr_intr_locked(void *data)
1837{
1838 MPI2_REPLY_DESCRIPTORS_UNION *desc;
1839 struct mpr_softc *sc;
1840 struct mpr_command *cm = NULL;
1841 uint8_t flags;
1842 u_int pq;
1843 MPI2_DIAG_RELEASE_REPLY *rel_rep;
1844 mpr_fw_diagnostic_buffer_t *pBuffer;
1845
1846 sc = (struct mpr_softc *)data;
1847
1848 pq = sc->replypostindex;
1849 mpr_dprint(sc, MPR_TRACE,
1850 "%s sc %p starting with replypostindex %u\n",
1851 __func__, sc, sc->replypostindex);
1852
1853 for ( ;; ) {
1854 cm = NULL;
1855 desc = &sc->post_queue[sc->replypostindex];
1856 flags = desc->Default.ReplyFlags &
1857 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1858 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) ||
1859 (le32toh(desc->Words.High) == 0xffffffff))
1860 break;
1861
1862 /* increment the replypostindex now, so that event handlers
1863 * and cm completion handlers which decide to do a diag
1864 * reset can zero it without it getting incremented again
1865 * afterwards, and we break out of this loop on the next
1866 * iteration since the reply post queue has been cleared to
1867 * 0xFF and all descriptors look unused (which they are).
1868 */
1869 if (++sc->replypostindex >= sc->pqdepth)
1870 sc->replypostindex = 0;
1871
1872 switch (flags) {
1873 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS:
1874 case MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS:
1875 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)];
1876 cm->cm_reply = NULL;
1877 break;
1878 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY:
1879 {
1880 uint32_t baddr;
1881 uint8_t *reply;
1882
1883 /*
1884 * Re-compose the reply address from the address
1885 * sent back from the chip. The ReplyFrameAddress
1886 * is the lower 32 bits of the physical address of
1887 * particular reply frame. Convert that address to
1888 * host format, and then use that to provide the
1889 * offset against the virtual address base
1890 * (sc->reply_frames).
1891 */
1892 baddr = le32toh(desc->AddressReply.ReplyFrameAddress);
1893 reply = sc->reply_frames +
1894 (baddr - ((uint32_t)sc->reply_busaddr));
1895 /*
1896 * Make sure the reply we got back is in a valid
1897 * range. If not, go ahead and panic here, since
1898 * we'll probably panic as soon as we deference the
1899 * reply pointer anyway.
1900 */
1901 if ((reply < sc->reply_frames)
1902 || (reply > (sc->reply_frames +
1903 (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) {
1904 printf("%s: WARNING: reply %p out of range!\n",
1905 __func__, reply);
1906 printf("%s: reply_frames %p, fqdepth %d, "
1907 "frame size %d\n", __func__,
1908 sc->reply_frames, sc->fqdepth,
1909 sc->facts->ReplyFrameSize * 4);
1910 printf("%s: baddr %#x,\n", __func__, baddr);
1911 /* LSI-TODO. See Linux Code for Graceful exit */
1912 panic("Reply address out of range");
1913 }
1914 if (le16toh(desc->AddressReply.SMID) == 0) {
1915 if (((MPI2_DEFAULT_REPLY *)reply)->Function ==
1916 MPI2_FUNCTION_DIAG_BUFFER_POST) {
1917 /*
1918 * If SMID is 0 for Diag Buffer Post,
1919 * this implies that the reply is due to
1920 * a release function with a status that
1921 * the buffer has been released. Set
1922 * the buffer flags accordingly.
1923 */
1924 rel_rep =
1925 (MPI2_DIAG_RELEASE_REPLY *)reply;
1926 if (le16toh(rel_rep->IOCStatus) ==
1927 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED)
1928 {
1929 pBuffer =
1930 &sc->fw_diag_buffer_list[
1931 rel_rep->BufferType];
1932 pBuffer->valid_data = TRUE;
1933 pBuffer->owned_by_firmware =
1934 FALSE;
1935 pBuffer->immediate = FALSE;
1936 }
1937 } else
1938 mpr_dispatch_event(sc, baddr,
1939 (MPI2_EVENT_NOTIFICATION_REPLY *)
1940 reply);
1941 } else {
1942 cm = &sc->commands[
1943 le16toh(desc->AddressReply.SMID)];
1944 cm->cm_reply = reply;
1945 cm->cm_reply_data =
1946 le32toh(desc->AddressReply.
1947 ReplyFrameAddress);
1948 }
1949 break;
1950 }
1951 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS:
1952 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER:
1953 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS:
1954 default:
1955 /* Unhandled */
1956 mpr_dprint(sc, MPR_ERROR, "Unhandled reply 0x%x\n",
1957 desc->Default.ReplyFlags);
1958 cm = NULL;
1959 break;
1960 }
1961
1962 if (cm != NULL) {
1963 // Print Error reply frame
1964 if (cm->cm_reply)
1965 mpr_display_reply_info(sc,cm->cm_reply);
1966 mpr_complete_command(sc, cm);
1967 }
1968
1969 desc->Words.Low = 0xffffffff;
1970 desc->Words.High = 0xffffffff;
1971 }
1972
1973 if (pq != sc->replypostindex) {
1974 mpr_dprint(sc, MPR_TRACE,
1975 "%s sc %p writing postindex %d\n",
1976 __func__, sc, sc->replypostindex);
1977 mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET,
1978 sc->replypostindex);
1979 }
1980
1981 return;
1982}
1983
1984static void
1985mpr_dispatch_event(struct mpr_softc *sc, uintptr_t data,
1986 MPI2_EVENT_NOTIFICATION_REPLY *reply)
1987{
1988 struct mpr_event_handle *eh;
1989 int event, handled = 0;
1990
1991 event = le16toh(reply->Event);
1992 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
1993 if (isset(eh->mask, event)) {
1994 eh->callback(sc, data, reply);
1995 handled++;
1996 }
1997 }
1998
1999 if (handled == 0)
2000 mpr_dprint(sc, MPR_EVENT, "Unhandled event 0x%x\n",
2001 le16toh(event));
2002
2003 /*
2004 * This is the only place that the event/reply should be freed.
2005 * Anything wanting to hold onto the event data should have
2006 * already copied it into their own storage.
2007 */
2008 mpr_free_reply(sc, data);
2009}
2010
2011static void
2012mpr_reregister_events_complete(struct mpr_softc *sc, struct mpr_command *cm)
2013{
2014 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
2015
2016 if (cm->cm_reply)
2017 mpr_print_event(sc,
2018 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply);
2019
2020 mpr_free_command(sc, cm);
2021
2022 /* next, send a port enable */
2023 mprsas_startup(sc);
2024}
2025
2026/*
2027 * For both register_events and update_events, the caller supplies a bitmap
2028 * of events that it _wants_. These functions then turn that into a bitmask
2029 * suitable for the controller.
2030 */
2031int
2032mpr_register_events(struct mpr_softc *sc, uint8_t *mask,
2033 mpr_evt_callback_t *cb, void *data, struct mpr_event_handle **handle)
2034{
2035 struct mpr_event_handle *eh;
2036 int error = 0;
2037
2038 eh = malloc(sizeof(struct mpr_event_handle), M_MPR, M_WAITOK|M_ZERO);
2039 if (!eh) {
2040 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
2041 __func__, __LINE__);
2042 return (ENOMEM);
2043 }
2044 eh->callback = cb;
2045 eh->data = data;
2046 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list);
2047 if (mask != NULL)
2048 error = mpr_update_events(sc, eh, mask);
2049 *handle = eh;
2050
2051 return (error);
2052}
2053
2054int
2055mpr_update_events(struct mpr_softc *sc, struct mpr_event_handle *handle,
2056 uint8_t *mask)
2057{
2058 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2059 MPI2_EVENT_NOTIFICATION_REPLY *reply;
2060 struct mpr_command *cm;
2061 struct mpr_event_handle *eh;
2062 int error, i;
2063
2064 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
2065
2066 if ((mask != NULL) && (handle != NULL))
2067 bcopy(mask, &handle->mask[0], 16);
2068 memset(sc->event_mask, 0xff, 16);
2069
2070 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2071 for (i = 0; i < 16; i++)
2072 sc->event_mask[i] &= ~eh->mask[i];
2073 }
2074
2075 if ((cm = mpr_alloc_command(sc)) == NULL)
2076 return (EBUSY);
2077 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2078 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2079 evtreq->MsgFlags = 0;
2080 evtreq->SASBroadcastPrimitiveMasks = 0;
2081#ifdef MPR_DEBUG_ALL_EVENTS
2082 {
2083 u_char fullmask[16];
2084 memset(fullmask, 0x00, 16);
2085 bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16);
2086 }
2087#else
2088 bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16);
2089#endif
2090 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2091 cm->cm_data = NULL;
2092
2093 error = mpr_request_polled(sc, cm);
2094 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply;
2095 if ((reply == NULL) ||
2096 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
2097 error = ENXIO;
2098
2099 if(reply)
2100 mpr_print_event(sc, reply);
2101
2102 mpr_dprint(sc, MPR_TRACE, "%s finished error %d\n", __func__, error);
2103
2104 mpr_free_command(sc, cm);
2105 return (error);
2106}
2107
2108static int
2109mpr_reregister_events(struct mpr_softc *sc)
2110{
2111 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2112 struct mpr_command *cm;
2113 struct mpr_event_handle *eh;
2114 int error, i;
2115
2116 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
2117
2118 /* first, reregister events */
2119
2120 memset(sc->event_mask, 0xff, 16);
2121
2122 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2123 for (i = 0; i < 16; i++)
2124 sc->event_mask[i] &= ~eh->mask[i];
2125 }
2126
2127 if ((cm = mpr_alloc_command(sc)) == NULL)
2128 return (EBUSY);
2129 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2130 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2131 evtreq->MsgFlags = 0;
2132 evtreq->SASBroadcastPrimitiveMasks = 0;
2133#ifdef MPR_DEBUG_ALL_EVENTS
2134 {
2135 u_char fullmask[16];
2136 memset(fullmask, 0x00, 16);
2137 bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16);
2138 }
2139#else
2140 bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16);
2141#endif
2142 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2143 cm->cm_data = NULL;
2144 cm->cm_complete = mpr_reregister_events_complete;
2145
2146 error = mpr_map_command(sc, cm);
2147
2148 mpr_dprint(sc, MPR_TRACE, "%s finished with error %d\n", __func__,
2149 error);
2150 return (error);
2151}
2152
2153int
2154mpr_deregister_events(struct mpr_softc *sc, struct mpr_event_handle *handle)
2155{
2156
2157 TAILQ_REMOVE(&sc->event_list, handle, eh_list);
2158 free(handle, M_MPR);
2159 return (mpr_update_events(sc, NULL, NULL));
2160}
2161
2162/*
2163 * Add a chain element as the next SGE for the specified command.
2164 * Reset cm_sge and cm_sgesize to indicate all the available space. Chains are
2165 * only required for IEEE commands. Therefore there is no code for commands
2166 * that have the MPR_CM_FLAGS_SGE_SIMPLE flag set (and those commands shouldn't
2167 * be requesting chains).
2168 */
2169static int
2170mpr_add_chain(struct mpr_command *cm, int segsleft)
2171{
2172 struct mpr_softc *sc = cm->cm_sc;
2173 MPI2_REQUEST_HEADER *req;
2174 MPI25_IEEE_SGE_CHAIN64 *ieee_sgc;
2175 struct mpr_chain *chain;
2176 int space, sgc_size, current_segs, rem_segs, segs_per_frame;
2177 uint8_t next_chain_offset = 0;
2178
2179 /*
2180 * Fail if a command is requesting a chain for SIMPLE SGE's. For SAS3
2181 * only IEEE commands should be requesting chains. Return some error
2182 * code other than 0.
2183 */
2184 if (cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE) {
|
2187 mpr_dprint(sc, MPR_ERROR, "A chain element cannot be added to "
2188 "an MPI SGL.\n");
2189 return(ENOBUFS);
2190 }
2191
2192 sgc_size = sizeof(MPI25_IEEE_SGE_CHAIN64);
2193 if (cm->cm_sglsize < sgc_size)
2194 panic("MPR: Need SGE Error Code\n");
2195
2196 chain = mpr_alloc_chain(cm->cm_sc);
2197 if (chain == NULL)
2198 return (ENOBUFS);
2199
2200 space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4;
2201
2202 /*
2203 * Note: a double-linked list is used to make it easier to walk for
2204 * debugging.
2205 */
2206 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link);
2207
2208 /*
2209 * Need to know if the number of frames left is more than 1 or not. If
2210 * more than 1 frame is required, NextChainOffset will need to be set,
2211 * which will just be the last segment of the frame.
2212 */
2213 rem_segs = 0;
2214 if (cm->cm_sglsize < (sgc_size * segsleft)) {
2215 /*
2216 * rem_segs is the number of segements remaining after the
2217 * segments that will go into the current frame. Since it is
2218 * known that at least one more frame is required, account for
2219 * the chain element. To know if more than one more frame is
2220 * required, just check if there will be a remainder after using
2221 * the current frame (with this chain) and the next frame. If
2222 * so the NextChainOffset must be the last element of the next
2223 * frame.
2224 */
2225 current_segs = (cm->cm_sglsize / sgc_size) - 1;
2226 rem_segs = segsleft - current_segs;
2227 segs_per_frame = space / sgc_size;
2228 if (rem_segs > segs_per_frame) {
2229 next_chain_offset = segs_per_frame - 1;
2230 }
2231 }
2232 ieee_sgc = &((MPI25_SGE_IO_UNION *)cm->cm_sge)->IeeeChain;
2233 ieee_sgc->Length = next_chain_offset ? htole32((uint32_t)space) :
2234 htole32((uint32_t)rem_segs * (uint32_t)sgc_size);
2235 ieee_sgc->NextChainOffset = next_chain_offset;
2236 ieee_sgc->Flags = (MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
2237 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
2238 ieee_sgc->Address.Low = htole32(chain->chain_busaddr);
2239 ieee_sgc->Address.High = htole32(chain->chain_busaddr >> 32);
2240 cm->cm_sge = &((MPI25_SGE_IO_UNION *)chain->chain)->IeeeSimple;
2241 req = (MPI2_REQUEST_HEADER *)cm->cm_req;
2242 req->ChainOffset = ((sc->facts->IOCRequestFrameSize * 4) -
2243 sgc_size) >> 4;
2244
2245 cm->cm_sglsize = space;
2246 return (0);
2247}
2248
2249/*
2250 * Add one scatter-gather element to the scatter-gather list for a command.
2251 * Maintain cm_sglsize and cm_sge as the remaining size and pointer to the next
2252 * SGE to fill in, respectively. In Gen3, the MPI SGL does not have a chain,
2253 * so don't consider any chain additions.
2254 */
2255int
2256mpr_push_sge(struct mpr_command *cm, MPI2_SGE_SIMPLE64 *sge, size_t len,
2257 int segsleft)
2258{
2259 uint32_t saved_buf_len, saved_address_low, saved_address_high;
2260 u32 sge_flags;
2261
2262 /*
2263 * case 1: >=1 more segment, no room for anything (error)
2264 * case 2: 1 more segment and enough room for it
2265 */
2266
2267 if (cm->cm_sglsize < (segsleft * sizeof(MPI2_SGE_SIMPLE64))) {
2268 mpr_dprint(cm->cm_sc, MPR_ERROR,
2269 "%s: warning: Not enough room for MPI SGL in frame.\n",
2270 __func__);
2271 return(ENOBUFS);
2272 }
2273
2274 KASSERT(segsleft == 1,
2275 ("segsleft cannot be more than 1 for an MPI SGL; segsleft = %d\n",
2276 segsleft));
2277
2278 /*
2279 * There is one more segment left to add for the MPI SGL and there is
2280 * enough room in the frame to add it. This is the normal case because
2281 * MPI SGL's don't have chains, otherwise something is wrong.
2282 *
2283 * If this is a bi-directional request, need to account for that
2284 * here. Save the pre-filled sge values. These will be used
2285 * either for the 2nd SGL or for a single direction SGL. If
2286 * cm_out_len is non-zero, this is a bi-directional request, so
2287 * fill in the OUT SGL first, then the IN SGL, otherwise just
2288 * fill in the IN SGL. Note that at this time, when filling in
2289 * 2 SGL's for a bi-directional request, they both use the same
2290 * DMA buffer (same cm command).
2291 */
2292 saved_buf_len = sge->FlagsLength & 0x00FFFFFF;
2293 saved_address_low = sge->Address.Low;
2294 saved_address_high = sge->Address.High;
2295 if (cm->cm_out_len) {
2296 sge->FlagsLength = cm->cm_out_len |
2297 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2298 MPI2_SGE_FLAGS_END_OF_BUFFER |
2299 MPI2_SGE_FLAGS_HOST_TO_IOC |
2300 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2301 MPI2_SGE_FLAGS_SHIFT);
2302 cm->cm_sglsize -= len;
2303 /* Endian Safe code */
2304 sge_flags = sge->FlagsLength;
2305 sge->FlagsLength = htole32(sge_flags);
2306 sge->Address.High = htole32(sge->Address.High);
2307 sge->Address.Low = htole32(sge->Address.Low);
2308 bcopy(sge, cm->cm_sge, len);
2309 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2310 }
2311 sge->FlagsLength = saved_buf_len |
2312 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2313 MPI2_SGE_FLAGS_END_OF_BUFFER |
2314 MPI2_SGE_FLAGS_LAST_ELEMENT |
2315 MPI2_SGE_FLAGS_END_OF_LIST |
2316 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2317 MPI2_SGE_FLAGS_SHIFT);
2318 if (cm->cm_flags & MPR_CM_FLAGS_DATAIN) {
2319 sge->FlagsLength |=
2320 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) <<
2321 MPI2_SGE_FLAGS_SHIFT);
2322 } else {
2323 sge->FlagsLength |=
2324 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) <<
2325 MPI2_SGE_FLAGS_SHIFT);
2326 }
2327 sge->Address.Low = saved_address_low;
2328 sge->Address.High = saved_address_high;
2329
2330 cm->cm_sglsize -= len;
2331 /* Endian Safe code */
2332 sge_flags = sge->FlagsLength;
2333 sge->FlagsLength = htole32(sge_flags);
2334 sge->Address.High = htole32(sge->Address.High);
2335 sge->Address.Low = htole32(sge->Address.Low);
2336 bcopy(sge, cm->cm_sge, len);
2337 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2338 return (0);
2339}
2340
2341/*
2342 * Add one IEEE scatter-gather element (chain or simple) to the IEEE scatter-
2343 * gather list for a command. Maintain cm_sglsize and cm_sge as the
2344 * remaining size and pointer to the next SGE to fill in, respectively.
2345 */
2346int
2347mpr_push_ieee_sge(struct mpr_command *cm, void *sgep, int segsleft)
2348{
2349 MPI2_IEEE_SGE_SIMPLE64 *sge = sgep;
2350 int error, ieee_sge_size = sizeof(MPI25_SGE_IO_UNION);
2351 uint32_t saved_buf_len, saved_address_low, saved_address_high;
2352 uint32_t sge_length;
2353
2354 /*
2355 * case 1: No room for chain or segment (error).
2356 * case 2: Two or more segments left but only room for chain.
2357 * case 3: Last segment and room for it, so set flags.
2358 */
2359
2360 /*
2361 * There should be room for at least one element, or there is a big
2362 * problem.
2363 */
2364 if (cm->cm_sglsize < ieee_sge_size)
2365 panic("MPR: Need SGE Error Code\n");
2366
2367 if ((segsleft >= 2) && (cm->cm_sglsize < (ieee_sge_size * 2))) {
2368 if ((error = mpr_add_chain(cm, segsleft)) != 0)
2369 return (error);
2370 }
2371
2372 if (segsleft == 1) {
2373 /*
2374 * If this is a bi-directional request, need to account for that
2375 * here. Save the pre-filled sge values. These will be used
2376 * either for the 2nd SGL or for a single direction SGL. If
2377 * cm_out_len is non-zero, this is a bi-directional request, so
2378 * fill in the OUT SGL first, then the IN SGL, otherwise just
2379 * fill in the IN SGL. Note that at this time, when filling in
2380 * 2 SGL's for a bi-directional request, they both use the same
2381 * DMA buffer (same cm command).
2382 */
2383 saved_buf_len = sge->Length;
2384 saved_address_low = sge->Address.Low;
2385 saved_address_high = sge->Address.High;
2386 if (cm->cm_out_len) {
2387 sge->Length = cm->cm_out_len;
2388 sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
2389 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
2390 cm->cm_sglsize -= ieee_sge_size;
2391 /* Endian Safe code */
2392 sge_length = sge->Length;
2393 sge->Length = htole32(sge_length);
2394 sge->Address.High = htole32(sge->Address.High);
2395 sge->Address.Low = htole32(sge->Address.Low);
2396 bcopy(sgep, cm->cm_sge, ieee_sge_size);
2397 cm->cm_sge =
2398 (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge +
2399 ieee_sge_size);
2400 }
2401 sge->Length = saved_buf_len;
2402 sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
2403 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR |
2404 MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
2405 sge->Address.Low = saved_address_low;
2406 sge->Address.High = saved_address_high;
2407 }
2408
2409 cm->cm_sglsize -= ieee_sge_size;
2410 /* Endian Safe code */
2411 sge_length = sge->Length;
2412 sge->Length = htole32(sge_length);
2413 sge->Address.High = htole32(sge->Address.High);
2414 sge->Address.Low = htole32(sge->Address.Low);
2415 bcopy(sgep, cm->cm_sge, ieee_sge_size);
2416 cm->cm_sge = (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge +
2417 ieee_sge_size);
2418 return (0);
2419}
2420
2421/*
2422 * Add one dma segment to the scatter-gather list for a command.
2423 */
2424int
2425mpr_add_dmaseg(struct mpr_command *cm, vm_paddr_t pa, size_t len, u_int flags,
2426 int segsleft)
2427{
2428 MPI2_SGE_SIMPLE64 sge;
2429 MPI2_IEEE_SGE_SIMPLE64 ieee_sge;
2430
2431 if (!(cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE)) {
2432 ieee_sge.Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
2433 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
2434 ieee_sge.Length = len;
2435 mpr_from_u64(pa, &ieee_sge.Address);
2436
2437 return (mpr_push_ieee_sge(cm, &ieee_sge, segsleft));
2438 } else {
2439 /*
2440 * This driver always uses 64-bit address elements for
2441 * simplicity.
2442 */
2443 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2444 MPI2_SGE_FLAGS_64_BIT_ADDRESSING;
2445 /* Set Endian safe macro in mpr_push_sge */
2446 sge.FlagsLength = len | (flags << MPI2_SGE_FLAGS_SHIFT);
2447 mpr_from_u64(pa, &sge.Address);
2448
2449 return (mpr_push_sge(cm, &sge, sizeof sge, segsleft));
2450 }
2451}
2452
2453static void
2454mpr_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2455{
2456 struct mpr_softc *sc;
2457 struct mpr_command *cm;
2458 u_int i, dir, sflags;
2459
2460 cm = (struct mpr_command *)arg;
2461 sc = cm->cm_sc;
2462
2463 /*
2464 * In this case, just print out a warning and let the chip tell the
2465 * user they did the wrong thing.
2466 */
2467 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) {
2468 mpr_dprint(sc, MPR_ERROR,
2469 "%s: warning: busdma returned %d segments, "
2470 "more than the %d allowed\n", __func__, nsegs,
2471 cm->cm_max_segs);
2472 }
2473
2474 /*
2475 * Set up DMA direction flags. Bi-directional requests are also handled
2476 * here. In that case, both direction flags will be set.
2477 */
2478 sflags = 0;
2479 if (cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) {
2480 /*
2481 * We have to add a special case for SMP passthrough, there
2482 * is no easy way to generically handle it. The first
2483 * S/G element is used for the command (therefore the
2484 * direction bit needs to be set). The second one is used
2485 * for the reply. We'll leave it to the caller to make
2486 * sure we only have two buffers.
2487 */
2488 /*
2489 * Even though the busdma man page says it doesn't make
2490 * sense to have both direction flags, it does in this case.
2491 * We have one s/g element being accessed in each direction.
2492 */
2493 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD;
2494
2495 /*
2496 * Set the direction flag on the first buffer in the SMP
2497 * passthrough request. We'll clear it for the second one.
2498 */
2499 sflags |= MPI2_SGE_FLAGS_DIRECTION |
2500 MPI2_SGE_FLAGS_END_OF_BUFFER;
2501 } else if (cm->cm_flags & MPR_CM_FLAGS_DATAOUT) {
2502 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
2503 dir = BUS_DMASYNC_PREWRITE;
2504 } else
2505 dir = BUS_DMASYNC_PREREAD;
2506
2507 for (i = 0; i < nsegs; i++) {
2508 if ((cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) && (i != 0)) {
2509 sflags &= ~MPI2_SGE_FLAGS_DIRECTION;
2510 }
2511 error = mpr_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len,
2512 sflags, nsegs - i);
2513 if (error != 0) {
2514 /* Resource shortage, roll back! */
2515 if (ratecheck(&sc->lastfail, &mpr_chainfail_interval))
2516 mpr_dprint(sc, MPR_INFO, "Out of chain frames, "
2517 "consider increasing hw.mpr.max_chains.\n");
2518 cm->cm_flags |= MPR_CM_FLAGS_CHAIN_FAILED;
2519 mpr_complete_command(sc, cm);
2520 return;
2521 }
2522 }
2523
2524 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir);
2525 mpr_enqueue_request(sc, cm);
2526
2527 return;
2528}
2529
2530static void
2531mpr_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize,
2532 int error)
2533{
2534 mpr_data_cb(arg, segs, nsegs, error);
2535}
2536
2537/*
2538 * This is the routine to enqueue commands ansynchronously.
2539 * Note that the only error path here is from bus_dmamap_load(), which can
2540 * return EINPROGRESS if it is waiting for resources. Other than this, it's
2541 * assumed that if you have a command in-hand, then you have enough credits
2542 * to use it.
2543 */
2544int
2545mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm)
2546{
2547 int error = 0;
2548
2549 if (cm->cm_flags & MPR_CM_FLAGS_USE_UIO) {
2550 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap,
2551 &cm->cm_uio, mpr_data_cb2, cm, 0);
2552 } else if (cm->cm_flags & MPR_CM_FLAGS_USE_CCB) {
2553 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap,
2554 cm->cm_data, mpr_data_cb, cm, 0);
2555 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) {
2556 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap,
2557 cm->cm_data, cm->cm_length, mpr_data_cb, cm, 0);
2558 } else {
2559 /* Add a zero-length element as needed */
2560 if (cm->cm_sge != NULL)
2561 mpr_add_dmaseg(cm, 0, 0, 0, 1);
2562 mpr_enqueue_request(sc, cm);
2563 }
2564
2565 return (error);
2566}
2567
2568/*
2569 * This is the routine to enqueue commands synchronously. An error of
2570 * EINPROGRESS from mpr_map_command() is ignored since the command will
2571 * be executed and enqueued automatically. Other errors come from msleep().
2572 */
2573int
2574mpr_wait_command(struct mpr_softc *sc, struct mpr_command *cm, int timeout,
2575 int sleep_flag)
2576{
2577 int error, rc;
2578 struct timeval cur_time, start_time;
2579
2580 if (sc->mpr_flags & MPR_FLAGS_DIAGRESET)
2581 return EBUSY;
2582
2583 cm->cm_complete = NULL;
2584 cm->cm_flags |= (MPR_CM_FLAGS_WAKEUP + MPR_CM_FLAGS_POLLED);
2585 error = mpr_map_command(sc, cm);
2586 if ((error != 0) && (error != EINPROGRESS))
2587 return (error);
2588
2589 // Check for context and wait for 50 mSec at a time until time has
2590 // expired or the command has finished. If msleep can't be used, need
2591 // to poll.
2592#if __FreeBSD_version >= 1000029
2593 if (curthread->td_no_sleeping)
2594#else //__FreeBSD_version < 1000029
2595 if (curthread->td_pflags & TDP_NOSLEEPING)
2596#endif //__FreeBSD_version >= 1000029
2597 sleep_flag = NO_SLEEP;
2598 getmicrotime(&start_time);
2599 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) {
2600 error = msleep(cm, &sc->mpr_mtx, 0, "mprwait", timeout*hz);
2601 } else {
2602 while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) {
2603 mpr_intr_locked(sc);
2604 if (sleep_flag == CAN_SLEEP)
2605 pause("mprwait", hz/20);
2606 else
2607 DELAY(50000);
2608
2609 getmicrotime(&cur_time);
2610 if ((cur_time.tv_sec - start_time.tv_sec) > timeout) {
2611 error = EWOULDBLOCK;
2612 break;
2613 }
2614 }
2615 }
2616
2617 if (error == EWOULDBLOCK) {
2618 mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__);
2619 rc = mpr_reinit(sc);
2620 mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? "success" :
2621 "failed");
2622 error = ETIMEDOUT;
2623 }
2624 return (error);
2625}
2626
2627/*
2628 * This is the routine to enqueue a command synchonously and poll for
2629 * completion. Its use should be rare.
2630 */
2631int
2632mpr_request_polled(struct mpr_softc *sc, struct mpr_command *cm)
2633{
2634 int error, timeout = 0, rc;
2635 struct timeval cur_time, start_time;
2636
2637 error = 0;
2638
2639 cm->cm_flags |= MPR_CM_FLAGS_POLLED;
2640 cm->cm_complete = NULL;
2641 mpr_map_command(sc, cm);
2642
2643 getmicrotime(&start_time);
2644 while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) {
2645 mpr_intr_locked(sc);
2646
2647 if (mtx_owned(&sc->mpr_mtx))
2648 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0,
2649 "mprpoll", hz/20);
2650 else
2651 pause("mprpoll", hz/20);
2652
2653 /*
2654 * Check for real-time timeout and fail if more than 60 seconds.
2655 */
2656 getmicrotime(&cur_time);
2657 timeout = cur_time.tv_sec - start_time.tv_sec;
2658 if (timeout > 60) {
2659 mpr_dprint(sc, MPR_FAULT, "polling failed\n");
2660 error = ETIMEDOUT;
2661 break;
2662 }
2663 }
2664
2665 if(error) {
2666 mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__);
2667 rc = mpr_reinit(sc);
2668 mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ?
2669 "success" : "failed");
2670 }
2671 return (error);
2672}
2673
2674/*
2675 * The MPT driver had a verbose interface for config pages. In this driver,
2676 * reduce it to much simplier terms, similar to the Linux driver.
2677 */
2678int
2679mpr_read_config_page(struct mpr_softc *sc, struct mpr_config_params *params)
2680{
2681 MPI2_CONFIG_REQUEST *req;
2682 struct mpr_command *cm;
2683 int error;
2684
2685 if (sc->mpr_flags & MPR_FLAGS_BUSY) {
2686 return (EBUSY);
2687 }
2688
2689 cm = mpr_alloc_command(sc);
2690 if (cm == NULL) {
2691 return (EBUSY);
2692 }
2693
2694 req = (MPI2_CONFIG_REQUEST *)cm->cm_req;
2695 req->Function = MPI2_FUNCTION_CONFIG;
2696 req->Action = params->action;
2697 req->SGLFlags = 0;
2698 req->ChainOffset = 0;
2699 req->PageAddress = params->page_address;
2700 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
2701 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr;
2702
2703 hdr = ¶ms->hdr.Ext;
2704 req->ExtPageType = hdr->ExtPageType;
2705 req->ExtPageLength = hdr->ExtPageLength;
2706 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
2707 req->Header.PageLength = 0; /* Must be set to zero */
2708 req->Header.PageNumber = hdr->PageNumber;
2709 req->Header.PageVersion = hdr->PageVersion;
2710 } else {
2711 MPI2_CONFIG_PAGE_HEADER *hdr;
2712
2713 hdr = ¶ms->hdr.Struct;
2714 req->Header.PageType = hdr->PageType;
2715 req->Header.PageNumber = hdr->PageNumber;
2716 req->Header.PageLength = hdr->PageLength;
2717 req->Header.PageVersion = hdr->PageVersion;
2718 }
2719
2720 cm->cm_data = params->buffer;
2721 cm->cm_length = params->length;
2722 cm->cm_sge = &req->PageBufferSGE;
2723 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
2724 cm->cm_flags = MPR_CM_FLAGS_SGE_SIMPLE | MPR_CM_FLAGS_DATAIN;
2725 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2726
2727 cm->cm_complete_data = params;
2728 if (params->callback != NULL) {
2729 cm->cm_complete = mpr_config_complete;
2730 return (mpr_map_command(sc, cm));
2731 } else {
2732 error = mpr_wait_command(sc, cm, 0, CAN_SLEEP);
2733 if (error) {
2734 mpr_dprint(sc, MPR_FAULT,
2735 "Error %d reading config page\n", error);
2736 mpr_free_command(sc, cm);
2737 return (error);
2738 }
2739 mpr_config_complete(sc, cm);
2740 }
2741
2742 return (0);
2743}
2744
2745int
2746mpr_write_config_page(struct mpr_softc *sc, struct mpr_config_params *params)
2747{
2748 return (EINVAL);
2749}
2750
2751static void
2752mpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm)
2753{
2754 MPI2_CONFIG_REPLY *reply;
2755 struct mpr_config_params *params;
2756
2757 MPR_FUNCTRACE(sc);
2758 params = cm->cm_complete_data;
2759
2760 if (cm->cm_data != NULL) {
2761 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap,
2762 BUS_DMASYNC_POSTREAD);
2763 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap);
2764 }
2765
2766 /*
2767 * XXX KDM need to do more error recovery? This results in the
2768 * device in question not getting probed.
2769 */
2770 if ((cm->cm_flags & MPR_CM_FLAGS_ERROR_MASK) != 0) {
2771 params->status = MPI2_IOCSTATUS_BUSY;
2772 goto done;
2773 }
2774
2775 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply;
2776 if (reply == NULL) {
2777 params->status = MPI2_IOCSTATUS_BUSY;
2778 goto done;
2779 }
2780 params->status = reply->IOCStatus;
2781 if (params->hdr.Ext.ExtPageType != 0) {
2782 params->hdr.Ext.ExtPageType = reply->ExtPageType;
2783 params->hdr.Ext.ExtPageLength = reply->ExtPageLength;
2784 } else {
2785 params->hdr.Struct.PageType = reply->Header.PageType;
2786 params->hdr.Struct.PageNumber = reply->Header.PageNumber;
2787 params->hdr.Struct.PageLength = reply->Header.PageLength;
2788 params->hdr.Struct.PageVersion = reply->Header.PageVersion;
2789 }
2790
2791done:
2792 mpr_free_command(sc, cm);
2793 if (params->callback != NULL)
2794 params->callback(sc, params);
2795
2796 return;
2797}
| 2185 mpr_dprint(sc, MPR_ERROR, "A chain element cannot be added to "
2186 "an MPI SGL.\n");
2187 return(ENOBUFS);
2188 }
2189
2190 sgc_size = sizeof(MPI25_IEEE_SGE_CHAIN64);
2191 if (cm->cm_sglsize < sgc_size)
2192 panic("MPR: Need SGE Error Code\n");
2193
2194 chain = mpr_alloc_chain(cm->cm_sc);
2195 if (chain == NULL)
2196 return (ENOBUFS);
2197
2198 space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4;
2199
2200 /*
2201 * Note: a double-linked list is used to make it easier to walk for
2202 * debugging.
2203 */
2204 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link);
2205
2206 /*
2207 * Need to know if the number of frames left is more than 1 or not. If
2208 * more than 1 frame is required, NextChainOffset will need to be set,
2209 * which will just be the last segment of the frame.
2210 */
2211 rem_segs = 0;
2212 if (cm->cm_sglsize < (sgc_size * segsleft)) {
2213 /*
2214 * rem_segs is the number of segements remaining after the
2215 * segments that will go into the current frame. Since it is
2216 * known that at least one more frame is required, account for
2217 * the chain element. To know if more than one more frame is
2218 * required, just check if there will be a remainder after using
2219 * the current frame (with this chain) and the next frame. If
2220 * so the NextChainOffset must be the last element of the next
2221 * frame.
2222 */
2223 current_segs = (cm->cm_sglsize / sgc_size) - 1;
2224 rem_segs = segsleft - current_segs;
2225 segs_per_frame = space / sgc_size;
2226 if (rem_segs > segs_per_frame) {
2227 next_chain_offset = segs_per_frame - 1;
2228 }
2229 }
2230 ieee_sgc = &((MPI25_SGE_IO_UNION *)cm->cm_sge)->IeeeChain;
2231 ieee_sgc->Length = next_chain_offset ? htole32((uint32_t)space) :
2232 htole32((uint32_t)rem_segs * (uint32_t)sgc_size);
2233 ieee_sgc->NextChainOffset = next_chain_offset;
2234 ieee_sgc->Flags = (MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
2235 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
2236 ieee_sgc->Address.Low = htole32(chain->chain_busaddr);
2237 ieee_sgc->Address.High = htole32(chain->chain_busaddr >> 32);
2238 cm->cm_sge = &((MPI25_SGE_IO_UNION *)chain->chain)->IeeeSimple;
2239 req = (MPI2_REQUEST_HEADER *)cm->cm_req;
2240 req->ChainOffset = ((sc->facts->IOCRequestFrameSize * 4) -
2241 sgc_size) >> 4;
2242
2243 cm->cm_sglsize = space;
2244 return (0);
2245}
2246
2247/*
2248 * Add one scatter-gather element to the scatter-gather list for a command.
2249 * Maintain cm_sglsize and cm_sge as the remaining size and pointer to the next
2250 * SGE to fill in, respectively. In Gen3, the MPI SGL does not have a chain,
2251 * so don't consider any chain additions.
2252 */
2253int
2254mpr_push_sge(struct mpr_command *cm, MPI2_SGE_SIMPLE64 *sge, size_t len,
2255 int segsleft)
2256{
2257 uint32_t saved_buf_len, saved_address_low, saved_address_high;
2258 u32 sge_flags;
2259
2260 /*
2261 * case 1: >=1 more segment, no room for anything (error)
2262 * case 2: 1 more segment and enough room for it
2263 */
2264
2265 if (cm->cm_sglsize < (segsleft * sizeof(MPI2_SGE_SIMPLE64))) {
2266 mpr_dprint(cm->cm_sc, MPR_ERROR,
2267 "%s: warning: Not enough room for MPI SGL in frame.\n",
2268 __func__);
2269 return(ENOBUFS);
2270 }
2271
2272 KASSERT(segsleft == 1,
2273 ("segsleft cannot be more than 1 for an MPI SGL; segsleft = %d\n",
2274 segsleft));
2275
2276 /*
2277 * There is one more segment left to add for the MPI SGL and there is
2278 * enough room in the frame to add it. This is the normal case because
2279 * MPI SGL's don't have chains, otherwise something is wrong.
2280 *
2281 * If this is a bi-directional request, need to account for that
2282 * here. Save the pre-filled sge values. These will be used
2283 * either for the 2nd SGL or for a single direction SGL. If
2284 * cm_out_len is non-zero, this is a bi-directional request, so
2285 * fill in the OUT SGL first, then the IN SGL, otherwise just
2286 * fill in the IN SGL. Note that at this time, when filling in
2287 * 2 SGL's for a bi-directional request, they both use the same
2288 * DMA buffer (same cm command).
2289 */
2290 saved_buf_len = sge->FlagsLength & 0x00FFFFFF;
2291 saved_address_low = sge->Address.Low;
2292 saved_address_high = sge->Address.High;
2293 if (cm->cm_out_len) {
2294 sge->FlagsLength = cm->cm_out_len |
2295 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2296 MPI2_SGE_FLAGS_END_OF_BUFFER |
2297 MPI2_SGE_FLAGS_HOST_TO_IOC |
2298 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2299 MPI2_SGE_FLAGS_SHIFT);
2300 cm->cm_sglsize -= len;
2301 /* Endian Safe code */
2302 sge_flags = sge->FlagsLength;
2303 sge->FlagsLength = htole32(sge_flags);
2304 sge->Address.High = htole32(sge->Address.High);
2305 sge->Address.Low = htole32(sge->Address.Low);
2306 bcopy(sge, cm->cm_sge, len);
2307 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2308 }
2309 sge->FlagsLength = saved_buf_len |
2310 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2311 MPI2_SGE_FLAGS_END_OF_BUFFER |
2312 MPI2_SGE_FLAGS_LAST_ELEMENT |
2313 MPI2_SGE_FLAGS_END_OF_LIST |
2314 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2315 MPI2_SGE_FLAGS_SHIFT);
2316 if (cm->cm_flags & MPR_CM_FLAGS_DATAIN) {
2317 sge->FlagsLength |=
2318 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) <<
2319 MPI2_SGE_FLAGS_SHIFT);
2320 } else {
2321 sge->FlagsLength |=
2322 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) <<
2323 MPI2_SGE_FLAGS_SHIFT);
2324 }
2325 sge->Address.Low = saved_address_low;
2326 sge->Address.High = saved_address_high;
2327
2328 cm->cm_sglsize -= len;
2329 /* Endian Safe code */
2330 sge_flags = sge->FlagsLength;
2331 sge->FlagsLength = htole32(sge_flags);
2332 sge->Address.High = htole32(sge->Address.High);
2333 sge->Address.Low = htole32(sge->Address.Low);
2334 bcopy(sge, cm->cm_sge, len);
2335 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2336 return (0);
2337}
2338
2339/*
2340 * Add one IEEE scatter-gather element (chain or simple) to the IEEE scatter-
2341 * gather list for a command. Maintain cm_sglsize and cm_sge as the
2342 * remaining size and pointer to the next SGE to fill in, respectively.
2343 */
2344int
2345mpr_push_ieee_sge(struct mpr_command *cm, void *sgep, int segsleft)
2346{
2347 MPI2_IEEE_SGE_SIMPLE64 *sge = sgep;
2348 int error, ieee_sge_size = sizeof(MPI25_SGE_IO_UNION);
2349 uint32_t saved_buf_len, saved_address_low, saved_address_high;
2350 uint32_t sge_length;
2351
2352 /*
2353 * case 1: No room for chain or segment (error).
2354 * case 2: Two or more segments left but only room for chain.
2355 * case 3: Last segment and room for it, so set flags.
2356 */
2357
2358 /*
2359 * There should be room for at least one element, or there is a big
2360 * problem.
2361 */
2362 if (cm->cm_sglsize < ieee_sge_size)
2363 panic("MPR: Need SGE Error Code\n");
2364
2365 if ((segsleft >= 2) && (cm->cm_sglsize < (ieee_sge_size * 2))) {
2366 if ((error = mpr_add_chain(cm, segsleft)) != 0)
2367 return (error);
2368 }
2369
2370 if (segsleft == 1) {
2371 /*
2372 * If this is a bi-directional request, need to account for that
2373 * here. Save the pre-filled sge values. These will be used
2374 * either for the 2nd SGL or for a single direction SGL. If
2375 * cm_out_len is non-zero, this is a bi-directional request, so
2376 * fill in the OUT SGL first, then the IN SGL, otherwise just
2377 * fill in the IN SGL. Note that at this time, when filling in
2378 * 2 SGL's for a bi-directional request, they both use the same
2379 * DMA buffer (same cm command).
2380 */
2381 saved_buf_len = sge->Length;
2382 saved_address_low = sge->Address.Low;
2383 saved_address_high = sge->Address.High;
2384 if (cm->cm_out_len) {
2385 sge->Length = cm->cm_out_len;
2386 sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
2387 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
2388 cm->cm_sglsize -= ieee_sge_size;
2389 /* Endian Safe code */
2390 sge_length = sge->Length;
2391 sge->Length = htole32(sge_length);
2392 sge->Address.High = htole32(sge->Address.High);
2393 sge->Address.Low = htole32(sge->Address.Low);
2394 bcopy(sgep, cm->cm_sge, ieee_sge_size);
2395 cm->cm_sge =
2396 (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge +
2397 ieee_sge_size);
2398 }
2399 sge->Length = saved_buf_len;
2400 sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
2401 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR |
2402 MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
2403 sge->Address.Low = saved_address_low;
2404 sge->Address.High = saved_address_high;
2405 }
2406
2407 cm->cm_sglsize -= ieee_sge_size;
2408 /* Endian Safe code */
2409 sge_length = sge->Length;
2410 sge->Length = htole32(sge_length);
2411 sge->Address.High = htole32(sge->Address.High);
2412 sge->Address.Low = htole32(sge->Address.Low);
2413 bcopy(sgep, cm->cm_sge, ieee_sge_size);
2414 cm->cm_sge = (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge +
2415 ieee_sge_size);
2416 return (0);
2417}
2418
2419/*
2420 * Add one dma segment to the scatter-gather list for a command.
2421 */
2422int
2423mpr_add_dmaseg(struct mpr_command *cm, vm_paddr_t pa, size_t len, u_int flags,
2424 int segsleft)
2425{
2426 MPI2_SGE_SIMPLE64 sge;
2427 MPI2_IEEE_SGE_SIMPLE64 ieee_sge;
2428
2429 if (!(cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE)) {
2430 ieee_sge.Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
2431 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
2432 ieee_sge.Length = len;
2433 mpr_from_u64(pa, &ieee_sge.Address);
2434
2435 return (mpr_push_ieee_sge(cm, &ieee_sge, segsleft));
2436 } else {
2437 /*
2438 * This driver always uses 64-bit address elements for
2439 * simplicity.
2440 */
2441 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2442 MPI2_SGE_FLAGS_64_BIT_ADDRESSING;
2443 /* Set Endian safe macro in mpr_push_sge */
2444 sge.FlagsLength = len | (flags << MPI2_SGE_FLAGS_SHIFT);
2445 mpr_from_u64(pa, &sge.Address);
2446
2447 return (mpr_push_sge(cm, &sge, sizeof sge, segsleft));
2448 }
2449}
2450
2451static void
2452mpr_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2453{
2454 struct mpr_softc *sc;
2455 struct mpr_command *cm;
2456 u_int i, dir, sflags;
2457
2458 cm = (struct mpr_command *)arg;
2459 sc = cm->cm_sc;
2460
2461 /*
2462 * In this case, just print out a warning and let the chip tell the
2463 * user they did the wrong thing.
2464 */
2465 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) {
2466 mpr_dprint(sc, MPR_ERROR,
2467 "%s: warning: busdma returned %d segments, "
2468 "more than the %d allowed\n", __func__, nsegs,
2469 cm->cm_max_segs);
2470 }
2471
2472 /*
2473 * Set up DMA direction flags. Bi-directional requests are also handled
2474 * here. In that case, both direction flags will be set.
2475 */
2476 sflags = 0;
2477 if (cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) {
2478 /*
2479 * We have to add a special case for SMP passthrough, there
2480 * is no easy way to generically handle it. The first
2481 * S/G element is used for the command (therefore the
2482 * direction bit needs to be set). The second one is used
2483 * for the reply. We'll leave it to the caller to make
2484 * sure we only have two buffers.
2485 */
2486 /*
2487 * Even though the busdma man page says it doesn't make
2488 * sense to have both direction flags, it does in this case.
2489 * We have one s/g element being accessed in each direction.
2490 */
2491 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD;
2492
2493 /*
2494 * Set the direction flag on the first buffer in the SMP
2495 * passthrough request. We'll clear it for the second one.
2496 */
2497 sflags |= MPI2_SGE_FLAGS_DIRECTION |
2498 MPI2_SGE_FLAGS_END_OF_BUFFER;
2499 } else if (cm->cm_flags & MPR_CM_FLAGS_DATAOUT) {
2500 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
2501 dir = BUS_DMASYNC_PREWRITE;
2502 } else
2503 dir = BUS_DMASYNC_PREREAD;
2504
2505 for (i = 0; i < nsegs; i++) {
2506 if ((cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) && (i != 0)) {
2507 sflags &= ~MPI2_SGE_FLAGS_DIRECTION;
2508 }
2509 error = mpr_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len,
2510 sflags, nsegs - i);
2511 if (error != 0) {
2512 /* Resource shortage, roll back! */
2513 if (ratecheck(&sc->lastfail, &mpr_chainfail_interval))
2514 mpr_dprint(sc, MPR_INFO, "Out of chain frames, "
2515 "consider increasing hw.mpr.max_chains.\n");
2516 cm->cm_flags |= MPR_CM_FLAGS_CHAIN_FAILED;
2517 mpr_complete_command(sc, cm);
2518 return;
2519 }
2520 }
2521
2522 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir);
2523 mpr_enqueue_request(sc, cm);
2524
2525 return;
2526}
2527
2528static void
2529mpr_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize,
2530 int error)
2531{
2532 mpr_data_cb(arg, segs, nsegs, error);
2533}
2534
2535/*
2536 * This is the routine to enqueue commands ansynchronously.
2537 * Note that the only error path here is from bus_dmamap_load(), which can
2538 * return EINPROGRESS if it is waiting for resources. Other than this, it's
2539 * assumed that if you have a command in-hand, then you have enough credits
2540 * to use it.
2541 */
2542int
2543mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm)
2544{
2545 int error = 0;
2546
2547 if (cm->cm_flags & MPR_CM_FLAGS_USE_UIO) {
2548 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap,
2549 &cm->cm_uio, mpr_data_cb2, cm, 0);
2550 } else if (cm->cm_flags & MPR_CM_FLAGS_USE_CCB) {
2551 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap,
2552 cm->cm_data, mpr_data_cb, cm, 0);
2553 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) {
2554 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap,
2555 cm->cm_data, cm->cm_length, mpr_data_cb, cm, 0);
2556 } else {
2557 /* Add a zero-length element as needed */
2558 if (cm->cm_sge != NULL)
2559 mpr_add_dmaseg(cm, 0, 0, 0, 1);
2560 mpr_enqueue_request(sc, cm);
2561 }
2562
2563 return (error);
2564}
2565
2566/*
2567 * This is the routine to enqueue commands synchronously. An error of
2568 * EINPROGRESS from mpr_map_command() is ignored since the command will
2569 * be executed and enqueued automatically. Other errors come from msleep().
2570 */
2571int
2572mpr_wait_command(struct mpr_softc *sc, struct mpr_command *cm, int timeout,
2573 int sleep_flag)
2574{
2575 int error, rc;
2576 struct timeval cur_time, start_time;
2577
2578 if (sc->mpr_flags & MPR_FLAGS_DIAGRESET)
2579 return EBUSY;
2580
2581 cm->cm_complete = NULL;
2582 cm->cm_flags |= (MPR_CM_FLAGS_WAKEUP + MPR_CM_FLAGS_POLLED);
2583 error = mpr_map_command(sc, cm);
2584 if ((error != 0) && (error != EINPROGRESS))
2585 return (error);
2586
2587 // Check for context and wait for 50 mSec at a time until time has
2588 // expired or the command has finished. If msleep can't be used, need
2589 // to poll.
2590#if __FreeBSD_version >= 1000029
2591 if (curthread->td_no_sleeping)
2592#else //__FreeBSD_version < 1000029
2593 if (curthread->td_pflags & TDP_NOSLEEPING)
2594#endif //__FreeBSD_version >= 1000029
2595 sleep_flag = NO_SLEEP;
2596 getmicrotime(&start_time);
2597 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) {
2598 error = msleep(cm, &sc->mpr_mtx, 0, "mprwait", timeout*hz);
2599 } else {
2600 while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) {
2601 mpr_intr_locked(sc);
2602 if (sleep_flag == CAN_SLEEP)
2603 pause("mprwait", hz/20);
2604 else
2605 DELAY(50000);
2606
2607 getmicrotime(&cur_time);
2608 if ((cur_time.tv_sec - start_time.tv_sec) > timeout) {
2609 error = EWOULDBLOCK;
2610 break;
2611 }
2612 }
2613 }
2614
2615 if (error == EWOULDBLOCK) {
2616 mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__);
2617 rc = mpr_reinit(sc);
2618 mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? "success" :
2619 "failed");
2620 error = ETIMEDOUT;
2621 }
2622 return (error);
2623}
2624
2625/*
2626 * This is the routine to enqueue a command synchonously and poll for
2627 * completion. Its use should be rare.
2628 */
2629int
2630mpr_request_polled(struct mpr_softc *sc, struct mpr_command *cm)
2631{
2632 int error, timeout = 0, rc;
2633 struct timeval cur_time, start_time;
2634
2635 error = 0;
2636
2637 cm->cm_flags |= MPR_CM_FLAGS_POLLED;
2638 cm->cm_complete = NULL;
2639 mpr_map_command(sc, cm);
2640
2641 getmicrotime(&start_time);
2642 while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) {
2643 mpr_intr_locked(sc);
2644
2645 if (mtx_owned(&sc->mpr_mtx))
2646 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0,
2647 "mprpoll", hz/20);
2648 else
2649 pause("mprpoll", hz/20);
2650
2651 /*
2652 * Check for real-time timeout and fail if more than 60 seconds.
2653 */
2654 getmicrotime(&cur_time);
2655 timeout = cur_time.tv_sec - start_time.tv_sec;
2656 if (timeout > 60) {
2657 mpr_dprint(sc, MPR_FAULT, "polling failed\n");
2658 error = ETIMEDOUT;
2659 break;
2660 }
2661 }
2662
2663 if(error) {
2664 mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__);
2665 rc = mpr_reinit(sc);
2666 mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ?
2667 "success" : "failed");
2668 }
2669 return (error);
2670}
2671
2672/*
2673 * The MPT driver had a verbose interface for config pages. In this driver,
2674 * reduce it to much simplier terms, similar to the Linux driver.
2675 */
2676int
2677mpr_read_config_page(struct mpr_softc *sc, struct mpr_config_params *params)
2678{
2679 MPI2_CONFIG_REQUEST *req;
2680 struct mpr_command *cm;
2681 int error;
2682
2683 if (sc->mpr_flags & MPR_FLAGS_BUSY) {
2684 return (EBUSY);
2685 }
2686
2687 cm = mpr_alloc_command(sc);
2688 if (cm == NULL) {
2689 return (EBUSY);
2690 }
2691
2692 req = (MPI2_CONFIG_REQUEST *)cm->cm_req;
2693 req->Function = MPI2_FUNCTION_CONFIG;
2694 req->Action = params->action;
2695 req->SGLFlags = 0;
2696 req->ChainOffset = 0;
2697 req->PageAddress = params->page_address;
2698 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
2699 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr;
2700
2701 hdr = ¶ms->hdr.Ext;
2702 req->ExtPageType = hdr->ExtPageType;
2703 req->ExtPageLength = hdr->ExtPageLength;
2704 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
2705 req->Header.PageLength = 0; /* Must be set to zero */
2706 req->Header.PageNumber = hdr->PageNumber;
2707 req->Header.PageVersion = hdr->PageVersion;
2708 } else {
2709 MPI2_CONFIG_PAGE_HEADER *hdr;
2710
2711 hdr = ¶ms->hdr.Struct;
2712 req->Header.PageType = hdr->PageType;
2713 req->Header.PageNumber = hdr->PageNumber;
2714 req->Header.PageLength = hdr->PageLength;
2715 req->Header.PageVersion = hdr->PageVersion;
2716 }
2717
2718 cm->cm_data = params->buffer;
2719 cm->cm_length = params->length;
2720 cm->cm_sge = &req->PageBufferSGE;
2721 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
2722 cm->cm_flags = MPR_CM_FLAGS_SGE_SIMPLE | MPR_CM_FLAGS_DATAIN;
2723 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2724
2725 cm->cm_complete_data = params;
2726 if (params->callback != NULL) {
2727 cm->cm_complete = mpr_config_complete;
2728 return (mpr_map_command(sc, cm));
2729 } else {
2730 error = mpr_wait_command(sc, cm, 0, CAN_SLEEP);
2731 if (error) {
2732 mpr_dprint(sc, MPR_FAULT,
2733 "Error %d reading config page\n", error);
2734 mpr_free_command(sc, cm);
2735 return (error);
2736 }
2737 mpr_config_complete(sc, cm);
2738 }
2739
2740 return (0);
2741}
2742
2743int
2744mpr_write_config_page(struct mpr_softc *sc, struct mpr_config_params *params)
2745{
2746 return (EINVAL);
2747}
2748
2749static void
2750mpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm)
2751{
2752 MPI2_CONFIG_REPLY *reply;
2753 struct mpr_config_params *params;
2754
2755 MPR_FUNCTRACE(sc);
2756 params = cm->cm_complete_data;
2757
2758 if (cm->cm_data != NULL) {
2759 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap,
2760 BUS_DMASYNC_POSTREAD);
2761 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap);
2762 }
2763
2764 /*
2765 * XXX KDM need to do more error recovery? This results in the
2766 * device in question not getting probed.
2767 */
2768 if ((cm->cm_flags & MPR_CM_FLAGS_ERROR_MASK) != 0) {
2769 params->status = MPI2_IOCSTATUS_BUSY;
2770 goto done;
2771 }
2772
2773 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply;
2774 if (reply == NULL) {
2775 params->status = MPI2_IOCSTATUS_BUSY;
2776 goto done;
2777 }
2778 params->status = reply->IOCStatus;
2779 if (params->hdr.Ext.ExtPageType != 0) {
2780 params->hdr.Ext.ExtPageType = reply->ExtPageType;
2781 params->hdr.Ext.ExtPageLength = reply->ExtPageLength;
2782 } else {
2783 params->hdr.Struct.PageType = reply->Header.PageType;
2784 params->hdr.Struct.PageNumber = reply->Header.PageNumber;
2785 params->hdr.Struct.PageLength = reply->Header.PageLength;
2786 params->hdr.Struct.PageVersion = reply->Header.PageVersion;
2787 }
2788
2789done:
2790 mpr_free_command(sc, cm);
2791 if (params->callback != NULL)
2792 params->callback(sc, params);
2793
2794 return;
2795}
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