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mlx_pci.c (232854) mlx_pci.c (240608)
1/*-
2 * Copyright (c) 1999 Michael Smith
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1999 Michael Smith
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/mlx/mlx_pci.c 232854 2012-03-12 08:03:51Z scottl $");
28__FBSDID("$FreeBSD: head/sys/dev/mlx/mlx_pci.c 240608 2012-09-17 15:27:30Z jhb $");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/kernel.h>
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/kernel.h>
33#include <sys/lock.h>
33#include <sys/module.h>
34#include <sys/module.h>
35#include <sys/mutex.h>
36#include <sys/sx.h>
34
35#include <sys/bus.h>
36#include <sys/conf.h>
37
38#include <machine/bus.h>
39#include <machine/resource.h>
40#include <sys/rman.h>
41

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83} mlx_identifiers[] = {
84 {0x1069, 0x0001, 0x0000, 0x0000, MLX_IFTYPE_2, "Mylex version 2 RAID interface"},
85 {0x1069, 0x0002, 0x0000, 0x0000, MLX_IFTYPE_3, "Mylex version 3 RAID interface"},
86 {0x1069, 0x0010, 0x0000, 0x0000, MLX_IFTYPE_4, "Mylex version 4 RAID interface"},
87 {0x1011, 0x1065, 0x1069, 0x0020, MLX_IFTYPE_5, "Mylex version 5 RAID interface"},
88 {0, 0, 0, 0, 0, 0}
89};
90
37
38#include <sys/bus.h>
39#include <sys/conf.h>
40
41#include <machine/bus.h>
42#include <machine/resource.h>
43#include <sys/rman.h>
44

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86} mlx_identifiers[] = {
87 {0x1069, 0x0001, 0x0000, 0x0000, MLX_IFTYPE_2, "Mylex version 2 RAID interface"},
88 {0x1069, 0x0002, 0x0000, 0x0000, MLX_IFTYPE_3, "Mylex version 3 RAID interface"},
89 {0x1069, 0x0010, 0x0000, 0x0000, MLX_IFTYPE_4, "Mylex version 4 RAID interface"},
90 {0x1011, 0x1065, 0x1069, 0x0020, MLX_IFTYPE_5, "Mylex version 5 RAID interface"},
91 {0, 0, 0, 0, 0, 0}
92};
93
94static struct mlx_ident *
95mlx_pci_match(device_t dev)
96{
97 struct mlx_ident *m;
98
99 for (m = mlx_identifiers; m->vendor != 0; m++) {
100 if ((m->vendor == pci_get_vendor(dev)) &&
101 (m->device == pci_get_device(dev)) &&
102 ((m->subvendor == 0) || ((m->subvendor == pci_get_subvendor(dev)) &&
103 (m->subdevice == pci_get_subdevice(dev)))))
104 return (m);
105 }
106 return (NULL);
107}
108
91static int
92mlx_pci_probe(device_t dev)
93{
94 struct mlx_ident *m;
95
96 debug_called(1);
97
109static int
110mlx_pci_probe(device_t dev)
111{
112 struct mlx_ident *m;
113
114 debug_called(1);
115
98 for (m = mlx_identifiers; m->vendor != 0; m++) {
99 if ((m->vendor == pci_get_vendor(dev)) &&
100 (m->device == pci_get_device(dev)) &&
101 ((m->subvendor == 0) || ((m->subvendor == pci_get_subvendor(dev)) &&
102 (m->subdevice == pci_get_subdevice(dev))))) {
103
104 device_set_desc(dev, m->desc);
105 return(BUS_PROBE_DEFAULT);
106 }
116 m = mlx_pci_match(dev);
117 if (m != NULL) {
118 device_set_desc(dev, m->desc);
119 return(BUS_PROBE_DEFAULT);
107 }
108 return(ENXIO);
109}
110
111static int
112mlx_pci_attach(device_t dev)
113{
114 struct mlx_softc *sc;
120 }
121 return(ENXIO);
122}
123
124static int
125mlx_pci_attach(device_t dev)
126{
127 struct mlx_softc *sc;
115 int i, error;
116 u_int32_t command;
128 struct mlx_ident *m;
129 int error;
117
118 debug_called(1);
119
130
131 debug_called(1);
132
120 /*
121 * Make sure we are going to be able to talk to this board.
122 */
123 command = pci_read_config(dev, PCIR_COMMAND, 2);
124 if ((command & PCIM_CMD_MEMEN) == 0) {
125 device_printf(dev, "memory window not available\n");
126 return(ENXIO);
127 }
128 /* force the busmaster enable bit on */
129 command |= PCIM_CMD_BUSMASTEREN;
130 pci_write_config(dev, PCIR_COMMAND, command, 2);
133 pci_enable_busmaster(dev);
131
134
132 /*
133 * Initialise softc.
134 */
135 sc = device_get_softc(dev);
135 sc = device_get_softc(dev);
136 bzero(sc, sizeof(*sc));
137 sc->mlx_dev = dev;
138
139 /*
140 * Work out what sort of adapter this is (we need to know this in order
141 * to map the appropriate interface resources).
142 */
136 sc->mlx_dev = dev;
137
138 /*
139 * Work out what sort of adapter this is (we need to know this in order
140 * to map the appropriate interface resources).
141 */
143 sc->mlx_iftype = 0;
144 for (i = 0; mlx_identifiers[i].vendor != 0; i++) {
145 if ((mlx_identifiers[i].vendor == pci_get_vendor(dev)) &&
146 (mlx_identifiers[i].device == pci_get_device(dev))) {
147 sc->mlx_iftype = mlx_identifiers[i].iftype;
148 break;
149 }
150 }
151 if (sc->mlx_iftype == 0) /* shouldn't happen */
142 m = mlx_pci_match(dev);
143 if (m == NULL) /* shouldn't happen */
152 return(ENXIO);
144 return(ENXIO);
153
145 sc->mlx_iftype = m->iftype;
146
147 mtx_init(&sc->mlx_io_lock, "mlx I/O", NULL, MTX_DEF);
148 sx_init(&sc->mlx_config_lock, "mlx config");
149 callout_init_mtx(&sc->mlx_timeout, &sc->mlx_io_lock, 0);
150
154 /*
155 * Allocate the PCI register window.
156 */
157
158 /* type 2/3 adapters have an I/O region we don't prefer at base 0 */
159 switch(sc->mlx_iftype) {
160 case MLX_IFTYPE_2:
161 case MLX_IFTYPE_3:

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178 &sc->mlx_mem_rid, RF_ACTIVE);
179 break;
180 }
181 if (sc->mlx_mem == NULL) {
182 device_printf(sc->mlx_dev, "couldn't allocate mailbox window\n");
183 mlx_free(sc);
184 return(ENXIO);
185 }
151 /*
152 * Allocate the PCI register window.
153 */
154
155 /* type 2/3 adapters have an I/O region we don't prefer at base 0 */
156 switch(sc->mlx_iftype) {
157 case MLX_IFTYPE_2:
158 case MLX_IFTYPE_3:

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175 &sc->mlx_mem_rid, RF_ACTIVE);
176 break;
177 }
178 if (sc->mlx_mem == NULL) {
179 device_printf(sc->mlx_dev, "couldn't allocate mailbox window\n");
180 mlx_free(sc);
181 return(ENXIO);
182 }
186 sc->mlx_btag = rman_get_bustag(sc->mlx_mem);
187 sc->mlx_bhandle = rman_get_bushandle(sc->mlx_mem);
188
189 /*
190 * Allocate the parent bus DMA tag appropriate for PCI.
191 */
192 error = bus_dma_tag_create(bus_get_dma_tag(dev), /* PCI parent */
193 1, 0, /* alignment, boundary */
194 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
195 BUS_SPACE_MAXADDR, /* highaddr */

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184 /*
185 * Allocate the parent bus DMA tag appropriate for PCI.
186 */
187 error = bus_dma_tag_create(bus_get_dma_tag(dev), /* PCI parent */
188 1, 0, /* alignment, boundary */
189 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
190 BUS_SPACE_MAXADDR, /* highaddr */

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