| mk48txxreg.h (146416) | mk48txxreg.h (201003) |
|---|---|
| 1/*- 2 * Copyright (c) 2000 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Paul Kranenburg. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 21 unchanged lines hidden (view full) --- 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 * 36 * from: NetBSD: mk48txxreg.h,v 1.7 2003/11/01 22:41:42 tsutsui Exp 37 * | 1/*- 2 * Copyright (c) 2000 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Paul Kranenburg. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 21 unchanged lines hidden (view full) --- 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 * 36 * from: NetBSD: mk48txxreg.h,v 1.7 2003/11/01 22:41:42 tsutsui Exp 37 * |
| 38 * $FreeBSD: head/sys/dev/mk48txx/mk48txxreg.h 146416 2005-05-19 21:16:50Z marius $ | 38 * $FreeBSD: head/sys/dev/mk48txx/mk48txxreg.h 201003 2009-12-25 21:32:26Z marius $ |
| 39 */ 40 41/* 42 * Mostek MK48Txx clocks. 43 * 44 * The MK48T02 has 2KB of non-volatile memory. The time-of-day clock 45 * registers start at offset 0x7f8. 46 * --- 7 unchanged lines hidden (view full) --- 54/* 55 * Mostek MK48TXX register definitions 56 */ 57 58/* 59 * The first bank of eight registers at offset (nvramsz - 16) is 60 * available only on recenter (which?) MK48Txx models. 61 */ | 39 */ 40 41/* 42 * Mostek MK48Txx clocks. 43 * 44 * The MK48T02 has 2KB of non-volatile memory. The time-of-day clock 45 * registers start at offset 0x7f8. 46 * --- 7 unchanged lines hidden (view full) --- 54/* 55 * Mostek MK48TXX register definitions 56 */ 57 58/* 59 * The first bank of eight registers at offset (nvramsz - 16) is 60 * available only on recenter (which?) MK48Txx models. 61 */ |
| 62#define MK48TXX_FLAGS 0 /* flags register */ 63#define MK48TXX_UNUSED 1 /* unused */ 64#define MK48TXX_ASEC 2 /* alarm seconds (0..59; BCD) */ 65#define MK48TXX_AMIN 3 /* alarm minutes (0..59; BCD) */ 66#define MK48TXX_AHOUR 4 /* alarm hours (0..23; BCD) */ 67#define MK48TXX_ADAY 5 /* alarm day in month (1..31; BCD) */ 68#define MK48TXX_INTR 6 /* interrupts register */ 69#define MK48TXX_WDOG 7 /* watchdog register */ | 62#define MK48TXX_FLAGS 0 /* flags register */ 63#define MK48TXX_UNUSED 1 /* unused */ 64#define MK48TXX_ASEC 2 /* alarm seconds (0..59; BCD) */ 65#define MK48TXX_AMIN 3 /* alarm minutes (0..59; BCD) */ 66#define MK48TXX_AHOUR 4 /* alarm hours (0..23; BCD) */ 67#define MK48TXX_ADAY 5 /* alarm day in month (1..31; BCD) */ 68#define MK48TXX_INTR 6 /* interrupts register */ 69#define MK48TXX_WDOG 7 /* watchdog register */ |
| 70 | 70 |
| 71#define MK48TXX_ICSR 8 /* control register */ 72#define MK48TXX_ISEC 9 /* seconds (0..59; BCD) */ 73#define MK48TXX_IMIN 10 /* minutes (0..59; BCD) */ 74#define MK48TXX_IHOUR 11 /* hours (0..23; BCD) */ 75#define MK48TXX_IWDAY 12 /* weekday (1..7) */ 76#define MK48TXX_IDAY 13 /* day in month (1..31; BCD) */ 77#define MK48TXX_IMON 14 /* month (1..12; BCD) */ 78#define MK48TXX_IYEAR 15 /* year (0..99; BCD) */ | 71#define MK48TXX_ICSR 8 /* control register */ 72#define MK48TXX_ISEC 9 /* seconds (0..59; BCD) */ 73#define MK48TXX_IMIN 10 /* minutes (0..59; BCD) */ 74#define MK48TXX_IHOUR 11 /* hours (0..23; BCD) */ 75#define MK48TXX_IWDAY 12 /* weekday (1..7) */ 76#define MK48TXX_IDAY 13 /* day in month (1..31; BCD) */ 77#define MK48TXX_IMON 14 /* month (1..12; BCD) */ 78#define MK48TXX_IYEAR 15 /* year (0..99; BCD) */ |
| 79 80/* 81 * Note that some of the bits below that are not in the first eight 82 * registers are also only available on models with an extended 83 * register set. 84 */ 85 86/* Bits in the flags register (extended only) */ | 79 80/* 81 * Note that some of the bits below that are not in the first eight 82 * registers are also only available on models with an extended 83 * register set. 84 */ 85 86/* Bits in the flags register (extended only) */ |
| 87#define MK48TXX_FLAGS_BL 0x10 /* battery low (read only) */ 88#define MK48TXX_FLAGS_AF 0x40 /* alarm flag (read only) */ 89#define MK48TXX_FLAGS_WDF 0x80 /* watchdog flag (read only) */ | 87#define MK48TXX_FLAGS_BL 0x10 /* battery low (read only) */ 88#define MK48TXX_FLAGS_AF 0x40 /* alarm flag (read only) */ 89#define MK48TXX_FLAGS_WDF 0x80 /* watchdog flag (read only) */ |
| 90 91/* Bits in the alarm seconds register (extended only) */ | 90 91/* Bits in the alarm seconds register (extended only) */ |
| 92#define MK48TXX_ASEC_MASK 0x7f /* mask for alarm seconds */ 93#define MK48TXX_ASEC_RPT1 0x80 /* alarm repeat mode bit 1 */ | 92#define MK48TXX_ASEC_MASK 0x7f /* mask for alarm seconds */ 93#define MK48TXX_ASEC_RPT1 0x80 /* alarm repeat mode bit 1 */ |
| 94 95/* Bits in the alarm minutes register (extended only) */ | 94 95/* Bits in the alarm minutes register (extended only) */ |
| 96#define MK48TXX_AMIN_MASK 0x7f /* mask for alarm minutes */ 97#define MK48TXX_AMIN_RPT2 0x80 /* alarm repeat mode bit 2 */ | 96#define MK48TXX_AMIN_MASK 0x7f /* mask for alarm minutes */ 97#define MK48TXX_AMIN_RPT2 0x80 /* alarm repeat mode bit 2 */ |
| 98 99/* Bits in the alarm hours register (extended only) */ | 98 99/* Bits in the alarm hours register (extended only) */ |
| 100#define MK48TXX_AHOUR_MASK 0x3f /* mask for alarm hours */ 101#define MK48TXX_AHOUR_RPT3 0x80 /* alarm repeat mode bit 3 */ | 100#define MK48TXX_AHOUR_MASK 0x3f /* mask for alarm hours */ 101#define MK48TXX_AHOUR_RPT3 0x80 /* alarm repeat mode bit 3 */ |
| 102 103/* Bits in the alarm day in month register (extended only) */ | 102 103/* Bits in the alarm day in month register (extended only) */ |
| 104#define MK48TXX_ADAY_MASK 0x3f /* mask for alarm day in month */ 105#define MK48TXX_ADAY_RPT4 0x80 /* alarm repeat mode bit 4 */ | 104#define MK48TXX_ADAY_MASK 0x3f /* mask for alarm day in month */ 105#define MK48TXX_ADAY_RPT4 0x80 /* alarm repeat mode bit 4 */ |
| 106 107/* Bits in the interrupts register (extended only) */ | 106 107/* Bits in the interrupts register (extended only) */ |
| 108#define MK48TXX_INTR_ABE 0x20 /* alarm in battery back-up mode */ 109#define MK48TXX_INTR_AFE 0x80 /* alarm flag enable */ | 108#define MK48TXX_INTR_ABE 0x20 /* alarm in battery back-up mode */ 109#define MK48TXX_INTR_AFE 0x80 /* alarm flag enable */ |
| 110 111/* Bits in the watchdog register (extended only) */ | 110 111/* Bits in the watchdog register (extended only) */ |
| 112#define MK48TXX_WDOG_RB_1_16 0x00 /* watchdog resolution 1/16 second */ 113#define MK48TXX_WDOG_RB_1_4 0x01 /* watchdog resolution 1/4 second */ 114#define MK48TXX_WDOG_RB_1 0x02 /* watchdog resolution 1 second */ 115#define MK48TXX_WDOG_RB_4 0x03 /* watchdog resolution 4 seconds */ 116#define MK48TXX_WDOG_BMB_MASK 0x7c /* mask for watchdog multiplier */ 117#define MK48TXX_WDOG_BMB_SHIFT 2 /* shift for watchdog multiplier */ 118#define MK48TXX_WDOG_WDS 0x80 /* watchdog steering bit */ | 112#define MK48TXX_WDOG_RB_1_16 0x00 /* watchdog resolution 1/16 second */ 113#define MK48TXX_WDOG_RB_1_4 0x01 /* watchdog resolution 1/4 second */ 114#define MK48TXX_WDOG_RB_1 0x02 /* watchdog resolution 1 second */ 115#define MK48TXX_WDOG_RB_4 0x03 /* watchdog resolution 4 seconds */ 116#define MK48TXX_WDOG_BMB_MASK 0x7c /* mask for watchdog multiplier */ 117#define MK48TXX_WDOG_BMB_SHIFT 2 /* shift for watchdog multiplier */ 118#define MK48TXX_WDOG_WDS 0x80 /* watchdog steering bit */ |
| 119 120/* Bits in the control register */ | 119 120/* Bits in the control register */ |
| 121#define MK48TXX_CSR_CALIB_MASK 0x1f /* mask for calibration step width */ 122#define MK48TXX_CSR_SIGN 0x20 /* sign of above calibration witdh */ 123#define MK48TXX_CSR_READ 0x40 /* want to read (freeze clock) */ 124#define MK48TXX_CSR_WRITE 0x80 /* want to write */ | 121#define MK48TXX_CSR_CALIB_MASK 0x1f /* mask for calibration step width */ 122#define MK48TXX_CSR_SIGN 0x20 /* sign of above calibration witdh */ 123#define MK48TXX_CSR_READ 0x40 /* want to read (freeze clock) */ 124#define MK48TXX_CSR_WRITE 0x80 /* want to write */ |
| 125 126/* Bits in the seconds register */ | 125 126/* Bits in the seconds register */ |
| 127#define MK48TXX_SEC_MASK 0x7f /* mask for seconds */ 128#define MK48TXX_SEC_ST 0x80 /* stop oscillator */ | 127#define MK48TXX_SEC_MASK 0x7f /* mask for seconds */ 128#define MK48TXX_SEC_ST 0x80 /* stop oscillator */ |
| 129 130/* Bits in the minutes register */ | 129 130/* Bits in the minutes register */ |
| 131#define MK48TXX_MIN_MASK 0x7f /* mask for minutes */ | 131#define MK48TXX_MIN_MASK 0x7f /* mask for minutes */ |
| 132 133/* Bits in the hours register */ | 132 133/* Bits in the hours register */ |
| 134#define MK48TXX_HOUR_MASK 0x3f /* mask for hours */ | 134#define MK48TXX_HOUR_MASK 0x3f /* mask for hours */ |
| 135 136/* Bits in the century/weekday register */ | 135 136/* Bits in the century/weekday register */ |
| 137#define MK48TXX_WDAY_MASK 0x07 /* mask for weekday */ 138#define MK48TXX_WDAY_CB 0x10 /* century bit (extended only) */ 139#define MK48TXX_WDAY_CB_SHIFT 4 /* shift for century bit */ 140#define MK48TXX_WDAY_CEB 0x20 /* century enable bit (extended only) */ 141#define MK48TXX_WDAY_FT 0x40 /* frequency test */ | 137#define MK48TXX_WDAY_MASK 0x07 /* mask for weekday */ 138#define MK48TXX_WDAY_CB 0x10 /* century bit (extended only) */ 139#define MK48TXX_WDAY_CB_SHIFT 4 /* shift for century bit */ 140#define MK48TXX_WDAY_CEB 0x20 /* century enable bit (extended only) */ 141#define MK48TXX_WDAY_FT 0x40 /* frequency test */ |
| 142 143/* Bits in the day in month register */ | 142 143/* Bits in the day in month register */ |
| 144#define MK48TXX_DAY_MASK 0x3f /* mask for day in month */ | 144#define MK48TXX_DAY_MASK 0x3f /* mask for day in month */ |
| 145 146/* Bits in the month register */ | 145 146/* Bits in the month register */ |
| 147#define MK48TXX_MON_MASK 0x1f /* mask for month */ | 147#define MK48TXX_MON_MASK 0x1f /* mask for month */ |
| 148 149/* Bits in the year register */ | 148 149/* Bits in the year register */ |
| 150#define MK48TXX_YEAR_MASK 0xff /* mask for year */ | 150#define MK48TXX_YEAR_MASK 0xff /* mask for year */ |
| 151 152/* Model specific NVRAM sizes and clock offsets */ | 151 152/* Model specific NVRAM sizes and clock offsets */ |
| 153#define MK48T02_CLKSZ 2048 154#define MK48T02_CLKOFF 0x7f0 | 153#define MK48T02_CLKSZ 2048 154#define MK48T02_CLKOFF 0x7f0 |
| 155 | 155 |
| 156#define MK48T08_CLKSZ 8192 157#define MK48T08_CLKOFF 0x1ff0 | 156#define MK48T08_CLKSZ 8192 157#define MK48T08_CLKOFF 0x1ff0 |
| 158 | 158 |
| 159#define MK48T18_CLKSZ 8192 160#define MK48T18_CLKOFF 0x1ff0 | 159#define MK48T18_CLKSZ 8192 160#define MK48T18_CLKOFF 0x1ff0 |
| 161 | 161 |
| 162#define MK48T59_CLKSZ 8192 163#define MK48T59_CLKOFF 0x1ff0 | 162#define MK48T59_CLKSZ 8192 163#define MK48T59_CLKOFF 0x1ff0 |