| mk48txxreg.h (137813) | mk48txxreg.h (146416) |
|---|---|
| 1/*- 2 * Copyright (c) 2000 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Paul Kranenburg. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 21 unchanged lines hidden (view full) --- 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 * 36 * from: NetBSD: mk48txxreg.h,v 1.7 2003/11/01 22:41:42 tsutsui Exp 37 * | 1/*- 2 * Copyright (c) 2000 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Paul Kranenburg. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 21 unchanged lines hidden (view full) --- 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 * 36 * from: NetBSD: mk48txxreg.h,v 1.7 2003/11/01 22:41:42 tsutsui Exp 37 * |
| 38 * $FreeBSD: head/sys/dev/mk48txx/mk48txxreg.h 137813 2004-11-17 12:54:12Z marius $ | 38 * $FreeBSD: head/sys/dev/mk48txx/mk48txxreg.h 146416 2005-05-19 21:16:50Z marius $ |
| 39 */ 40 41/* 42 * Mostek MK48Txx clocks. 43 * 44 * The MK48T02 has 2KB of non-volatile memory. The time-of-day clock 45 * registers start at offset 0x7f8. 46 * --- 62 unchanged lines hidden (view full) --- 109#define MK48TXX_INTR_AFE 0x80 /* alarm flag enable */ 110 111/* Bits in the watchdog register (extended only) */ 112#define MK48TXX_WDOG_RB_1_16 0x00 /* watchdog resolution 1/16 second */ 113#define MK48TXX_WDOG_RB_1_4 0x01 /* watchdog resolution 1/4 second */ 114#define MK48TXX_WDOG_RB_1 0x02 /* watchdog resolution 1 second */ 115#define MK48TXX_WDOG_RB_4 0x03 /* watchdog resolution 4 seconds */ 116#define MK48TXX_WDOG_BMB_MASK 0x7c /* mask for watchdog multiplier */ | 39 */ 40 41/* 42 * Mostek MK48Txx clocks. 43 * 44 * The MK48T02 has 2KB of non-volatile memory. The time-of-day clock 45 * registers start at offset 0x7f8. 46 * --- 62 unchanged lines hidden (view full) --- 109#define MK48TXX_INTR_AFE 0x80 /* alarm flag enable */ 110 111/* Bits in the watchdog register (extended only) */ 112#define MK48TXX_WDOG_RB_1_16 0x00 /* watchdog resolution 1/16 second */ 113#define MK48TXX_WDOG_RB_1_4 0x01 /* watchdog resolution 1/4 second */ 114#define MK48TXX_WDOG_RB_1 0x02 /* watchdog resolution 1 second */ 115#define MK48TXX_WDOG_RB_4 0x03 /* watchdog resolution 4 seconds */ 116#define MK48TXX_WDOG_BMB_MASK 0x7c /* mask for watchdog multiplier */ |
| 117#define MK48TXX_WDOG_BMB_SHIFT 2 /* shift for watchdog multiplier */ |
|
| 117#define MK48TXX_WDOG_WDS 0x80 /* watchdog steering bit */ 118 119/* Bits in the control register */ 120#define MK48TXX_CSR_CALIB_MASK 0x1f /* mask for calibration step width */ 121#define MK48TXX_CSR_SIGN 0x20 /* sign of above calibration witdh */ 122#define MK48TXX_CSR_READ 0x40 /* want to read (freeze clock) */ 123#define MK48TXX_CSR_WRITE 0x80 /* want to write */ 124 --- 5 unchanged lines hidden (view full) --- 130#define MK48TXX_MIN_MASK 0x7f /* mask for minutes */ 131 132/* Bits in the hours register */ 133#define MK48TXX_HOUR_MASK 0x3f /* mask for hours */ 134 135/* Bits in the century/weekday register */ 136#define MK48TXX_WDAY_MASK 0x07 /* mask for weekday */ 137#define MK48TXX_WDAY_CB 0x10 /* century bit (extended only) */ | 118#define MK48TXX_WDOG_WDS 0x80 /* watchdog steering bit */ 119 120/* Bits in the control register */ 121#define MK48TXX_CSR_CALIB_MASK 0x1f /* mask for calibration step width */ 122#define MK48TXX_CSR_SIGN 0x20 /* sign of above calibration witdh */ 123#define MK48TXX_CSR_READ 0x40 /* want to read (freeze clock) */ 124#define MK48TXX_CSR_WRITE 0x80 /* want to write */ 125 --- 5 unchanged lines hidden (view full) --- 131#define MK48TXX_MIN_MASK 0x7f /* mask for minutes */ 132 133/* Bits in the hours register */ 134#define MK48TXX_HOUR_MASK 0x3f /* mask for hours */ 135 136/* Bits in the century/weekday register */ 137#define MK48TXX_WDAY_MASK 0x07 /* mask for weekday */ 138#define MK48TXX_WDAY_CB 0x10 /* century bit (extended only) */ |
| 139#define MK48TXX_WDAY_CB_SHIFT 4 /* shift for century bit */ |
|
| 138#define MK48TXX_WDAY_CEB 0x20 /* century enable bit (extended only) */ 139#define MK48TXX_WDAY_FT 0x40 /* frequency test */ 140 141/* Bits in the day in month register */ 142#define MK48TXX_DAY_MASK 0x3f /* mask for day in month */ 143 144/* Bits in the month register */ 145#define MK48TXX_MON_MASK 0x1f /* mask for month */ --- 16 unchanged lines hidden --- | 140#define MK48TXX_WDAY_CEB 0x20 /* century enable bit (extended only) */ 141#define MK48TXX_WDAY_FT 0x40 /* frequency test */ 142 143/* Bits in the day in month register */ 144#define MK48TXX_DAY_MASK 0x3f /* mask for day in month */ 145 146/* Bits in the month register */ 147#define MK48TXX_MON_MASK 0x1f /* mask for month */ --- 16 unchanged lines hidden --- |