| ciphy.c (164830) | ciphy.c (170365) |
|---|---|
| 1/*- 2 * Copyright (c) 2004 3 * Bill Paul <wpaul@windriver.com>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 17 unchanged lines hidden (view full) --- 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2004 3 * Bill Paul <wpaul@windriver.com>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 17 unchanged lines hidden (view full) --- 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> |
| 34__FBSDID("$FreeBSD: head/sys/dev/mii/ciphy.c 164830 2006-12-02 19:36:25Z marius $"); | 34__FBSDID("$FreeBSD: head/sys/dev/mii/ciphy.c 170365 2007-06-06 06:55:49Z yongari $"); |
| 35 36/* 37 * Driver for the Cicada CS8201 10/100/1000 copper PHY. 38 */ 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/kernel.h> --- 43 unchanged lines hidden (view full) --- 86static void ciphy_status(struct mii_softc *); 87static void ciphy_reset(struct mii_softc *); 88static void ciphy_fixup(struct mii_softc *); 89 90static const struct mii_phydesc ciphys[] = { 91 MII_PHY_DESC(CICADA, CS8201), 92 MII_PHY_DESC(CICADA, CS8201A), 93 MII_PHY_DESC(CICADA, CS8201B), | 35 36/* 37 * Driver for the Cicada CS8201 10/100/1000 copper PHY. 38 */ 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/kernel.h> --- 43 unchanged lines hidden (view full) --- 86static void ciphy_status(struct mii_softc *); 87static void ciphy_reset(struct mii_softc *); 88static void ciphy_fixup(struct mii_softc *); 89 90static const struct mii_phydesc ciphys[] = { 91 MII_PHY_DESC(CICADA, CS8201), 92 MII_PHY_DESC(CICADA, CS8201A), 93 MII_PHY_DESC(CICADA, CS8201B), |
| 94 MII_PHY_DESC(VITESSE, VSC8601), |
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| 94 MII_PHY_END 95}; 96 97static int 98ciphy_probe(device_t dev) 99{ 100 101 return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT)); --- 247 unchanged lines hidden (view full) --- 349#define PHY_CLRBIT(x, y, z) \ 350 PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z))) 351 352static void 353ciphy_fixup(struct mii_softc *sc) 354{ 355 uint16_t model; 356 uint16_t status, speed; | 95 MII_PHY_END 96}; 97 98static int 99ciphy_probe(device_t dev) 100{ 101 102 return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT)); --- 247 unchanged lines hidden (view full) --- 350#define PHY_CLRBIT(x, y, z) \ 351 PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z))) 352 353static void 354ciphy_fixup(struct mii_softc *sc) 355{ 356 uint16_t model; 357 uint16_t status, speed; |
| 358 uint16_t val; |
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| 357 358 model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2)); 359 status = PHY_READ(sc, CIPHY_MII_AUXCSR); 360 speed = status & CIPHY_AUXCSR_SPEED; 361 | 359 360 model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2)); 361 status = PHY_READ(sc, CIPHY_MII_AUXCSR); 362 speed = status & CIPHY_AUXCSR_SPEED; 363 |
| 364 if (strcmp(device_get_name(device_get_parent(sc->mii_dev)), 365 "nfe") == 0) { 366 /* need to set for 2.5V RGMII for NVIDIA adapters */ 367 val = PHY_READ(sc, CIPHY_MII_ECTL1); 368 val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL); 369 val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII); 370 PHY_WRITE(sc, CIPHY_MII_ECTL1, val); 371 /* From Linux. */ 372 val = PHY_READ(sc, CIPHY_MII_AUXCSR); 373 val |= CIPHY_AUXCSR_MDPPS; 374 PHY_WRITE(sc, CIPHY_MII_AUXCSR, val); 375 val = PHY_READ(sc, CIPHY_MII_10BTCSR); 376 val |= CIPHY_10BTCSR_ECHO; 377 PHY_WRITE(sc, CIPHY_MII_10BTCSR, val); 378 } 379 |
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| 362 switch (model) { 363 case MII_MODEL_CICADA_CS8201: 364 365 /* Turn off "aux mode" (whatever that means) */ 366 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS); 367 368 /* 369 * Work around speed polling bug in VT3119/VT3216 --- 21 unchanged lines hidden (view full) --- 391 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 392 (status & CIPHY_AUXCSR_FDX)) { 393 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 394 } else { 395 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 396 } 397 398 break; | 380 switch (model) { 381 case MII_MODEL_CICADA_CS8201: 382 383 /* Turn off "aux mode" (whatever that means) */ 384 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS); 385 386 /* 387 * Work around speed polling bug in VT3119/VT3216 --- 21 unchanged lines hidden (view full) --- 409 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) && 410 (status & CIPHY_AUXCSR_FDX)) { 411 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 412 } else { 413 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); 414 } 415 416 break; |
| 417 case MII_MODEL_VITESSE_VSC8601: 418 break; |
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| 399 default: 400 device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n", 401 model); 402 break; 403 } 404} | 419 default: 420 device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n", 421 model); 422 break; 423 } 424} |