1/*-
2 * Copyright (c) 2006 IronPort Systems
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26/*-
27 * Copyright (c) 2007 LSI Corp.
28 * Copyright (c) 2007 Rajesh Prabhakaran.
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
33 * are met:
34 * 1. Redistributions of source code must retain the above copyright
35 * notice, this list of conditions and the following disclaimer.
36 * 2. Redistributions in binary form must reproduce the above copyright
37 * notice, this list of conditions and the following disclaimer in the
38 * documentation and/or other materials provided with the distribution.
39 *
40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
50 * SUCH DAMAGE.
51 */
52
53#include <sys/cdefs.h>
| 1/*-
2 * Copyright (c) 2006 IronPort Systems
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26/*-
27 * Copyright (c) 2007 LSI Corp.
28 * Copyright (c) 2007 Rajesh Prabhakaran.
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
33 * are met:
34 * 1. Redistributions of source code must retain the above copyright
35 * notice, this list of conditions and the following disclaimer.
36 * 2. Redistributions in binary form must reproduce the above copyright
37 * notice, this list of conditions and the following disclaimer in the
38 * documentation and/or other materials provided with the distribution.
39 *
40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
50 * SUCH DAMAGE.
51 */
52
53#include <sys/cdefs.h>
|
55
56/* PCI/PCI-X/PCIe bus interface for the LSI MegaSAS controllers */
57
58#include "opt_mfi.h"
59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/kernel.h>
63#include <sys/selinfo.h>
64#include <sys/module.h>
65#include <sys/bus.h>
66#include <sys/conf.h>
67#include <sys/bio.h>
68#include <sys/malloc.h>
69#include <sys/sysctl.h>
70#include <sys/uio.h>
71
72#include <machine/bus.h>
73#include <machine/resource.h>
74#include <sys/rman.h>
75
76#include <dev/pci/pcireg.h>
77#include <dev/pci/pcivar.h>
78
79#include <dev/mfi/mfireg.h>
80#include <dev/mfi/mfi_ioctl.h>
81#include <dev/mfi/mfivar.h>
82
83static int mfi_pci_probe(device_t);
84static int mfi_pci_attach(device_t);
85static int mfi_pci_detach(device_t);
86static int mfi_pci_suspend(device_t);
87static int mfi_pci_resume(device_t);
88static void mfi_pci_free(struct mfi_softc *);
89
90static device_method_t mfi_methods[] = {
91 DEVMETHOD(device_probe, mfi_pci_probe),
92 DEVMETHOD(device_attach, mfi_pci_attach),
93 DEVMETHOD(device_detach, mfi_pci_detach),
94 DEVMETHOD(device_suspend, mfi_pci_suspend),
95 DEVMETHOD(device_resume, mfi_pci_resume),
96
97 DEVMETHOD_END
98};
99
100static driver_t mfi_pci_driver = {
101 "mfi",
102 mfi_methods,
103 sizeof(struct mfi_softc)
104};
105
106static devclass_t mfi_devclass;
107DRIVER_MODULE(mfi, pci, mfi_pci_driver, mfi_devclass, 0, 0);
108MODULE_VERSION(mfi, 1);
109
110static int mfi_msi = 1;
111TUNABLE_INT("hw.mfi.msi", &mfi_msi);
112SYSCTL_INT(_hw_mfi, OID_AUTO, msi, CTLFLAG_RDTUN, &mfi_msi, 0,
113 "Enable use of MSI interrupts");
114
115struct mfi_ident {
116 uint16_t vendor;
117 uint16_t device;
118 uint16_t subvendor;
119 uint16_t subdevice;
120 int flags;
121 const char *desc;
122} mfi_identifiers[] = {
123 {0x1000, 0x005b, 0x1028, 0x1f2d, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H810 Adapter"},
124 {0x1000, 0x005b, 0x1028, 0x1f30, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710 Embedded"},
125 {0x1000, 0x005b, 0x1028, 0x1f31, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710P Adapter"},
126 {0x1000, 0x005b, 0x1028, 0x1f33, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710P Mini (blades)"},
127 {0x1000, 0x005b, 0x1028, 0x1f34, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710P Mini (monolithics)"},
128 {0x1000, 0x005b, 0x1028, 0x1f35, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710 Adapter"},
129 {0x1000, 0x005b, 0x1028, 0x1f37, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710 Mini (blades)"},
130 {0x1000, 0x005b, 0x1028, 0x1f38, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710 Mini (monolithics)"},
131 {0x1000, 0x005b, 0x8086, 0x9265, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Intel (R) RAID Controller RS25DB080"},
132 {0x1000, 0x005b, 0x8086, 0x9285, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Intel (R) RAID Controller RS25NB008"},
133 {0x1000, 0x005b, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "ThunderBolt"},
134 {0x1000, 0x0060, 0x1028, 0xffff, MFI_FLAGS_1078, "Dell PERC 6"},
135 {0x1000, 0x0060, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"},
136 {0x1000, 0x0071, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"},
137 {0x1000, 0x0073, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"},
138 {0x1000, 0x0078, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"},
139 {0x1000, 0x0079, 0x1028, 0x1f15, MFI_FLAGS_GEN2, "Dell PERC H800 Adapter"},
140 {0x1000, 0x0079, 0x1028, 0x1f16, MFI_FLAGS_GEN2, "Dell PERC H700 Adapter"},
141 {0x1000, 0x0079, 0x1028, 0x1f17, MFI_FLAGS_GEN2, "Dell PERC H700 Integrated"},
142 {0x1000, 0x0079, 0x1028, 0x1f18, MFI_FLAGS_GEN2, "Dell PERC H700 Modular"},
143 {0x1000, 0x0079, 0x1028, 0x1f19, MFI_FLAGS_GEN2, "Dell PERC H700"},
144 {0x1000, 0x0079, 0x1028, 0x1f1a, MFI_FLAGS_GEN2, "Dell PERC H800 Proto Adapter"},
145 {0x1000, 0x0079, 0x1028, 0x1f1b, MFI_FLAGS_GEN2, "Dell PERC H800"},
146 {0x1000, 0x0079, 0x1028, 0xffff, MFI_FLAGS_GEN2, "Dell PERC Gen2"},
147 {0x1000, 0x0079, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"},
148 {0x1000, 0x007c, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"},
149 {0x1000, 0x0411, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Brocton IOP */
150 {0x1000, 0x0413, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Verde ZCR */
151 {0x1028, 0x0015, 0xffff, 0xffff, MFI_FLAGS_1064R, "Dell PERC 5/i"},
152 {0, 0, 0, 0, 0, NULL}
153};
154
155static struct mfi_ident *
156mfi_find_ident(device_t dev)
157{
158 struct mfi_ident *m;
159
160 for (m = mfi_identifiers; m->vendor != 0; m++) {
161 if ((m->vendor == pci_get_vendor(dev)) &&
162 (m->device == pci_get_device(dev)) &&
163 ((m->subvendor == pci_get_subvendor(dev)) ||
164 (m->subvendor == 0xffff)) &&
165 ((m->subdevice == pci_get_subdevice(dev)) ||
166 (m->subdevice == 0xffff)))
167 return (m);
168 }
169
170 return (NULL);
171}
172
173static int
174mfi_pci_probe(device_t dev)
175{
176 struct mfi_ident *id;
177
178 if ((id = mfi_find_ident(dev)) != NULL) {
179 device_set_desc(dev, id->desc);
180 return (BUS_PROBE_DEFAULT);
181 }
182 return (ENXIO);
183}
184
185static int
186mfi_pci_attach(device_t dev)
187{
188 struct mfi_softc *sc;
189 struct mfi_ident *m;
| 55
56/* PCI/PCI-X/PCIe bus interface for the LSI MegaSAS controllers */
57
58#include "opt_mfi.h"
59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/kernel.h>
63#include <sys/selinfo.h>
64#include <sys/module.h>
65#include <sys/bus.h>
66#include <sys/conf.h>
67#include <sys/bio.h>
68#include <sys/malloc.h>
69#include <sys/sysctl.h>
70#include <sys/uio.h>
71
72#include <machine/bus.h>
73#include <machine/resource.h>
74#include <sys/rman.h>
75
76#include <dev/pci/pcireg.h>
77#include <dev/pci/pcivar.h>
78
79#include <dev/mfi/mfireg.h>
80#include <dev/mfi/mfi_ioctl.h>
81#include <dev/mfi/mfivar.h>
82
83static int mfi_pci_probe(device_t);
84static int mfi_pci_attach(device_t);
85static int mfi_pci_detach(device_t);
86static int mfi_pci_suspend(device_t);
87static int mfi_pci_resume(device_t);
88static void mfi_pci_free(struct mfi_softc *);
89
90static device_method_t mfi_methods[] = {
91 DEVMETHOD(device_probe, mfi_pci_probe),
92 DEVMETHOD(device_attach, mfi_pci_attach),
93 DEVMETHOD(device_detach, mfi_pci_detach),
94 DEVMETHOD(device_suspend, mfi_pci_suspend),
95 DEVMETHOD(device_resume, mfi_pci_resume),
96
97 DEVMETHOD_END
98};
99
100static driver_t mfi_pci_driver = {
101 "mfi",
102 mfi_methods,
103 sizeof(struct mfi_softc)
104};
105
106static devclass_t mfi_devclass;
107DRIVER_MODULE(mfi, pci, mfi_pci_driver, mfi_devclass, 0, 0);
108MODULE_VERSION(mfi, 1);
109
110static int mfi_msi = 1;
111TUNABLE_INT("hw.mfi.msi", &mfi_msi);
112SYSCTL_INT(_hw_mfi, OID_AUTO, msi, CTLFLAG_RDTUN, &mfi_msi, 0,
113 "Enable use of MSI interrupts");
114
115struct mfi_ident {
116 uint16_t vendor;
117 uint16_t device;
118 uint16_t subvendor;
119 uint16_t subdevice;
120 int flags;
121 const char *desc;
122} mfi_identifiers[] = {
123 {0x1000, 0x005b, 0x1028, 0x1f2d, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H810 Adapter"},
124 {0x1000, 0x005b, 0x1028, 0x1f30, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710 Embedded"},
125 {0x1000, 0x005b, 0x1028, 0x1f31, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710P Adapter"},
126 {0x1000, 0x005b, 0x1028, 0x1f33, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710P Mini (blades)"},
127 {0x1000, 0x005b, 0x1028, 0x1f34, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710P Mini (monolithics)"},
128 {0x1000, 0x005b, 0x1028, 0x1f35, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710 Adapter"},
129 {0x1000, 0x005b, 0x1028, 0x1f37, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710 Mini (blades)"},
130 {0x1000, 0x005b, 0x1028, 0x1f38, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Dell PERC H710 Mini (monolithics)"},
131 {0x1000, 0x005b, 0x8086, 0x9265, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Intel (R) RAID Controller RS25DB080"},
132 {0x1000, 0x005b, 0x8086, 0x9285, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "Intel (R) RAID Controller RS25NB008"},
133 {0x1000, 0x005b, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT, "ThunderBolt"},
134 {0x1000, 0x0060, 0x1028, 0xffff, MFI_FLAGS_1078, "Dell PERC 6"},
135 {0x1000, 0x0060, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"},
136 {0x1000, 0x0071, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"},
137 {0x1000, 0x0073, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"},
138 {0x1000, 0x0078, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"},
139 {0x1000, 0x0079, 0x1028, 0x1f15, MFI_FLAGS_GEN2, "Dell PERC H800 Adapter"},
140 {0x1000, 0x0079, 0x1028, 0x1f16, MFI_FLAGS_GEN2, "Dell PERC H700 Adapter"},
141 {0x1000, 0x0079, 0x1028, 0x1f17, MFI_FLAGS_GEN2, "Dell PERC H700 Integrated"},
142 {0x1000, 0x0079, 0x1028, 0x1f18, MFI_FLAGS_GEN2, "Dell PERC H700 Modular"},
143 {0x1000, 0x0079, 0x1028, 0x1f19, MFI_FLAGS_GEN2, "Dell PERC H700"},
144 {0x1000, 0x0079, 0x1028, 0x1f1a, MFI_FLAGS_GEN2, "Dell PERC H800 Proto Adapter"},
145 {0x1000, 0x0079, 0x1028, 0x1f1b, MFI_FLAGS_GEN2, "Dell PERC H800"},
146 {0x1000, 0x0079, 0x1028, 0xffff, MFI_FLAGS_GEN2, "Dell PERC Gen2"},
147 {0x1000, 0x0079, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"},
148 {0x1000, 0x007c, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"},
149 {0x1000, 0x0411, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Brocton IOP */
150 {0x1000, 0x0413, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Verde ZCR */
151 {0x1028, 0x0015, 0xffff, 0xffff, MFI_FLAGS_1064R, "Dell PERC 5/i"},
152 {0, 0, 0, 0, 0, NULL}
153};
154
155static struct mfi_ident *
156mfi_find_ident(device_t dev)
157{
158 struct mfi_ident *m;
159
160 for (m = mfi_identifiers; m->vendor != 0; m++) {
161 if ((m->vendor == pci_get_vendor(dev)) &&
162 (m->device == pci_get_device(dev)) &&
163 ((m->subvendor == pci_get_subvendor(dev)) ||
164 (m->subvendor == 0xffff)) &&
165 ((m->subdevice == pci_get_subdevice(dev)) ||
166 (m->subdevice == 0xffff)))
167 return (m);
168 }
169
170 return (NULL);
171}
172
173static int
174mfi_pci_probe(device_t dev)
175{
176 struct mfi_ident *id;
177
178 if ((id = mfi_find_ident(dev)) != NULL) {
179 device_set_desc(dev, id->desc);
180 return (BUS_PROBE_DEFAULT);
181 }
182 return (ENXIO);
183}
184
185static int
186mfi_pci_attach(device_t dev)
187{
188 struct mfi_softc *sc;
189 struct mfi_ident *m;
|
212
213 /* Allocate PCI registers */
214 if ((sc->mfi_flags & MFI_FLAGS_1064R) ||
215 (sc->mfi_flags & MFI_FLAGS_1078)) {
216 /* 1068/1078: Memory mapped BAR is at offset 0x10 */
217 sc->mfi_regs_rid = PCIR_BAR(0);
218 }
219 else if ((sc->mfi_flags & MFI_FLAGS_GEN2) ||
220 (sc->mfi_flags & MFI_FLAGS_SKINNY) ||
221 (sc->mfi_flags & MFI_FLAGS_TBOLT)) {
222 /* Gen2/Skinny: Memory mapped BAR is at offset 0x14 */
223 sc->mfi_regs_rid = PCIR_BAR(1);
224 }
225 if ((sc->mfi_regs_resource = bus_alloc_resource_any(sc->mfi_dev,
226 SYS_RES_MEMORY, &sc->mfi_regs_rid, RF_ACTIVE)) == NULL) {
227 device_printf(dev, "Cannot allocate PCI registers\n");
228 return (ENXIO);
229 }
230 sc->mfi_btag = rman_get_bustag(sc->mfi_regs_resource);
231 sc->mfi_bhandle = rman_get_bushandle(sc->mfi_regs_resource);
232
233 error = ENOMEM;
234
235 /* Allocate parent DMA tag */
236 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* PCI parent */
237 1, 0, /* algnmnt, boundary */
238 BUS_SPACE_MAXADDR, /* lowaddr */
239 BUS_SPACE_MAXADDR, /* highaddr */
240 NULL, NULL, /* filter, filterarg */
241 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
242 BUS_SPACE_UNRESTRICTED, /* nsegments */
243 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
244 0, /* flags */
245 NULL, NULL, /* lockfunc, lockarg */
246 &sc->mfi_parent_dmat)) {
247 device_printf(dev, "Cannot allocate parent DMA tag\n");
248 goto out;
249 }
250
251 /* Allocate IRQ resource. */
252 sc->mfi_irq_rid = 0;
253 count = 1;
254 if (mfi_msi && pci_alloc_msi(sc->mfi_dev, &count) == 0) {
255 device_printf(sc->mfi_dev, "Using MSI\n");
256 sc->mfi_irq_rid = 1;
257 }
258 if ((sc->mfi_irq = bus_alloc_resource_any(sc->mfi_dev, SYS_RES_IRQ,
259 &sc->mfi_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
260 device_printf(sc->mfi_dev, "Cannot allocate interrupt\n");
261 error = EINVAL;
262 goto out;
263 }
264
265 error = mfi_attach(sc);
266out:
267 if (error) {
268 mfi_free(sc);
269 mfi_pci_free(sc);
270 }
271
272 return (error);
273}
274
275static int
276mfi_pci_detach(device_t dev)
277{
278 struct mfi_softc *sc;
279 int error, devcount, i;
280 device_t *devlist;
281
282 sc = device_get_softc(dev);
283
284 sx_xlock(&sc->mfi_config_lock);
285 mtx_lock(&sc->mfi_io_lock);
286 if ((sc->mfi_flags & MFI_FLAGS_OPEN) != 0) {
287 mtx_unlock(&sc->mfi_io_lock);
288 sx_xunlock(&sc->mfi_config_lock);
289 return (EBUSY);
290 }
291 sc->mfi_detaching = 1;
292 mtx_unlock(&sc->mfi_io_lock);
293
294 if ((error = device_get_children(sc->mfi_dev, &devlist, &devcount)) != 0) {
295 sx_xunlock(&sc->mfi_config_lock);
296 return error;
297 }
298 for (i = 0; i < devcount; i++)
299 device_delete_child(sc->mfi_dev, devlist[i]);
300 free(devlist, M_TEMP);
301 sx_xunlock(&sc->mfi_config_lock);
302
303 EVENTHANDLER_DEREGISTER(shutdown_final, sc->mfi_eh);
304
305 mfi_shutdown(sc);
306 mfi_free(sc);
307 mfi_pci_free(sc);
308 return (0);
309}
310
311static void
312mfi_pci_free(struct mfi_softc *sc)
313{
314
315 if (sc->mfi_regs_resource != NULL) {
316 bus_release_resource(sc->mfi_dev, SYS_RES_MEMORY,
317 sc->mfi_regs_rid, sc->mfi_regs_resource);
318 }
319 if (sc->mfi_irq_rid != 0)
320 pci_release_msi(sc->mfi_dev);
321
322 return;
323}
324
325static int
326mfi_pci_suspend(device_t dev)
327{
328
329 return (EINVAL);
330}
331
332static int
333mfi_pci_resume(device_t dev)
334{
335
336 return (EINVAL);
337}
| 200
201 /* Allocate PCI registers */
202 if ((sc->mfi_flags & MFI_FLAGS_1064R) ||
203 (sc->mfi_flags & MFI_FLAGS_1078)) {
204 /* 1068/1078: Memory mapped BAR is at offset 0x10 */
205 sc->mfi_regs_rid = PCIR_BAR(0);
206 }
207 else if ((sc->mfi_flags & MFI_FLAGS_GEN2) ||
208 (sc->mfi_flags & MFI_FLAGS_SKINNY) ||
209 (sc->mfi_flags & MFI_FLAGS_TBOLT)) {
210 /* Gen2/Skinny: Memory mapped BAR is at offset 0x14 */
211 sc->mfi_regs_rid = PCIR_BAR(1);
212 }
213 if ((sc->mfi_regs_resource = bus_alloc_resource_any(sc->mfi_dev,
214 SYS_RES_MEMORY, &sc->mfi_regs_rid, RF_ACTIVE)) == NULL) {
215 device_printf(dev, "Cannot allocate PCI registers\n");
216 return (ENXIO);
217 }
218 sc->mfi_btag = rman_get_bustag(sc->mfi_regs_resource);
219 sc->mfi_bhandle = rman_get_bushandle(sc->mfi_regs_resource);
220
221 error = ENOMEM;
222
223 /* Allocate parent DMA tag */
224 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* PCI parent */
225 1, 0, /* algnmnt, boundary */
226 BUS_SPACE_MAXADDR, /* lowaddr */
227 BUS_SPACE_MAXADDR, /* highaddr */
228 NULL, NULL, /* filter, filterarg */
229 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
230 BUS_SPACE_UNRESTRICTED, /* nsegments */
231 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
232 0, /* flags */
233 NULL, NULL, /* lockfunc, lockarg */
234 &sc->mfi_parent_dmat)) {
235 device_printf(dev, "Cannot allocate parent DMA tag\n");
236 goto out;
237 }
238
239 /* Allocate IRQ resource. */
240 sc->mfi_irq_rid = 0;
241 count = 1;
242 if (mfi_msi && pci_alloc_msi(sc->mfi_dev, &count) == 0) {
243 device_printf(sc->mfi_dev, "Using MSI\n");
244 sc->mfi_irq_rid = 1;
245 }
246 if ((sc->mfi_irq = bus_alloc_resource_any(sc->mfi_dev, SYS_RES_IRQ,
247 &sc->mfi_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
248 device_printf(sc->mfi_dev, "Cannot allocate interrupt\n");
249 error = EINVAL;
250 goto out;
251 }
252
253 error = mfi_attach(sc);
254out:
255 if (error) {
256 mfi_free(sc);
257 mfi_pci_free(sc);
258 }
259
260 return (error);
261}
262
263static int
264mfi_pci_detach(device_t dev)
265{
266 struct mfi_softc *sc;
267 int error, devcount, i;
268 device_t *devlist;
269
270 sc = device_get_softc(dev);
271
272 sx_xlock(&sc->mfi_config_lock);
273 mtx_lock(&sc->mfi_io_lock);
274 if ((sc->mfi_flags & MFI_FLAGS_OPEN) != 0) {
275 mtx_unlock(&sc->mfi_io_lock);
276 sx_xunlock(&sc->mfi_config_lock);
277 return (EBUSY);
278 }
279 sc->mfi_detaching = 1;
280 mtx_unlock(&sc->mfi_io_lock);
281
282 if ((error = device_get_children(sc->mfi_dev, &devlist, &devcount)) != 0) {
283 sx_xunlock(&sc->mfi_config_lock);
284 return error;
285 }
286 for (i = 0; i < devcount; i++)
287 device_delete_child(sc->mfi_dev, devlist[i]);
288 free(devlist, M_TEMP);
289 sx_xunlock(&sc->mfi_config_lock);
290
291 EVENTHANDLER_DEREGISTER(shutdown_final, sc->mfi_eh);
292
293 mfi_shutdown(sc);
294 mfi_free(sc);
295 mfi_pci_free(sc);
296 return (0);
297}
298
299static void
300mfi_pci_free(struct mfi_softc *sc)
301{
302
303 if (sc->mfi_regs_resource != NULL) {
304 bus_release_resource(sc->mfi_dev, SYS_RES_MEMORY,
305 sc->mfi_regs_rid, sc->mfi_regs_resource);
306 }
307 if (sc->mfi_irq_rid != 0)
308 pci_release_msi(sc->mfi_dev);
309
310 return;
311}
312
313static int
314mfi_pci_suspend(device_t dev)
315{
316
317 return (EINVAL);
318}
319
320static int
321mfi_pci_resume(device_t dev)
322{
323
324 return (EINVAL);
325}
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