| if_lge.c (129879) | if_lge.c (130270) |
|---|---|
| 1/* 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2000, 2001 4 * Bill Paul <william.paul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 18 unchanged lines hidden (view full) --- 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34#include <sys/cdefs.h> | 1/* 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2000, 2001 4 * Bill Paul <william.paul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 18 unchanged lines hidden (view full) --- 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34#include <sys/cdefs.h> |
| 35__FBSDID("$FreeBSD: head/sys/dev/lge/if_lge.c 129879 2004-05-30 20:08:47Z phk $"); | 35__FBSDID("$FreeBSD: head/sys/dev/lge/if_lge.c 130270 2004-06-09 14:34:04Z naddy $"); |
| 36 37/* 38 * Level 1 LXT1001 gigabit ethernet driver for FreeBSD. Public 39 * documentation not available, but ask me nicely. 40 * 41 * The Level 1 chip is used on some D-Link, SMC and Addtron NICs. 42 * It's a 64-bit PCI part that supports TCP/IP checksum offload, 43 * VLAN tagging/insertion, GMII and TBI (1000baseX) ports. There --- 101 unchanged lines hidden (view full) --- 145static void lge_eeprom_getword(struct lge_softc *, int, u_int16_t *); 146static void lge_read_eeprom(struct lge_softc *, caddr_t, int, int, int); 147 148static int lge_miibus_readreg(device_t, int, int); 149static int lge_miibus_writereg(device_t, int, int, int); 150static void lge_miibus_statchg(device_t); 151 152static void lge_setmulti(struct lge_softc *); | 36 37/* 38 * Level 1 LXT1001 gigabit ethernet driver for FreeBSD. Public 39 * documentation not available, but ask me nicely. 40 * 41 * The Level 1 chip is used on some D-Link, SMC and Addtron NICs. 42 * It's a 64-bit PCI part that supports TCP/IP checksum offload, 43 * VLAN tagging/insertion, GMII and TBI (1000baseX) ports. There --- 101 unchanged lines hidden (view full) --- 145static void lge_eeprom_getword(struct lge_softc *, int, u_int16_t *); 146static void lge_read_eeprom(struct lge_softc *, caddr_t, int, int, int); 147 148static int lge_miibus_readreg(device_t, int, int); 149static int lge_miibus_writereg(device_t, int, int, int); 150static void lge_miibus_statchg(device_t); 151 152static void lge_setmulti(struct lge_softc *); |
| 153static uint32_t lge_mchash(const uint8_t *); | |
| 154static void lge_reset(struct lge_softc *); 155static int lge_list_rx_init(struct lge_softc *); 156static int lge_list_tx_init(struct lge_softc *); 157 158#ifdef LGE_USEIOSPACE 159#define LGE_RES SYS_RES_IOPORT 160#define LGE_RID LGE_PCI_LOIO 161#else --- 201 unchanged lines hidden (view full) --- 363 LGE_SETBIT(sc, LGE_GMIIMODE, LGE_GMIIMODE_FDX); 364 } else { 365 LGE_CLRBIT(sc, LGE_GMIIMODE, LGE_GMIIMODE_FDX); 366 } 367 368 return; 369} 370 | 153static void lge_reset(struct lge_softc *); 154static int lge_list_rx_init(struct lge_softc *); 155static int lge_list_tx_init(struct lge_softc *); 156 157#ifdef LGE_USEIOSPACE 158#define LGE_RES SYS_RES_IOPORT 159#define LGE_RID LGE_PCI_LOIO 160#else --- 201 unchanged lines hidden (view full) --- 362 LGE_SETBIT(sc, LGE_GMIIMODE, LGE_GMIIMODE_FDX); 363 } else { 364 LGE_CLRBIT(sc, LGE_GMIIMODE, LGE_GMIIMODE_FDX); 365 } 366 367 return; 368} 369 |
| 371static uint32_t 372lge_mchash(addr) 373 const uint8_t *addr; 374{ 375 uint32_t crc, carry; 376 int idx, bit; 377 uint8_t data; 378 379 /* Compute CRC for the address value. */ 380 crc = 0xFFFFFFFF; /* initial value */ 381 382 for (idx = 0; idx < 6; idx++) { 383 for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) { 384 carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01); 385 crc <<= 1; 386 if (carry) 387 crc = (crc ^ 0x04c11db6) | carry; 388 } 389 } 390 391 /* 392 * return the filter bit position 393 */ 394 return((crc >> 26) & 0x0000003F); 395} 396 | |
| 397static void 398lge_setmulti(sc) 399 struct lge_softc *sc; 400{ 401 struct ifnet *ifp; 402 struct ifmultiaddr *ifma; 403 u_int32_t h = 0, hashes[2] = { 0, 0 }; 404 --- 11 unchanged lines hidden (view full) --- 416 /* first, zot all the existing hash bits */ 417 CSR_WRITE_4(sc, LGE_MAR0, 0); 418 CSR_WRITE_4(sc, LGE_MAR1, 0); 419 420 /* now program new ones */ 421 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 422 if (ifma->ifma_addr->sa_family != AF_LINK) 423 continue; | 370static void 371lge_setmulti(sc) 372 struct lge_softc *sc; 373{ 374 struct ifnet *ifp; 375 struct ifmultiaddr *ifma; 376 u_int32_t h = 0, hashes[2] = { 0, 0 }; 377 --- 11 unchanged lines hidden (view full) --- 389 /* first, zot all the existing hash bits */ 390 CSR_WRITE_4(sc, LGE_MAR0, 0); 391 CSR_WRITE_4(sc, LGE_MAR1, 0); 392 393 /* now program new ones */ 394 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 395 if (ifma->ifma_addr->sa_family != AF_LINK) 396 continue; |
| 424 h = lge_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); | 397 h = ether_crc32_be(LLADDR((struct sockaddr_dl *) 398 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; |
| 425 if (h < 32) 426 hashes[0] |= (1 << h); 427 else 428 hashes[1] |= (1 << (h - 32)); 429 } 430 431 CSR_WRITE_4(sc, LGE_MAR0, hashes[0]); 432 CSR_WRITE_4(sc, LGE_MAR1, hashes[1]); --- 1177 unchanged lines hidden --- | 399 if (h < 32) 400 hashes[0] |= (1 << h); 401 else 402 hashes[1] |= (1 << (h - 32)); 403 } 404 405 CSR_WRITE_4(sc, LGE_MAR0, hashes[0]); 406 CSR_WRITE_4(sc, LGE_MAR1, hashes[1]); --- 1177 unchanged lines hidden --- |