| if_jme.c (213844) | if_jme.c (213893) |
|---|---|
| 1/*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> |
| 29__FBSDID("$FreeBSD: head/sys/dev/jme/if_jme.c 213844 2010-10-14 18:31:40Z yongari $"); | 29__FBSDID("$FreeBSD: head/sys/dev/jme/if_jme.c 213893 2010-10-15 14:52:11Z marius $"); |
| 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/bus.h> 34#include <sys/endian.h> 35#include <sys/kernel.h> 36#include <sys/malloc.h> 37#include <sys/mbuf.h> --- 181 unchanged lines hidden (view full) --- 219{ 220 struct jme_softc *sc; 221 uint32_t val; 222 int i; 223 224 sc = device_get_softc(dev); 225 226 /* For FPGA version, PHY address 0 should be ignored. */ | 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/bus.h> 34#include <sys/endian.h> 35#include <sys/kernel.h> 36#include <sys/malloc.h> 37#include <sys/mbuf.h> --- 181 unchanged lines hidden (view full) --- 219{ 220 struct jme_softc *sc; 221 uint32_t val; 222 int i; 223 224 sc = device_get_softc(dev); 225 226 /* For FPGA version, PHY address 0 should be ignored. */ |
| 227 if ((sc->jme_flags & JME_FLAG_FPGA) != 0) { 228 if (phy == 0) 229 return (0); 230 } else { 231 if (sc->jme_phyaddr != phy) 232 return (0); 233 } | 227 if ((sc->jme_flags & JME_FLAG_FPGA) != 0 && phy == 0) 228 return (0); |
| 234 235 CSR_WRITE_4(sc, JME_SMI, SMI_OP_READ | SMI_OP_EXECUTE | 236 SMI_PHY_ADDR(phy) | SMI_REG_ADDR(reg)); 237 for (i = JME_PHY_TIMEOUT; i > 0; i--) { 238 DELAY(1); 239 if (((val = CSR_READ_4(sc, JME_SMI)) & SMI_OP_EXECUTE) == 0) 240 break; 241 } --- 13 unchanged lines hidden (view full) --- 255jme_miibus_writereg(device_t dev, int phy, int reg, int val) 256{ 257 struct jme_softc *sc; 258 int i; 259 260 sc = device_get_softc(dev); 261 262 /* For FPGA version, PHY address 0 should be ignored. */ | 229 230 CSR_WRITE_4(sc, JME_SMI, SMI_OP_READ | SMI_OP_EXECUTE | 231 SMI_PHY_ADDR(phy) | SMI_REG_ADDR(reg)); 232 for (i = JME_PHY_TIMEOUT; i > 0; i--) { 233 DELAY(1); 234 if (((val = CSR_READ_4(sc, JME_SMI)) & SMI_OP_EXECUTE) == 0) 235 break; 236 } --- 13 unchanged lines hidden (view full) --- 250jme_miibus_writereg(device_t dev, int phy, int reg, int val) 251{ 252 struct jme_softc *sc; 253 int i; 254 255 sc = device_get_softc(dev); 256 257 /* For FPGA version, PHY address 0 should be ignored. */ |
| 263 if ((sc->jme_flags & JME_FLAG_FPGA) != 0) { 264 if (phy == 0) 265 return (0); 266 } else { 267 if (sc->jme_phyaddr != phy) 268 return (0); 269 } | 258 if ((sc->jme_flags & JME_FLAG_FPGA) != 0 && phy == 0) 259 return (0); |
| 270 271 CSR_WRITE_4(sc, JME_SMI, SMI_OP_WRITE | SMI_OP_EXECUTE | 272 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | 273 SMI_PHY_ADDR(phy) | SMI_REG_ADDR(reg)); 274 for (i = JME_PHY_TIMEOUT; i > 0; i--) { 275 DELAY(1); 276 if (((val = CSR_READ_4(sc, JME_SMI)) & SMI_OP_EXECUTE) == 0) 277 break; --- 460 unchanged lines hidden (view full) --- 738 ifp->if_hwassist = JME_CSUM_FEATURES | CSUM_TSO; 739 if (pci_find_extcap(dev, PCIY_PMG, &pmc) == 0) { 740 sc->jme_flags |= JME_FLAG_PMCAP; 741 ifp->if_capabilities |= IFCAP_WOL_MAGIC; 742 } 743 ifp->if_capenable = ifp->if_capabilities; 744 745 /* Set up MII bus. */ | 260 261 CSR_WRITE_4(sc, JME_SMI, SMI_OP_WRITE | SMI_OP_EXECUTE | 262 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | 263 SMI_PHY_ADDR(phy) | SMI_REG_ADDR(reg)); 264 for (i = JME_PHY_TIMEOUT; i > 0; i--) { 265 DELAY(1); 266 if (((val = CSR_READ_4(sc, JME_SMI)) & SMI_OP_EXECUTE) == 0) 267 break; --- 460 unchanged lines hidden (view full) --- 728 ifp->if_hwassist = JME_CSUM_FEATURES | CSUM_TSO; 729 if (pci_find_extcap(dev, PCIY_PMG, &pmc) == 0) { 730 sc->jme_flags |= JME_FLAG_PMCAP; 731 ifp->if_capabilities |= IFCAP_WOL_MAGIC; 732 } 733 ifp->if_capenable = ifp->if_capabilities; 734 735 /* Set up MII bus. */ |
| 746 if ((error = mii_phy_probe(dev, &sc->jme_miibus, jme_mediachange, 747 jme_mediastatus)) != 0) { 748 device_printf(dev, "no PHY found!\n"); | 736 error = mii_attach(dev, &sc->jme_miibus, ifp, jme_mediachange, 737 jme_mediastatus, BMSR_DEFCAPMASK, sc->jme_phyaddr, MII_OFFSET_ANY, 738 0); 739 if (error != 0) { 740 device_printf(dev, "attaching PHYs failed\n"); |
| 749 goto fail; 750 } 751 752 /* 753 * Force PHY to FPGA mode. 754 */ 755 if ((sc->jme_flags & JME_FLAG_FPGA) != 0) { 756 mii = device_get_softc(sc->jme_miibus); --- 2518 unchanged lines hidden --- | 741 goto fail; 742 } 743 744 /* 745 * Force PHY to FPGA mode. 746 */ 747 if ((sc->jme_flags & JME_FLAG_FPGA) != 0) { 748 mii = device_get_softc(sc->jme_miibus); --- 2518 unchanged lines hidden --- |