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ixgbe_common.c (238149) ixgbe_common.c (247822)
1/******************************************************************************
2
1/******************************************************************************
2
3 Copyright (c) 2001-2012, Intel Corporation
3 Copyright (c) 2001-2013, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11

--- 13 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11

--- 13 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_common.c 238149 2012-07-05 20:51:44Z jfv $*/
33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_common.c 247822 2013-03-04 23:07:40Z jfv $*/
34
35#include "ixgbe_common.h"
36#include "ixgbe_phy.h"
37#include "ixgbe_api.h"
38
39static s32 ixgbe_acquire_eeprom(struct ixgbe_hw *hw);
40static s32 ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw);
41static void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw);

--- 100 unchanged lines hidden (view full) ---

142 * ixgbe_device_supports_autoneg_fc - Check if phy supports autoneg flow
143 * control
144 * @hw: pointer to hardware structure
145 *
146 * There are several phys that do not support autoneg flow control. This
147 * function check the device id to see if the associated phy supports
148 * autoneg flow control.
149 **/
34
35#include "ixgbe_common.h"
36#include "ixgbe_phy.h"
37#include "ixgbe_api.h"
38
39static s32 ixgbe_acquire_eeprom(struct ixgbe_hw *hw);
40static s32 ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw);
41static void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw);

--- 100 unchanged lines hidden (view full) ---

142 * ixgbe_device_supports_autoneg_fc - Check if phy supports autoneg flow
143 * control
144 * @hw: pointer to hardware structure
145 *
146 * There are several phys that do not support autoneg flow control. This
147 * function check the device id to see if the associated phy supports
148 * autoneg flow control.
149 **/
150static s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
150s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
151{
152
153 DEBUGFUNC("ixgbe_device_supports_autoneg_fc");
154
155 switch (hw->device_id) {
151{
152
153 DEBUGFUNC("ixgbe_device_supports_autoneg_fc");
154
155 switch (hw->device_id) {
156 case IXGBE_DEV_ID_82599_T3_LOM:
156 case IXGBE_DEV_ID_X540T:
157 case IXGBE_DEV_ID_X540T:
157 case IXGBE_DEV_ID_X540T1:
158 return IXGBE_SUCCESS;
158 return IXGBE_SUCCESS;
159 case IXGBE_DEV_ID_82599_T3_LOM:
160 return IXGBE_SUCCESS;
161 default:
162 return IXGBE_ERR_FC_NOT_SUPPORTED;
163 }
164}
165
166/**
167 * ixgbe_setup_fc - Set up flow control
168 * @hw: pointer to hardware structure
169 *
170 * Called at init time to set up flow control.
171 **/
172static s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
173{
174 s32 ret_val = IXGBE_SUCCESS;
175 u32 reg = 0, reg_bp = 0;
176 u16 reg_cu = 0;
159 default:
160 return IXGBE_ERR_FC_NOT_SUPPORTED;
161 }
162}
163
164/**
165 * ixgbe_setup_fc - Set up flow control
166 * @hw: pointer to hardware structure
167 *
168 * Called at init time to set up flow control.
169 **/
170static s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
171{
172 s32 ret_val = IXGBE_SUCCESS;
173 u32 reg = 0, reg_bp = 0;
174 u16 reg_cu = 0;
175 bool got_lock = FALSE;
177
178 DEBUGFUNC("ixgbe_setup_fc");
179
180 /*
181 * Validate the requested mode. Strict IEEE mode does not allow
182 * ixgbe_fc_rx_pause because it will cause us to fail at UNH.
183 */
184 if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {

--- 10 unchanged lines hidden (view full) ---

195 hw->fc.requested_mode = ixgbe_fc_full;
196
197 /*
198 * Set up the 1G and 10G flow control advertisement registers so the
199 * HW will be able to do fc autoneg once the cable is plugged in. If
200 * we link at 10G, the 1G advertisement is harmless and vice versa.
201 */
202 switch (hw->phy.media_type) {
176
177 DEBUGFUNC("ixgbe_setup_fc");
178
179 /*
180 * Validate the requested mode. Strict IEEE mode does not allow
181 * ixgbe_fc_rx_pause because it will cause us to fail at UNH.
182 */
183 if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {

--- 10 unchanged lines hidden (view full) ---

194 hw->fc.requested_mode = ixgbe_fc_full;
195
196 /*
197 * Set up the 1G and 10G flow control advertisement registers so the
198 * HW will be able to do fc autoneg once the cable is plugged in. If
199 * we link at 10G, the 1G advertisement is harmless and vice versa.
200 */
201 switch (hw->phy.media_type) {
202 case ixgbe_media_type_fiber_fixed:
203 case ixgbe_media_type_fiber:
204 case ixgbe_media_type_backplane:
205 reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
206 reg_bp = IXGBE_READ_REG(hw, IXGBE_AUTOC);
207 break;
208 case ixgbe_media_type_copper:
209 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,
210 IXGBE_MDIO_AUTO_NEG_DEV_TYPE, &reg_cu);

--- 81 unchanged lines hidden (view full) ---

292
293 /*
294 * AUTOC restart handles negotiation of 1G and 10G on backplane
295 * and copper. There is no need to set the PCS1GCTL register.
296 *
297 */
298 if (hw->phy.media_type == ixgbe_media_type_backplane) {
299 reg_bp |= IXGBE_AUTOC_AN_RESTART;
203 case ixgbe_media_type_fiber:
204 case ixgbe_media_type_backplane:
205 reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
206 reg_bp = IXGBE_READ_REG(hw, IXGBE_AUTOC);
207 break;
208 case ixgbe_media_type_copper:
209 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,
210 IXGBE_MDIO_AUTO_NEG_DEV_TYPE, &reg_cu);

--- 81 unchanged lines hidden (view full) ---

292
293 /*
294 * AUTOC restart handles negotiation of 1G and 10G on backplane
295 * and copper. There is no need to set the PCS1GCTL register.
296 *
297 */
298 if (hw->phy.media_type == ixgbe_media_type_backplane) {
299 reg_bp |= IXGBE_AUTOC_AN_RESTART;
300 /* Need the SW/FW semaphore around AUTOC writes if 82599 and
301 * LESM is on, likewise reset_pipeline requries the lock as
302 * it also writes AUTOC.
303 */
304 if ((hw->mac.type == ixgbe_mac_82599EB) &&
305 ixgbe_verify_lesm_fw_enabled_82599(hw)) {
306 ret_val = hw->mac.ops.acquire_swfw_sync(hw,
307 IXGBE_GSSR_MAC_CSR_SM);
308 if (ret_val != IXGBE_SUCCESS) {
309 ret_val = IXGBE_ERR_SWFW_SYNC;
310 goto out;
311 }
312 got_lock = TRUE;
313 }
314
300 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_bp);
315 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_bp);
316 if (hw->mac.type == ixgbe_mac_82599EB)
317 ixgbe_reset_pipeline_82599(hw);
318
319 if (got_lock)
320 hw->mac.ops.release_swfw_sync(hw,
321 IXGBE_GSSR_MAC_CSR_SM);
301 } else if ((hw->phy.media_type == ixgbe_media_type_copper) &&
302 (ixgbe_device_supports_autoneg_fc(hw) == IXGBE_SUCCESS)) {
303 hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,
304 IXGBE_MDIO_AUTO_NEG_DEV_TYPE, reg_cu);
305 }
306
307 DEBUGOUT1("Set up FC; IXGBE_AUTOC = 0x%08X\n", reg);
308out:

--- 366 unchanged lines hidden (view full) ---

675 return ret_val;
676 }
677 *pba_num |= data;
678
679 return IXGBE_SUCCESS;
680}
681
682/**
322 } else if ((hw->phy.media_type == ixgbe_media_type_copper) &&
323 (ixgbe_device_supports_autoneg_fc(hw) == IXGBE_SUCCESS)) {
324 hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,
325 IXGBE_MDIO_AUTO_NEG_DEV_TYPE, reg_cu);
326 }
327
328 DEBUGOUT1("Set up FC; IXGBE_AUTOC = 0x%08X\n", reg);
329out:

--- 366 unchanged lines hidden (view full) ---

696 return ret_val;
697 }
698 *pba_num |= data;
699
700 return IXGBE_SUCCESS;
701}
702
703/**
704 * ixgbe_read_pba_raw
705 * @hw: pointer to the HW structure
706 * @eeprom_buf: optional pointer to EEPROM image
707 * @eeprom_buf_size: size of EEPROM image in words
708 * @max_pba_block_size: PBA block size limit
709 * @pba: pointer to output PBA structure
710 *
711 * Reads PBA from EEPROM image when eeprom_buf is not NULL.
712 * Reads PBA from physical EEPROM device when eeprom_buf is NULL.
713 *
714 **/
715s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
716 u32 eeprom_buf_size, u16 max_pba_block_size,
717 struct ixgbe_pba *pba)
718{
719 s32 ret_val;
720 u16 pba_block_size;
721
722 if (pba == NULL)
723 return IXGBE_ERR_PARAM;
724
725 if (eeprom_buf == NULL) {
726 ret_val = hw->eeprom.ops.read_buffer(hw, IXGBE_PBANUM0_PTR, 2,
727 &pba->word[0]);
728 if (ret_val)
729 return ret_val;
730 } else {
731 if (eeprom_buf_size > IXGBE_PBANUM1_PTR) {
732 pba->word[0] = eeprom_buf[IXGBE_PBANUM0_PTR];
733 pba->word[1] = eeprom_buf[IXGBE_PBANUM1_PTR];
734 } else {
735 return IXGBE_ERR_PARAM;
736 }
737 }
738
739 if (pba->word[0] == IXGBE_PBANUM_PTR_GUARD) {
740 if (pba->pba_block == NULL)
741 return IXGBE_ERR_PARAM;
742
743 ret_val = ixgbe_get_pba_block_size(hw, eeprom_buf,
744 eeprom_buf_size,
745 &pba_block_size);
746 if (ret_val)
747 return ret_val;
748
749 if (pba_block_size > max_pba_block_size)
750 return IXGBE_ERR_PARAM;
751
752 if (eeprom_buf == NULL) {
753 ret_val = hw->eeprom.ops.read_buffer(hw, pba->word[1],
754 pba_block_size,
755 pba->pba_block);
756 if (ret_val)
757 return ret_val;
758 } else {
759 if (eeprom_buf_size > (u32)(pba->word[1] +
760 pba->pba_block[0])) {
761 memcpy(pba->pba_block,
762 &eeprom_buf[pba->word[1]],
763 pba_block_size * sizeof(u16));
764 } else {
765 return IXGBE_ERR_PARAM;
766 }
767 }
768 }
769
770 return IXGBE_SUCCESS;
771}
772
773/**
774 * ixgbe_write_pba_raw
775 * @hw: pointer to the HW structure
776 * @eeprom_buf: optional pointer to EEPROM image
777 * @eeprom_buf_size: size of EEPROM image in words
778 * @pba: pointer to PBA structure
779 *
780 * Writes PBA to EEPROM image when eeprom_buf is not NULL.
781 * Writes PBA to physical EEPROM device when eeprom_buf is NULL.
782 *
783 **/
784s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
785 u32 eeprom_buf_size, struct ixgbe_pba *pba)
786{
787 s32 ret_val;
788
789 if (pba == NULL)
790 return IXGBE_ERR_PARAM;
791
792 if (eeprom_buf == NULL) {
793 ret_val = hw->eeprom.ops.write_buffer(hw, IXGBE_PBANUM0_PTR, 2,
794 &pba->word[0]);
795 if (ret_val)
796 return ret_val;
797 } else {
798 if (eeprom_buf_size > IXGBE_PBANUM1_PTR) {
799 eeprom_buf[IXGBE_PBANUM0_PTR] = pba->word[0];
800 eeprom_buf[IXGBE_PBANUM1_PTR] = pba->word[1];
801 } else {
802 return IXGBE_ERR_PARAM;
803 }
804 }
805
806 if (pba->word[0] == IXGBE_PBANUM_PTR_GUARD) {
807 if (pba->pba_block == NULL)
808 return IXGBE_ERR_PARAM;
809
810 if (eeprom_buf == NULL) {
811 ret_val = hw->eeprom.ops.write_buffer(hw, pba->word[1],
812 pba->pba_block[0],
813 pba->pba_block);
814 if (ret_val)
815 return ret_val;
816 } else {
817 if (eeprom_buf_size > (u32)(pba->word[1] +
818 pba->pba_block[0])) {
819 memcpy(&eeprom_buf[pba->word[1]],
820 pba->pba_block,
821 pba->pba_block[0] * sizeof(u16));
822 } else {
823 return IXGBE_ERR_PARAM;
824 }
825 }
826 }
827
828 return IXGBE_SUCCESS;
829}
830
831/**
832 * ixgbe_get_pba_block_size
833 * @hw: pointer to the HW structure
834 * @eeprom_buf: optional pointer to EEPROM image
835 * @eeprom_buf_size: size of EEPROM image in words
836 * @pba_data_size: pointer to output variable
837 *
838 * Returns the size of the PBA block in words. Function operates on EEPROM
839 * image if the eeprom_buf pointer is not NULL otherwise it accesses physical
840 * EEPROM device.
841 *
842 **/
843s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,
844 u32 eeprom_buf_size, u16 *pba_block_size)
845{
846 s32 ret_val;
847 u16 pba_word[2];
848 u16 length;
849
850 DEBUGFUNC("ixgbe_get_pba_block_size");
851
852 if (eeprom_buf == NULL) {
853 ret_val = hw->eeprom.ops.read_buffer(hw, IXGBE_PBANUM0_PTR, 2,
854 &pba_word[0]);
855 if (ret_val)
856 return ret_val;
857 } else {
858 if (eeprom_buf_size > IXGBE_PBANUM1_PTR) {
859 pba_word[0] = eeprom_buf[IXGBE_PBANUM0_PTR];
860 pba_word[1] = eeprom_buf[IXGBE_PBANUM1_PTR];
861 } else {
862 return IXGBE_ERR_PARAM;
863 }
864 }
865
866 if (pba_word[0] == IXGBE_PBANUM_PTR_GUARD) {
867 if (eeprom_buf == NULL) {
868 ret_val = hw->eeprom.ops.read(hw, pba_word[1] + 0,
869 &length);
870 if (ret_val)
871 return ret_val;
872 } else {
873 if (eeprom_buf_size > pba_word[1])
874 length = eeprom_buf[pba_word[1] + 0];
875 else
876 return IXGBE_ERR_PARAM;
877 }
878
879 if (length == 0xFFFF || length == 0)
880 return IXGBE_ERR_PBA_SECTION;
881 } else {
882 /* PBA number in legacy format, there is no PBA Block. */
883 length = 0;
884 }
885
886 if (pba_block_size != NULL)
887 *pba_block_size = length;
888
889 return IXGBE_SUCCESS;
890}
891
892/**
683 * ixgbe_get_mac_addr_generic - Generic get MAC address
684 * @hw: pointer to hardware structure
685 * @mac_addr: Adapter MAC address
686 *
687 * Reads the adapter's MAC address from first Receive Address Register (RAR0)
688 * A reset of the adapter must be performed prior to calling this function
689 * in order for the MAC address to have been loaded from the EEPROM into RAR0
690 **/

--- 572 unchanged lines hidden (view full) ---

1263 }
1264
1265 if (offset >= hw->eeprom.word_size) {
1266 status = IXGBE_ERR_EEPROM;
1267 goto out;
1268 }
1269
1270 for (i = 0; i < words; i++) {
893 * ixgbe_get_mac_addr_generic - Generic get MAC address
894 * @hw: pointer to hardware structure
895 * @mac_addr: Adapter MAC address
896 *
897 * Reads the adapter's MAC address from first Receive Address Register (RAR0)
898 * A reset of the adapter must be performed prior to calling this function
899 * in order for the MAC address to have been loaded from the EEPROM into RAR0
900 **/

--- 572 unchanged lines hidden (view full) ---

1473 }
1474
1475 if (offset >= hw->eeprom.word_size) {
1476 status = IXGBE_ERR_EEPROM;
1477 goto out;
1478 }
1479
1480 for (i = 0; i < words; i++) {
1271 eerd = ((offset + i) << IXGBE_EEPROM_RW_ADDR_SHIFT) +
1481 eerd = ((offset + i) << IXGBE_EEPROM_RW_ADDR_SHIFT) |
1272 IXGBE_EEPROM_RW_REG_START;
1273
1274 IXGBE_WRITE_REG(hw, IXGBE_EERD, eerd);
1275 status = ixgbe_poll_eerd_eewr_done(hw, IXGBE_NVM_POLL_READ);
1276
1277 if (status == IXGBE_SUCCESS) {
1278 data[i] = (IXGBE_READ_REG(hw, IXGBE_EERD) >>
1279 IXGBE_EEPROM_RW_REG_DATA);

--- 1434 unchanged lines hidden (view full) ---

2714 goto out;
2715
2716 hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
2717 if (!link_up)
2718 goto out;
2719
2720 switch (hw->phy.media_type) {
2721 /* Autoneg flow control on fiber adapters */
1482 IXGBE_EEPROM_RW_REG_START;
1483
1484 IXGBE_WRITE_REG(hw, IXGBE_EERD, eerd);
1485 status = ixgbe_poll_eerd_eewr_done(hw, IXGBE_NVM_POLL_READ);
1486
1487 if (status == IXGBE_SUCCESS) {
1488 data[i] = (IXGBE_READ_REG(hw, IXGBE_EERD) >>
1489 IXGBE_EEPROM_RW_REG_DATA);

--- 1434 unchanged lines hidden (view full) ---

2924 goto out;
2925
2926 hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
2927 if (!link_up)
2928 goto out;
2929
2930 switch (hw->phy.media_type) {
2931 /* Autoneg flow control on fiber adapters */
2932 case ixgbe_media_type_fiber_fixed:
2722 case ixgbe_media_type_fiber:
2723 if (speed == IXGBE_LINK_SPEED_1GB_FULL)
2724 ret_val = ixgbe_fc_autoneg_fiber(hw);
2725 break;
2726
2727 /* Autoneg flow control on backplane adapters */
2728 case ixgbe_media_type_backplane:
2729 ret_val = ixgbe_fc_autoneg_backplane(hw);

--- 230 unchanged lines hidden (view full) ---

2960 * @index: led number to blink
2961 **/
2962s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)
2963{
2964 ixgbe_link_speed speed = 0;
2965 bool link_up = 0;
2966 u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
2967 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2933 case ixgbe_media_type_fiber:
2934 if (speed == IXGBE_LINK_SPEED_1GB_FULL)
2935 ret_val = ixgbe_fc_autoneg_fiber(hw);
2936 break;
2937
2938 /* Autoneg flow control on backplane adapters */
2939 case ixgbe_media_type_backplane:
2940 ret_val = ixgbe_fc_autoneg_backplane(hw);

--- 230 unchanged lines hidden (view full) ---

3171 * @index: led number to blink
3172 **/
3173s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)
3174{
3175 ixgbe_link_speed speed = 0;
3176 bool link_up = 0;
3177 u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
3178 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
3179 s32 ret_val = IXGBE_SUCCESS;
2968
2969 DEBUGFUNC("ixgbe_blink_led_start_generic");
2970
2971 /*
2972 * Link must be up to auto-blink the LEDs;
2973 * Force it if link is down.
2974 */
2975 hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
2976
2977 if (!link_up) {
3180
3181 DEBUGFUNC("ixgbe_blink_led_start_generic");
3182
3183 /*
3184 * Link must be up to auto-blink the LEDs;
3185 * Force it if link is down.
3186 */
3187 hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
3188
3189 if (!link_up) {
3190 /* Need the SW/FW semaphore around AUTOC writes if 82599 and
3191 * LESM is on.
3192 */
3193 bool got_lock = FALSE;
3194 if ((hw->mac.type == ixgbe_mac_82599EB) &&
3195 ixgbe_verify_lesm_fw_enabled_82599(hw)) {
3196 ret_val = hw->mac.ops.acquire_swfw_sync(hw,
3197 IXGBE_GSSR_MAC_CSR_SM);
3198 if (ret_val != IXGBE_SUCCESS) {
3199 ret_val = IXGBE_ERR_SWFW_SYNC;
3200 goto out;
3201 }
3202 got_lock = TRUE;
3203 }
3204
2978 autoc_reg |= IXGBE_AUTOC_AN_RESTART;
2979 autoc_reg |= IXGBE_AUTOC_FLU;
2980 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
2981 IXGBE_WRITE_FLUSH(hw);
3205 autoc_reg |= IXGBE_AUTOC_AN_RESTART;
3206 autoc_reg |= IXGBE_AUTOC_FLU;
3207 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
3208 IXGBE_WRITE_FLUSH(hw);
3209
3210 if (got_lock)
3211 hw->mac.ops.release_swfw_sync(hw,
3212 IXGBE_GSSR_MAC_CSR_SM);
2982 msec_delay(10);
2983 }
2984
2985 led_reg &= ~IXGBE_LED_MODE_MASK(index);
2986 led_reg |= IXGBE_LED_BLINK(index);
2987 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
2988 IXGBE_WRITE_FLUSH(hw);
2989
3213 msec_delay(10);
3214 }
3215
3216 led_reg &= ~IXGBE_LED_MODE_MASK(index);
3217 led_reg |= IXGBE_LED_BLINK(index);
3218 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
3219 IXGBE_WRITE_FLUSH(hw);
3220
2990 return IXGBE_SUCCESS;
3221out:
3222 return ret_val;
2991}
2992
2993/**
2994 * ixgbe_blink_led_stop_generic - Stop blinking LED based on index.
2995 * @hw: pointer to hardware structure
2996 * @index: led number to stop blinking
2997 **/
2998s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index)
2999{
3000 u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
3001 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
3223}
3224
3225/**
3226 * ixgbe_blink_led_stop_generic - Stop blinking LED based on index.
3227 * @hw: pointer to hardware structure
3228 * @index: led number to stop blinking
3229 **/
3230s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index)
3231{
3232 u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
3233 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
3234 s32 ret_val = IXGBE_SUCCESS;
3235 bool got_lock = FALSE;
3002
3003 DEBUGFUNC("ixgbe_blink_led_stop_generic");
3236
3237 DEBUGFUNC("ixgbe_blink_led_stop_generic");
3238 /* Need the SW/FW semaphore around AUTOC writes if 82599 and
3239 * LESM is on.
3240 */
3241 if ((hw->mac.type == ixgbe_mac_82599EB) &&
3242 ixgbe_verify_lesm_fw_enabled_82599(hw)) {
3243 ret_val = hw->mac.ops.acquire_swfw_sync(hw,
3244 IXGBE_GSSR_MAC_CSR_SM);
3245 if (ret_val != IXGBE_SUCCESS) {
3246 ret_val = IXGBE_ERR_SWFW_SYNC;
3247 goto out;
3248 }
3249 got_lock = TRUE;
3250 }
3004
3005
3006 autoc_reg &= ~IXGBE_AUTOC_FLU;
3007 autoc_reg |= IXGBE_AUTOC_AN_RESTART;
3008 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
3009
3251
3252
3253 autoc_reg &= ~IXGBE_AUTOC_FLU;
3254 autoc_reg |= IXGBE_AUTOC_AN_RESTART;
3255 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
3256
3257 if (hw->mac.type == ixgbe_mac_82599EB)
3258 ixgbe_reset_pipeline_82599(hw);
3259
3260 if (got_lock)
3261 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);
3262
3010 led_reg &= ~IXGBE_LED_MODE_MASK(index);
3011 led_reg &= ~IXGBE_LED_BLINK(index);
3012 led_reg |= IXGBE_LED_LINK_ACTIVE << IXGBE_LED_MODE_SHIFT(index);
3013 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
3014 IXGBE_WRITE_FLUSH(hw);
3015
3263 led_reg &= ~IXGBE_LED_MODE_MASK(index);
3264 led_reg &= ~IXGBE_LED_BLINK(index);
3265 led_reg |= IXGBE_LED_LINK_ACTIVE << IXGBE_LED_MODE_SHIFT(index);
3266 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
3267 IXGBE_WRITE_FLUSH(hw);
3268
3016 return IXGBE_SUCCESS;
3269out:
3270 return ret_val;
3017}
3018
3019/**
3020 * ixgbe_get_san_mac_addr_offset - Get SAN MAC address offset from the EEPROM
3021 * @hw: pointer to hardware structure
3022 * @san_mac_offset: SAN MAC address offset
3023 *
3024 * This function will read the EEPROM location for the SAN MAC address

--- 852 unchanged lines hidden (view full) ---

3877
3878/**
3879 * ixgbe_calculate_checksum - Calculate checksum for buffer
3880 * @buffer: pointer to EEPROM
3881 * @length: size of EEPROM to calculate a checksum for
3882 * Calculates the checksum for some buffer on a specified length. The
3883 * checksum calculated is returned.
3884 **/
3271}
3272
3273/**
3274 * ixgbe_get_san_mac_addr_offset - Get SAN MAC address offset from the EEPROM
3275 * @hw: pointer to hardware structure
3276 * @san_mac_offset: SAN MAC address offset
3277 *
3278 * This function will read the EEPROM location for the SAN MAC address

--- 852 unchanged lines hidden (view full) ---

4131
4132/**
4133 * ixgbe_calculate_checksum - Calculate checksum for buffer
4134 * @buffer: pointer to EEPROM
4135 * @length: size of EEPROM to calculate a checksum for
4136 * Calculates the checksum for some buffer on a specified length. The
4137 * checksum calculated is returned.
4138 **/
3885static u8 ixgbe_calculate_checksum(u8 *buffer, u32 length)
4139u8 ixgbe_calculate_checksum(u8 *buffer, u32 length)
3886{
3887 u32 i;
3888 u8 sum = 0;
3889
3890 DEBUGFUNC("ixgbe_calculate_checksum");
3891
3892 if (!buffer)
3893 return 0;

--- 9 unchanged lines hidden (view full) ---

3903 * @hw: pointer to the HW structure
3904 * @buffer: contains the command to write and where the return status will
3905 * be placed
3906 * @length: length of buffer, must be multiple of 4 bytes
3907 *
3908 * Communicates with the manageability block. On success return IXGBE_SUCCESS
3909 * else return IXGBE_ERR_HOST_INTERFACE_COMMAND.
3910 **/
4140{
4141 u32 i;
4142 u8 sum = 0;
4143
4144 DEBUGFUNC("ixgbe_calculate_checksum");
4145
4146 if (!buffer)
4147 return 0;

--- 9 unchanged lines hidden (view full) ---

4157 * @hw: pointer to the HW structure
4158 * @buffer: contains the command to write and where the return status will
4159 * be placed
4160 * @length: length of buffer, must be multiple of 4 bytes
4161 *
4162 * Communicates with the manageability block. On success return IXGBE_SUCCESS
4163 * else return IXGBE_ERR_HOST_INTERFACE_COMMAND.
4164 **/
3911static s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
3912 u32 length)
4165s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
4166 u32 length)
3913{
3914 u32 hicr, i, bi;
3915 u32 hdr_size = sizeof(struct ixgbe_hic_hdr);
3916 u8 buf_len, dword_len;
3917
3918 s32 ret_val = IXGBE_SUCCESS;
3919
3920 DEBUGFUNC("ixgbe_host_interface_command");

--- 240 unchanged lines hidden --- 		4167{
4168 u32 hicr, i, bi;
4169 u32 hdr_size = sizeof(struct ixgbe_hic_hdr);
4170 u8 buf_len, dword_len;
4171
4172 s32 ret_val = IXGBE_SUCCESS;
4173
4174 DEBUGFUNC("ixgbe_host_interface_command");

--- 240 unchanged lines hidden ---