ispreg.h (154704) | ispreg.h (155704) |
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1/* $FreeBSD: head/sys/dev/isp/ispreg.h 154704 2006-01-23 06:23:37Z mjacob $ */ | 1/* $FreeBSD: head/sys/dev/isp/ispreg.h 155704 2006-02-15 00:31:48Z mjacob $ */ |
2/*- 3 * Machine Independent (well, as best as possible) register 4 * definitions for Qlogic ISP SCSI adapters. 5 * 6 * Copyright (c) 1997-2006 by Matthew Jacob 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without --- 373 unchanged lines hidden (view full) --- 383 ((isp)->isp_type & ISP_HA_FC))? 12 : 6) 384#define NMBOX_BMASK(isp) \ 385 (((((isp)->isp_type & ISP_HA_SCSI) >= ISP_HA_SCSI_1040A) || \ 386 ((isp)->isp_type & ISP_HA_FC))? 0xfff : 0x3f) 387 388#define MAX_MAILBOX(isp) ((IS_FC(isp))? 12 : 8) 389#define MAILBOX_STORAGE 12 390typedef struct { | 2/*- 3 * Machine Independent (well, as best as possible) register 4 * definitions for Qlogic ISP SCSI adapters. 5 * 6 * Copyright (c) 1997-2006 by Matthew Jacob 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without --- 373 unchanged lines hidden (view full) --- 383 ((isp)->isp_type & ISP_HA_FC))? 12 : 6) 384#define NMBOX_BMASK(isp) \ 385 (((((isp)->isp_type & ISP_HA_SCSI) >= ISP_HA_SCSI_1040A) || \ 386 ((isp)->isp_type & ISP_HA_FC))? 0xfff : 0x3f) 387 388#define MAX_MAILBOX(isp) ((IS_FC(isp))? 12 : 8) 389#define MAILBOX_STORAGE 12 390typedef struct { |
391 u_int16_t param[MAILBOX_STORAGE]; 392 u_int16_t ibits, obits; | 391 uint16_t param[MAILBOX_STORAGE]; 392 uint16_t ibits, obits; |
393} mbreg_t; 394 395/* 396 * Fibre Protocol Module and Frame Buffer Register Offsets/Definitions (2X00). 397 * NB: The RISC processor must be paused and the appropriate register 398 * bank selected via BIU2100_CSR bits. 399 */ 400 --- 360 unchanged lines hidden (view full) --- 761 */ 762 763#define ISP1080_NVRAM_SIZE 256 764 765#define ISP1080_NVRAM_VERSION(c) ISP_NVRAM_VERSION(c) 766 767/* Offset 5 */ 768/* | 393} mbreg_t; 394 395/* 396 * Fibre Protocol Module and Frame Buffer Register Offsets/Definitions (2X00). 397 * NB: The RISC processor must be paused and the appropriate register 398 * bank selected via BIU2100_CSR bits. 399 */ 400 --- 360 unchanged lines hidden (view full) --- 761 */ 762 763#define ISP1080_NVRAM_SIZE 256 764 765#define ISP1080_NVRAM_VERSION(c) ISP_NVRAM_VERSION(c) 766 767/* Offset 5 */ 768/* |
769 u_int8_t bios_configuration_mode :2; 770 u_int8_t bios_disable :1; 771 u_int8_t selectable_scsi_boot_enable :1; 772 u_int8_t cd_rom_boot_enable :1; 773 u_int8_t disable_loading_risc_code :1; 774 u_int8_t enable_64bit_addressing :1; 775 u_int8_t unused_7 :1; | 769 uint8_t bios_configuration_mode :2; 770 uint8_t bios_disable :1; 771 uint8_t selectable_scsi_boot_enable :1; 772 uint8_t cd_rom_boot_enable :1; 773 uint8_t disable_loading_risc_code :1; 774 uint8_t enable_64bit_addressing :1; 775 uint8_t unused_7 :1; |
776 */ 777 778/* Offsets 6, 7 */ 779/* | 776 */ 777 778/* Offsets 6, 7 */ 779/* |
780 u_int8_t boot_lun_number :5; 781 u_int8_t scsi_bus_number :1; 782 u_int8_t unused_6 :1; 783 u_int8_t unused_7 :1; 784 u_int8_t boot_target_number :4; 785 u_int8_t unused_12 :1; 786 u_int8_t unused_13 :1; 787 u_int8_t unused_14 :1; 788 u_int8_t unused_15 :1; | 780 uint8_t boot_lun_number :5; 781 uint8_t scsi_bus_number :1; 782 uint8_t unused_6 :1; 783 uint8_t unused_7 :1; 784 uint8_t boot_target_number :4; 785 uint8_t unused_12 :1; 786 uint8_t unused_13 :1; 787 uint8_t unused_14 :1; 788 uint8_t unused_15 :1; |
789 */ 790 791#define ISP1080_NVRAM_HBA_ENABLE(c) ISPBSMX(c, 16, 3, 0x01) 792 793#define ISP1080_NVRAM_BURST_ENABLE(c) ISPBSMX(c, 16, 1, 0x01) 794#define ISP1080_NVRAM_FIFO_THRESHOLD(c) ISPBSMX(c, 16, 4, 0x0f) 795 796#define ISP1080_NVRAM_AUTO_TERM_SUPPORT(c) ISPBSMX(c, 17, 7, 0x01) --- 153 unchanged lines hidden (view full) --- 950#define ISP2100_NVRAM_OPTIONS(c) (c)[8] 951#define ISP2100_NVRAM_MAXFRAMELENGTH(c) (((c)[10]) | ((c)[11] << 8)) 952#define ISP2100_NVRAM_MAXIOCBALLOCATION(c) (((c)[12]) | ((c)[13] << 8)) 953#define ISP2100_NVRAM_EXECUTION_THROTTLE(c) (((c)[14]) | ((c)[15] << 8)) 954#define ISP2100_NVRAM_RETRY_COUNT(c) (c)[16] 955#define ISP2100_NVRAM_RETRY_DELAY(c) (c)[17] 956 957#define ISP2100_NVRAM_PORT_NAME(c) (\ | 789 */ 790 791#define ISP1080_NVRAM_HBA_ENABLE(c) ISPBSMX(c, 16, 3, 0x01) 792 793#define ISP1080_NVRAM_BURST_ENABLE(c) ISPBSMX(c, 16, 1, 0x01) 794#define ISP1080_NVRAM_FIFO_THRESHOLD(c) ISPBSMX(c, 16, 4, 0x0f) 795 796#define ISP1080_NVRAM_AUTO_TERM_SUPPORT(c) ISPBSMX(c, 17, 7, 0x01) --- 153 unchanged lines hidden (view full) --- 950#define ISP2100_NVRAM_OPTIONS(c) (c)[8] 951#define ISP2100_NVRAM_MAXFRAMELENGTH(c) (((c)[10]) | ((c)[11] << 8)) 952#define ISP2100_NVRAM_MAXIOCBALLOCATION(c) (((c)[12]) | ((c)[13] << 8)) 953#define ISP2100_NVRAM_EXECUTION_THROTTLE(c) (((c)[14]) | ((c)[15] << 8)) 954#define ISP2100_NVRAM_RETRY_COUNT(c) (c)[16] 955#define ISP2100_NVRAM_RETRY_DELAY(c) (c)[17] 956 957#define ISP2100_NVRAM_PORT_NAME(c) (\ |
958 (((u_int64_t)(c)[18]) << 56) | \ 959 (((u_int64_t)(c)[19]) << 48) | \ 960 (((u_int64_t)(c)[20]) << 40) | \ 961 (((u_int64_t)(c)[21]) << 32) | \ 962 (((u_int64_t)(c)[22]) << 24) | \ 963 (((u_int64_t)(c)[23]) << 16) | \ 964 (((u_int64_t)(c)[24]) << 8) | \ 965 (((u_int64_t)(c)[25]) << 0)) | 958 (((uint64_t)(c)[18]) << 56) | \ 959 (((uint64_t)(c)[19]) << 48) | \ 960 (((uint64_t)(c)[20]) << 40) | \ 961 (((uint64_t)(c)[21]) << 32) | \ 962 (((uint64_t)(c)[22]) << 24) | \ 963 (((uint64_t)(c)[23]) << 16) | \ 964 (((uint64_t)(c)[24]) << 8) | \ 965 (((uint64_t)(c)[25]) << 0)) |
966 967#define ISP2100_NVRAM_HARDLOOPID(c) (c)[26] 968 969#define ISP2200_NVRAM_NODE_NAME(c) (\ | 966 967#define ISP2100_NVRAM_HARDLOOPID(c) (c)[26] 968 969#define ISP2200_NVRAM_NODE_NAME(c) (\ |
970 (((u_int64_t)(c)[30]) << 56) | \ 971 (((u_int64_t)(c)[31]) << 48) | \ 972 (((u_int64_t)(c)[32]) << 40) | \ 973 (((u_int64_t)(c)[33]) << 32) | \ 974 (((u_int64_t)(c)[34]) << 24) | \ 975 (((u_int64_t)(c)[35]) << 16) | \ 976 (((u_int64_t)(c)[36]) << 8) | \ 977 (((u_int64_t)(c)[37]) << 0)) | 970 (((uint64_t)(c)[30]) << 56) | \ 971 (((uint64_t)(c)[31]) << 48) | \ 972 (((uint64_t)(c)[32]) << 40) | \ 973 (((uint64_t)(c)[33]) << 32) | \ 974 (((uint64_t)(c)[34]) << 24) | \ 975 (((uint64_t)(c)[35]) << 16) | \ 976 (((uint64_t)(c)[36]) << 8) | \ 977 (((uint64_t)(c)[37]) << 0)) |
978 979#define ISP2100_NVRAM_HBA_OPTIONS(c) (c)[70] 980#define ISP2100_NVRAM_HBA_DISABLE(c) ISPBSMX(c, 70, 0, 0x01) 981#define ISP2100_NVRAM_BIOS_DISABLE(c) ISPBSMX(c, 70, 1, 0x01) 982#define ISP2100_NVRAM_LUN_DISABLE(c) ISPBSMX(c, 70, 2, 0x01) 983#define ISP2100_NVRAM_ENABLE_SELECT_BOOT(c) ISPBSMX(c, 70, 3, 0x01) 984#define ISP2100_NVRAM_DISABLE_CODELOAD(c) ISPBSMX(c, 70, 4, 0x01) 985#define ISP2100_NVRAM_SET_CACHELINESZ(c) ISPBSMX(c, 70, 5, 0x01) 986 987#define ISP2100_NVRAM_BOOT_NODE_NAME(c) (\ | 978 979#define ISP2100_NVRAM_HBA_OPTIONS(c) (c)[70] 980#define ISP2100_NVRAM_HBA_DISABLE(c) ISPBSMX(c, 70, 0, 0x01) 981#define ISP2100_NVRAM_BIOS_DISABLE(c) ISPBSMX(c, 70, 1, 0x01) 982#define ISP2100_NVRAM_LUN_DISABLE(c) ISPBSMX(c, 70, 2, 0x01) 983#define ISP2100_NVRAM_ENABLE_SELECT_BOOT(c) ISPBSMX(c, 70, 3, 0x01) 984#define ISP2100_NVRAM_DISABLE_CODELOAD(c) ISPBSMX(c, 70, 4, 0x01) 985#define ISP2100_NVRAM_SET_CACHELINESZ(c) ISPBSMX(c, 70, 5, 0x01) 986 987#define ISP2100_NVRAM_BOOT_NODE_NAME(c) (\ |
988 (((u_int64_t)(c)[72]) << 56) | \ 989 (((u_int64_t)(c)[73]) << 48) | \ 990 (((u_int64_t)(c)[74]) << 40) | \ 991 (((u_int64_t)(c)[75]) << 32) | \ 992 (((u_int64_t)(c)[76]) << 24) | \ 993 (((u_int64_t)(c)[77]) << 16) | \ 994 (((u_int64_t)(c)[78]) << 8) | \ 995 (((u_int64_t)(c)[79]) << 0)) | 988 (((uint64_t)(c)[72]) << 56) | \ 989 (((uint64_t)(c)[73]) << 48) | \ 990 (((uint64_t)(c)[74]) << 40) | \ 991 (((uint64_t)(c)[75]) << 32) | \ 992 (((uint64_t)(c)[76]) << 24) | \ 993 (((uint64_t)(c)[77]) << 16) | \ 994 (((uint64_t)(c)[78]) << 8) | \ 995 (((uint64_t)(c)[79]) << 0)) |
996 997#define ISP2100_NVRAM_BOOT_LUN(c) (c)[80] 998 999#define ISP2200_HBA_FEATURES(c) (c)[232] | ((c)[233] << 8) 1000 1001/* 1002 * Firmware Crash Dump 1003 * 1004 * QLogic needs specific information format when they look at firmware crashes. 1005 * 1006 * This is incredibly kernel memory consumptive (to say the least), so this 1007 * code is only compiled in when needed. 1008 */ 1009 1010#define QLA2200_RISC_IMAGE_DUMP_SIZE \ | 996 997#define ISP2100_NVRAM_BOOT_LUN(c) (c)[80] 998 999#define ISP2200_HBA_FEATURES(c) (c)[232] | ((c)[233] << 8) 1000 1001/* 1002 * Firmware Crash Dump 1003 * 1004 * QLogic needs specific information format when they look at firmware crashes. 1005 * 1006 * This is incredibly kernel memory consumptive (to say the least), so this 1007 * code is only compiled in when needed. 1008 */ 1009 1010#define QLA2200_RISC_IMAGE_DUMP_SIZE \ |
1011 (1 * sizeof (u_int16_t)) + /* 'used' flag (also HBA type) */ \ 1012 (352 * sizeof (u_int16_t)) + /* RISC registers */ \ 1013 (61440 * sizeof (u_int16_t)) /* RISC SRAM (offset 0x1000..0xffff) */ | 1011 (1 * sizeof (uint16_t)) + /* 'used' flag (also HBA type) */ \ 1012 (352 * sizeof (uint16_t)) + /* RISC registers */ \ 1013 (61440 * sizeof (uint16_t)) /* RISC SRAM (offset 0x1000..0xffff) */ |
1014#define QLA2300_RISC_IMAGE_DUMP_SIZE \ | 1014#define QLA2300_RISC_IMAGE_DUMP_SIZE \ |
1015 (1 * sizeof (u_int16_t)) + /* 'used' flag (also HBA type) */ \ 1016 (464 * sizeof (u_int16_t)) + /* RISC registers */ \ 1017 (63488 * sizeof (u_int16_t)) + /* RISC SRAM (0x0800..0xffff) */ \ 1018 (4096 * sizeof (u_int16_t)) + /* RISC SRAM (0x10000..0x10FFF) */ \ 1019 (61440 * sizeof (u_int16_t)) /* RISC SRAM (0x11000..0x1FFFF) */ | 1015 (1 * sizeof (uint16_t)) + /* 'used' flag (also HBA type) */ \ 1016 (464 * sizeof (uint16_t)) + /* RISC registers */ \ 1017 (63488 * sizeof (uint16_t)) + /* RISC SRAM (0x0800..0xffff) */ \ 1018 (4096 * sizeof (uint16_t)) + /* RISC SRAM (0x10000..0x10FFF) */ \ 1019 (61440 * sizeof (uint16_t)) /* RISC SRAM (0x11000..0x1FFFF) */ |
1020/* the larger of the two */ 1021#define ISP_CRASH_IMAGE_SIZE QLA2300_RISC_IMAGE_DUMP_SIZE 1022#endif /* _ISPREG_H */ | 1020/* the larger of the two */ 1021#define ISP_CRASH_IMAGE_SIZE QLA2300_RISC_IMAGE_DUMP_SIZE 1022#endif /* _ISPREG_H */ |