1/*-
2 * Copyright (c) 2002 Adaptec Inc.
3 * All rights reserved.
4 *
5 * Written by: David Jeffery
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
| 1/*-
2 * Copyright (c) 2002 Adaptec Inc.
3 * All rights reserved.
4 *
5 * Written by: David Jeffery
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
|
28 * $FreeBSD: head/sys/dev/ips/ips.h 150535 2005-09-25 17:12:41Z scottl $
| 28 * $FreeBSD: head/sys/dev/ips/ips.h 152919 2005-11-29 09:39:41Z scottl $
|
29 */
| 29 */
|
| 30#ifndef _IPS_H
31#define _IPS_H
|
30
| 32
|
| 33#ifdef _KERNEL
|
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/kernel.h>
35#include <sys/module.h>
36#include <sys/bus.h>
37#include <sys/conf.h>
38#include <sys/types.h>
39#include <sys/queue.h>
40#include <sys/bio.h>
41#include <sys/malloc.h>
42#include <sys/mutex.h>
43#include <sys/sema.h>
44#include <sys/time.h>
45
46#include <machine/bus.h>
47#include <sys/rman.h>
48#include <machine/resource.h>
49
| 34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/module.h>
39#include <sys/bus.h>
40#include <sys/conf.h>
41#include <sys/types.h>
42#include <sys/queue.h>
43#include <sys/bio.h>
44#include <sys/malloc.h>
45#include <sys/mutex.h>
46#include <sys/sema.h>
47#include <sys/time.h>
48
49#include <machine/bus.h>
50#include <sys/rman.h>
51#include <machine/resource.h>
52
|
50#include <dev/pci/pcireg.h>
51#include <dev/pci/pcivar.h>
52
| |
53MALLOC_DECLARE(M_IPSBUF);
54
55/*
| 53MALLOC_DECLARE(M_IPSBUF);
54
55/*
|
56 * IPS CONSTANTS
57 */
58#define IPS_VENDOR_ID 0x1014
59#define IPS_VENDOR_ID_ADAPTEC 0x9005
60#define IPS_MORPHEUS_DEVICE_ID 0x01BD
61#define IPS_COPPERHEAD_DEVICE_ID 0x002E
62#define IPS_MARCO_DEVICE_ID 0x0250
63#define IPS_CSL 0xff
64#define IPS_POCL 0x30
65
66/* amounts of memory to allocate for certain commands */
67#define IPS_ADAPTER_INFO_LEN (sizeof(ips_adapter_info_t))
68#define IPS_DRIVE_INFO_LEN (sizeof(ips_drive_info_t))
69#define IPS_COMMAND_LEN 24
70#define IPS_MAX_SG_LEN (sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS)
71#define IPS_NVRAM_PAGE_SIZE 128
72/* various flags */
73#define IPS_STATIC_FLAG 0x01
74
75/* states for the card to be in */
76#define IPS_DEV_OPEN 0x01
77#define IPS_TIMEOUT 0x02 /* command time out, need reset */
78#define IPS_OFFLINE 0x04 /* can't reset card/card failure */
79#define IPS_STATIC_BUSY 0x08
80
81/* max number of commands set to something low for now */
82#define IPS_MAX_CMD_NUM 128
83#define IPS_MAX_NUM_DRIVES 8
84#define IPS_MAX_SG_ELEMENTS 32
85#define IPS_MAX_IOBUF_SIZE (64 * 1024)
86#define IPS_BLKSIZE 512
87
88/* logical drive states */
89
90#define IPS_LD_OFFLINE 0x02
91#define IPS_LD_OKAY 0x03
92#define IPS_LD_DEGRADED 0x04
93#define IPS_LD_FREE 0x00
94#define IPS_LD_SYS 0x06
95#define IPS_LD_CRS 0x24
96
97/* register offsets */
98#define MORPHEUS_REG_OMR0 0x0018 /* Outbound Msg. Reg. 0 */
99#define MORPHEUS_REG_OMR1 0x001C /* Outbound Msg. Reg. 1 */
100#define MORPHEUS_REG_IDR 0x0020 /* Inbound Doorbell Reg. */
101#define MORPHEUS_REG_IISR 0x0024 /* Inbound IRQ Status Reg. */
102#define MORPHEUS_REG_IIMR 0x0028 /* Inbound IRQ Mask Reg. */
103#define MORPHEUS_REG_OISR 0x0030 /* Outbound IRQ Status Reg. */
104#define MORPHEUS_REG_OIMR 0x0034 /* Outbound IRQ Status Reg. */
105#define MORPHEUS_REG_IQPR 0x0040 /* Inbound Queue Port Reg. */
106#define MORPHEUS_REG_OQPR 0x0044 /* Outbound Queue Port Reg. */
107
108#define COPPER_REG_SCPR 0x05 /* Subsystem Ctrl. Port Reg. */
109#define COPPER_REG_ISPR 0x06 /* IRQ Status Port Reg. */
110#define COPPER_REG_CBSP 0x07 /* ? Reg. */
111#define COPPER_REG_HISR 0x08 /* Host IRQ Status Reg. */
112#define COPPER_REG_CCSAR 0x10 /* Cmd. Channel Sys Addr Reg.*/
113#define COPPER_REG_CCCR 0x14 /* Cmd. Channel Ctrl. Reg. */
114#define COPPER_REG_SQHR 0x20 /* Status Queue Head Reg. */
115#define COPPER_REG_SQTR 0x24 /* Status Queue Tail Reg. */
116#define COPPER_REG_SQER 0x28 /* Status Queue End Reg. */
117#define COPPER_REG_SQSR 0x2C /* Status Queue Start Reg. */
118
119/* bit definitions */
120#define MORPHEUS_BIT_POST1 0x01
121#define MORPHEUS_BIT_POST2 0x02
122#define MORPHEUS_BIT_CMD_IRQ 0x08
123
124#define COPPER_CMD_START 0x101A
125#define COPPER_SEM_BIT 0x08
126#define COPPER_EI_BIT 0x80
127#define COPPER_EBM_BIT 0x02
128#define COPPER_RESET_BIT 0x80
129#define COPPER_GHI_BIT 0x04
130#define COPPER_SCE_BIT 0x01
131#define COPPER_OP_BIT 0x01
132#define COPPER_ILE_BIT 0x10
133
134/* status defines */
135#define IPS_POST1_OK 0x8000
136#define IPS_POST2_OK 0x000f
137
138/* command op codes */
139#define IPS_READ_CMD 0x02
140#define IPS_WRITE_CMD 0x03
141#define IPS_ADAPTER_INFO_CMD 0x05
142#define IPS_CACHE_FLUSH_CMD 0x0A
143#define IPS_REBUILD_STATUS_CMD 0x0C
144#define IPS_ERROR_TABLE_CMD 0x17
145#define IPS_DRIVE_INFO_CMD 0x19
146#define IPS_SUBSYS_PARAM_CMD 0x40
147#define IPS_CONFIG_SYNC_CMD 0x58
148#define IPS_SG_READ_CMD 0x82
149#define IPS_SG_WRITE_CMD 0x83
150#define IPS_RW_NVRAM_CMD 0xBC
151#define IPS_FFDC_CMD 0xD7
152
153/* basic_status information returned by the adapter */
154#define IPS_MIN_ERROR 0x02
155#define IPS_BASIC_STATUS_MASK 0xFF
156#define IPS_GSC_STATUS_MASK 0x0F
157#define IPS_CMD_SUCCESS 0x00
158#define IPS_CMD_RECOVERED_ERROR 0x01
159#define IPS_DRV_ERROR 0x02 /* Driver supplied error */
160#define IPS_INVAL_OPCO 0x03
161#define IPS_INVAL_CMD_BLK 0x04
162#define IPS_INVAL_PARM_BLK 0x05
163#define IPS_BUSY 0x08
164#define IPS_CMD_CMPLT_WERROR 0x0C
165#define IPS_LD_ERROR 0x0D
166#define IPS_CMD_TIMEOUT 0x0E
167#define IPS_PHYS_DRV_ERROR 0x0F
168
169/* extended_status information returned by the adapter */
170#define IPS_ERR_SEL_TO 0xF0
171#define IPS_ERR_OU_RUN 0xF2
172#define IPS_ERR_HOST_RESET 0xF7
173#define IPS_ERR_DEV_RESET 0xF8
174#define IPS_ERR_RECOVERY 0xFC
175#define IPS_ERR_CKCOND 0xFF
176
177#define IPS_OS_FREEBSD 8
178#define IPS_VERSION_MAJOR "0.90"
179#define IPS_VERSION_MINOR ".10"
180
181/* Adapter Types */
182#define IPS_ADAPTER_COPPERHEAD 0x01
183#define IPS_ADAPTER_COPPERHEAD2 0x02
184#define IPS_ADAPTER_COPPERHEADOB1 0x03
185#define IPS_ADAPTER_COPPERHEADOB2 0x04
186#define IPS_ADAPTER_CLARINET 0x05
187#define IPS_ADAPTER_CLARINETLITE 0x06
188#define IPS_ADAPTER_TROMBONE 0x07
189#define IPS_ADAPTER_MORPHEUS 0x08
190#define IPS_ADAPTER_MORPHEUSLITE 0x09
191#define IPS_ADAPTER_NEO 0x0A
192#define IPS_ADAPTER_NEOLITE 0x0B
193#define IPS_ADAPTER_SARASOTA2 0x0C
194#define IPS_ADAPTER_SARASOTA1 0x0D
195#define IPS_ADAPTER_MARCO 0x0E
196#define IPS_ADAPTER_SEBRING 0x0F
197#define IPS_ADAPTER_MAX_T IPS_ADAPTER_SEBRING
198
199/* values for ffdc_settime (from gmtime) */
200#define IPS_SECSPERMIN 60
201#define IPS_MINSPERHOUR 60
202#define IPS_HOURSPERDAY 24
203#define IPS_DAYSPERWEEK 7
204#define IPS_DAYSPERNYEAR 365
205#define IPS_DAYSPERLYEAR 366
206#define IPS_SECSPERHOUR (IPS_SECSPERMIN * IPS_MINSPERHOUR)
207#define IPS_SECSPERDAY ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY)
208#define IPS_MONSPERYEAR 12
209#define IPS_EPOCH_YEAR 1970
210#define IPS_LEAPS_THRU_END_OF(y) ((y) / 4 - (y) / 100 + (y) / 400)
211#define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0))
212
213/*
| |
214 * IPS MACROS
215 */
216
217#define ips_read_1(sc,offset) bus_space_read_1(sc->bustag, sc->bushandle, offset)
218#define ips_read_2(sc,offset) bus_space_read_2(sc->bustag, sc->bushandle, offset)
219#define ips_read_4(sc,offset) bus_space_read_4(sc->bustag, sc->bushandle, offset)
220
221#define ips_write_1(sc,offset,value) bus_space_write_1(sc->bustag, sc->bushandle, offset, value)
222#define ips_write_2(sc,offset,value) bus_space_write_2(sc->bustag, sc->bushandle, offset, value)
223#define ips_write_4(sc,offset,value) bus_space_write_4(sc->bustag, sc->bushandle, offset, value)
224
225/* this is ugly. It zeros the end elements in an ips_command_t struct starting with the status element */
226#define clear_ips_command(command) bzero(&((command)->status), (unsigned long)(&(command)[1])-(unsigned long)&((command)->status))
227
228#define ips_read_request(iobuf) ((iobuf)->bio_cmd == BIO_READ)
229
230#define COMMAND_ERROR(command) (((command)->status.fields.basic_status & IPS_GSC_STATUS_MASK) >= IPS_MIN_ERROR)
231
232#define ips_set_error(command, error) do { \
233 (command)->status.fields.basic_status = IPS_DRV_ERROR; \
234 (command)->status.fields.reserved = ((error) & 0x0f); \
235} while (0);
236
237#ifndef IPS_DEBUG
238#define DEVICE_PRINTF(x...)
239#define PRINTF(x...)
240#else
241#define DEVICE_PRINTF(level,x...) if(IPS_DEBUG >= level)device_printf(x)
242#define PRINTF(level,x...) if(IPS_DEBUG >= level)printf(x)
243#endif
244
| 56 * IPS MACROS
57 */
58
59#define ips_read_1(sc,offset) bus_space_read_1(sc->bustag, sc->bushandle, offset)
60#define ips_read_2(sc,offset) bus_space_read_2(sc->bustag, sc->bushandle, offset)
61#define ips_read_4(sc,offset) bus_space_read_4(sc->bustag, sc->bushandle, offset)
62
63#define ips_write_1(sc,offset,value) bus_space_write_1(sc->bustag, sc->bushandle, offset, value)
64#define ips_write_2(sc,offset,value) bus_space_write_2(sc->bustag, sc->bushandle, offset, value)
65#define ips_write_4(sc,offset,value) bus_space_write_4(sc->bustag, sc->bushandle, offset, value)
66
67/* this is ugly. It zeros the end elements in an ips_command_t struct starting with the status element */
68#define clear_ips_command(command) bzero(&((command)->status), (unsigned long)(&(command)[1])-(unsigned long)&((command)->status))
69
70#define ips_read_request(iobuf) ((iobuf)->bio_cmd == BIO_READ)
71
72#define COMMAND_ERROR(command) (((command)->status.fields.basic_status & IPS_GSC_STATUS_MASK) >= IPS_MIN_ERROR)
73
74#define ips_set_error(command, error) do { \
75 (command)->status.fields.basic_status = IPS_DRV_ERROR; \
76 (command)->status.fields.reserved = ((error) & 0x0f); \
77} while (0);
78
79#ifndef IPS_DEBUG
80#define DEVICE_PRINTF(x...)
81#define PRINTF(x...)
82#else
83#define DEVICE_PRINTF(level,x...) if(IPS_DEBUG >= level)device_printf(x)
84#define PRINTF(level,x...) if(IPS_DEBUG >= level)printf(x)
85#endif
86
|
245/*
246 * IPS STRUCTS
247 */
248
| |
249struct ips_softc;
250
| 87struct ips_softc;
88
|
251typedef struct{
252 u_int8_t command;
253 u_int8_t id;
254 u_int8_t drivenum;
255 u_int8_t reserve2;
256 u_int32_t lba;
257 u_int32_t buffaddr;
258 u_int32_t reserve3;
259} __attribute__ ((packed)) ips_generic_cmd;
260
261typedef struct{
262 u_int8_t command;
263 u_int8_t id;
264 u_int8_t drivenum;
265 u_int8_t segnum;
266 u_int32_t lba;
267 u_int32_t buffaddr;
268 u_int16_t length;
269 u_int16_t reserve1;
270} __attribute__ ((packed)) ips_io_cmd;
271
272typedef struct{
273 u_int8_t command;
274 u_int8_t id;
275 u_int8_t pagenum;
276 u_int8_t rw;
277 u_int32_t reserve1;
278 u_int32_t buffaddr;
279 u_int32_t reserve3;
280} __attribute__ ((packed)) ips_rw_nvram_cmd;
281
282typedef struct{
283 u_int8_t command;
284 u_int8_t id;
285 u_int8_t drivenum;
286 u_int8_t reserve1;
287 u_int32_t reserve2;
288 u_int32_t buffaddr;
289 u_int32_t reserve3;
290} __attribute__ ((packed)) ips_drive_cmd;
291
292typedef struct{
293 u_int8_t command;
294 u_int8_t id;
295 u_int8_t reserve1;
296 u_int8_t commandtype;
297 u_int32_t reserve2;
298 u_int32_t buffaddr;
299 u_int32_t reserve3;
300} __attribute__((packed)) ips_adapter_info_cmd;
301
302typedef struct{
303 u_int8_t command;
304 u_int8_t id;
305 u_int8_t reset_count;
306 u_int8_t reset_type;
307 u_int8_t second;
308 u_int8_t minute;
309 u_int8_t hour;
310 u_int8_t day;
311 u_int8_t reserve1[4];
312 u_int8_t month;
313 u_int8_t yearH;
314 u_int8_t yearL;
315 u_int8_t reserve2;
316} __attribute__((packed)) ips_adapter_ffdc_cmd;
317
318typedef union{
319 ips_generic_cmd generic_cmd;
320 ips_drive_cmd drive_cmd;
321 ips_adapter_info_cmd adapter_info_cmd;
322} ips_cmd_buff_t;
323
| |
324typedef struct {
| 89typedef struct {
|
325 u_int32_t signature;
326 u_int8_t reserved;
327 u_int8_t adapter_slot;
328 u_int16_t adapter_type;
329 u_int8_t bios_high[4];
330 u_int8_t bios_low[4];
331 u_int16_t reserve2;
332 u_int8_t reserve3;
333 u_int8_t operating_system;
334 u_int8_t driver_high[4];
335 u_int8_t driver_low[4];
336 u_int8_t reserve4[100];
337}__attribute__((packed)) ips_nvram_page5;
338
339typedef struct{
340 u_int32_t addr;
341 u_int32_t len;
342} ips_sg_element_t;
343
344typedef struct{
345 u_int8_t drivenum;
346 u_int8_t merge_id;
347 u_int8_t raid_lvl;
348 u_int8_t state;
349 u_int32_t sector_count;
350} __attribute__((packed)) ips_drive_t;
351
352typedef struct{
353 u_int8_t drivecount;
354 u_int8_t reserve1;
355 u_int16_t reserve2;
356 ips_drive_t drives[IPS_MAX_NUM_DRIVES];
357}__attribute__((packed)) ips_drive_info_t;
358
359typedef struct{
360 u_int8_t drivecount;
361 u_int8_t miscflags;
362 u_int8_t SLTflags;
363 u_int8_t BSTflags;
364 u_int8_t pwr_chg_count;
365 u_int8_t wrong_addr_count;
366 u_int8_t unident_count;
367 u_int8_t nvram_dev_chg_count;
368 u_int8_t codeblock_version[8];
369 u_int8_t bootblock_version[8];
370 u_int32_t drive_sector_count[IPS_MAX_NUM_DRIVES];
371 u_int8_t max_concurrent_cmds;
372 u_int8_t max_phys_devices;
373 u_int16_t flash_prog_count;
374 u_int8_t defunct_disks;
375 u_int8_t rebuildflags;
376 u_int8_t offline_drivecount;
377 u_int8_t critical_drivecount;
378 u_int16_t config_update_count;
379 u_int8_t blockedflags;
380 u_int8_t psdn_error;
381 u_int16_t addr_dead_disk[4*16];/* ugly, max # channels * max # scsi devices per channel */
382}__attribute__((packed)) ips_adapter_info_t;
383
384typedef struct {
| |
385 u_int32_t status[IPS_MAX_CMD_NUM];
386 u_int32_t base_phys_addr;
387 int nextstatus;
388 bus_dma_tag_t dmatag;
389 bus_dmamap_t dmamap;
390} ips_copper_queue_t;
391
| 90 u_int32_t status[IPS_MAX_CMD_NUM];
91 u_int32_t base_phys_addr;
92 int nextstatus;
93 bus_dma_tag_t dmatag;
94 bus_dmamap_t dmamap;
95} ips_copper_queue_t;
96
|
392typedef union {
393 struct {
394 u_int8_t reserved;
395 u_int8_t command_id;
396 u_int8_t basic_status;
397 u_int8_t extended_status;
398 } fields;
399 volatile u_int32_t value;
400} ips_cmd_status_t;
401
| |
402/* used to keep track of current commands to the card */
403typedef struct ips_command{
404 u_int8_t command_number;
405 u_int8_t id;
406 u_int8_t timeout;
407 struct ips_softc * sc;
408 bus_dma_tag_t data_dmatag;
409 bus_dmamap_t data_dmamap;
410 bus_dmamap_t command_dmamap;
411 void * command_buffer;
412 u_int32_t command_phys_addr;/*WARNING! must be changed if 64bit addressing ever used*/
413 ips_cmd_status_t status;
414 SLIST_ENTRY(ips_command) next;
415 void * data_buffer;
416 void * arg;
417 void (* callback)(struct ips_command *command);
418}ips_command_t;
419
420typedef struct ips_softc{
421 struct resource * iores;
422 struct resource * irqres;
423 struct intr_config_hook ips_ich;
424 int configured;
425 int state;
426 int iotype;
427 int rid;
428 int irqrid;
429 void * irqcookie;
430 bus_space_tag_t bustag;
431 bus_space_handle_t bushandle;
432 bus_dma_tag_t adapter_dmatag;
433 bus_dma_tag_t command_dmatag;
434 bus_dma_tag_t sg_dmatag;
435 device_t dev;
436 struct cdev *device_file;
437 struct callout_handle timer;
438 u_int16_t adapter_type;
439 ips_adapter_info_t adapter_info;
440 device_t diskdev[IPS_MAX_NUM_DRIVES];
441 ips_drive_t drives[IPS_MAX_NUM_DRIVES];
442 u_int8_t drivecount;
443 u_int16_t ffdc_resetcount;
444 struct timeval ffdc_resettime;
445 u_int8_t next_drive;
446 u_int8_t max_cmds;
447 volatile u_int8_t used_commands;
448 ips_command_t *commandarray;
449 ips_command_t *staticcmd;
450 SLIST_HEAD(command_list, ips_command) free_cmd_list;
451 int (* ips_adapter_reinit)(struct ips_softc *sc,
452 int force);
453 void (* ips_adapter_intr)(void *sc);
454 void (* ips_issue_cmd)(ips_command_t *command);
455 void (* ips_poll_cmd)(ips_command_t *command);
456 ips_copper_queue_t * copper_queue;
457 struct mtx queue_mtx;
458 struct bio_queue_head queue;
459 struct sema cmd_sema;
460
461}ips_softc_t;
462
463/* function defines from ips_ioctl.c */
464extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr,
465 int32_t flags);
466/* function defines from ips_disk.c */
467extern void ipsd_finish(struct bio *iobuf);
468
469/* function defines from ips_commands.c */
470extern int ips_flush_cache(ips_softc_t *sc);
471extern void ips_start_io_request(ips_softc_t *sc);
472extern int ips_get_drive_info(ips_softc_t *sc);
473extern int ips_get_adapter_info(ips_softc_t *sc);
474extern int ips_ffdc_reset(ips_softc_t *sc);
475extern int ips_update_nvram(ips_softc_t *sc);
476extern int ips_clear_adapter(ips_softc_t *sc);
477
478/* function defines from ips.c */
479extern int ips_get_free_cmd(ips_softc_t *sc, ips_command_t **command, unsigned long flags);
480extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command);
481extern int ips_adapter_init(ips_softc_t *sc);
482extern int ips_morpheus_reinit(ips_softc_t *sc, int force);
483extern int ips_adapter_free(ips_softc_t *sc);
484extern void ips_morpheus_intr(void *sc);
485extern void ips_issue_morpheus_cmd(ips_command_t *command);
486extern void ips_morpheus_poll(ips_command_t *command);
487extern int ips_copperhead_reinit(ips_softc_t *sc, int force);
488extern void ips_copperhead_intr(void *sc);
489extern void ips_issue_copperhead_cmd(ips_command_t *command);
490extern void ips_copperhead_poll(ips_command_t *command);
491
| 97/* used to keep track of current commands to the card */
98typedef struct ips_command{
99 u_int8_t command_number;
100 u_int8_t id;
101 u_int8_t timeout;
102 struct ips_softc * sc;
103 bus_dma_tag_t data_dmatag;
104 bus_dmamap_t data_dmamap;
105 bus_dmamap_t command_dmamap;
106 void * command_buffer;
107 u_int32_t command_phys_addr;/*WARNING! must be changed if 64bit addressing ever used*/
108 ips_cmd_status_t status;
109 SLIST_ENTRY(ips_command) next;
110 void * data_buffer;
111 void * arg;
112 void (* callback)(struct ips_command *command);
113}ips_command_t;
114
115typedef struct ips_softc{
116 struct resource * iores;
117 struct resource * irqres;
118 struct intr_config_hook ips_ich;
119 int configured;
120 int state;
121 int iotype;
122 int rid;
123 int irqrid;
124 void * irqcookie;
125 bus_space_tag_t bustag;
126 bus_space_handle_t bushandle;
127 bus_dma_tag_t adapter_dmatag;
128 bus_dma_tag_t command_dmatag;
129 bus_dma_tag_t sg_dmatag;
130 device_t dev;
131 struct cdev *device_file;
132 struct callout_handle timer;
133 u_int16_t adapter_type;
134 ips_adapter_info_t adapter_info;
135 device_t diskdev[IPS_MAX_NUM_DRIVES];
136 ips_drive_t drives[IPS_MAX_NUM_DRIVES];
137 u_int8_t drivecount;
138 u_int16_t ffdc_resetcount;
139 struct timeval ffdc_resettime;
140 u_int8_t next_drive;
141 u_int8_t max_cmds;
142 volatile u_int8_t used_commands;
143 ips_command_t *commandarray;
144 ips_command_t *staticcmd;
145 SLIST_HEAD(command_list, ips_command) free_cmd_list;
146 int (* ips_adapter_reinit)(struct ips_softc *sc,
147 int force);
148 void (* ips_adapter_intr)(void *sc);
149 void (* ips_issue_cmd)(ips_command_t *command);
150 void (* ips_poll_cmd)(ips_command_t *command);
151 ips_copper_queue_t * copper_queue;
152 struct mtx queue_mtx;
153 struct bio_queue_head queue;
154 struct sema cmd_sema;
155
156}ips_softc_t;
157
158/* function defines from ips_ioctl.c */
159extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr,
160 int32_t flags);
161/* function defines from ips_disk.c */
162extern void ipsd_finish(struct bio *iobuf);
163
164/* function defines from ips_commands.c */
165extern int ips_flush_cache(ips_softc_t *sc);
166extern void ips_start_io_request(ips_softc_t *sc);
167extern int ips_get_drive_info(ips_softc_t *sc);
168extern int ips_get_adapter_info(ips_softc_t *sc);
169extern int ips_ffdc_reset(ips_softc_t *sc);
170extern int ips_update_nvram(ips_softc_t *sc);
171extern int ips_clear_adapter(ips_softc_t *sc);
172
173/* function defines from ips.c */
174extern int ips_get_free_cmd(ips_softc_t *sc, ips_command_t **command, unsigned long flags);
175extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command);
176extern int ips_adapter_init(ips_softc_t *sc);
177extern int ips_morpheus_reinit(ips_softc_t *sc, int force);
178extern int ips_adapter_free(ips_softc_t *sc);
179extern void ips_morpheus_intr(void *sc);
180extern void ips_issue_morpheus_cmd(ips_command_t *command);
181extern void ips_morpheus_poll(ips_command_t *command);
182extern int ips_copperhead_reinit(ips_softc_t *sc, int force);
183extern void ips_copperhead_intr(void *sc);
184extern void ips_issue_copperhead_cmd(ips_command_t *command);
185extern void ips_copperhead_poll(ips_command_t *command);
186
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| 187#endif
188#endif
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