1/*- 2 * Copyright (c) 1999,2000 Jonathan Lemon 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 *
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34#include <sys/bus.h> 35#include <sys/devicestat.h> 36#include <sys/disk.h> 37 38#include <machine/bus_memio.h> 39#include <machine/bus_pio.h> 40#include <machine/bus.h> 41#include <machine/resource.h> 42#include <sys/rman.h> 43 44#include <pci/pcireg.h> 45#include <pci/pcivar.h> 46 47#include <dev/ida/idavar.h> 48#include <dev/ida/idareg.h> 49 50#define IDA_PCI_MAX_DMA_ADDR 0xFFFFFFFF 51#define IDA_PCI_MAX_DMA_COUNT 0xFFFFFFFF 52 53#define IDA_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */ 54 55#define IDA_DEVICEID_SMART 0xAE100E11 56#define IDA_DEVICEID_DEC_SMART 0x00461011 57 58static int 59ida_v3_fifo_full(struct ida_softc *ida) 60{ 61 return (ida_inl(ida, R_CMD_FIFO) == 0); 62} 63 64static void 65ida_v3_submit(struct ida_softc *ida, struct ida_qcb *qcb) 66{ 67 ida_outl(ida, R_CMD_FIFO, qcb->hwqcb_busaddr); 68} 69 70static bus_addr_t 71ida_v3_done(struct ida_softc *ida) 72{ 73 return (ida_inl(ida, R_DONE_FIFO)); 74} 75 76static int 77ida_v3_int_pending(struct ida_softc *ida) 78{ 79 return (ida_inl(ida, R_INT_PENDING)); 80} 81 82static void 83ida_v3_int_enable(struct ida_softc *ida, int enable) 84{ 85 ida_outl(ida, R_INT_MASK, enable ? INT_ENABLE : INT_DISABLE); 86} 87 88static int 89ida_v4_fifo_full(struct ida_softc *ida) 90{ 91 return (ida_inl(ida, R_42XX_REQUEST) != 0); 92} 93 94static void 95ida_v4_submit(struct ida_softc *ida, struct ida_qcb *qcb) 96{ 97 ida_outl(ida, R_42XX_REQUEST, qcb->hwqcb_busaddr); 98} 99 100static bus_addr_t 101ida_v4_done(struct ida_softc *ida) 102{ 103 bus_addr_t completed; 104 105 completed = ida_inl(ida, R_42XX_REPLY); 106 if (completed == -1) 107 return (0); /* fifo is empty */ 108 ida_outl(ida, R_42XX_REPLY, 0); /* confirm read */ 109 return (completed); 110} 111 112static int 113ida_v4_int_pending(struct ida_softc *ida) 114{ 115 return (ida_inl(ida, R_42XX_STATUS) & STATUS_42XX_INT_PENDING); 116} 117 118static void 119ida_v4_int_enable(struct ida_softc *ida, int enable) 120{ 121 ida_outl(ida, R_42XX_INT_MASK, 122 enable ? INT_ENABLE_42XX : INT_DISABLE_42XX); 123} 124 125static struct ida_access ida_v3_access = { 126 ida_v3_fifo_full, 127 ida_v3_submit, 128 ida_v3_done, 129 ida_v3_int_pending, 130 ida_v3_int_enable, 131}; 132 133static struct ida_access ida_v4_access = { 134 ida_v4_fifo_full, 135 ida_v4_submit, 136 ida_v4_done, 137 ida_v4_int_pending, 138 ida_v4_int_enable, 139}; 140 141static struct ida_board board_id[] = { 142 { 0x4030, "Compaq SMART-2/P array controller", &ida_v3_access }, 143 { 0x4031, "Compaq SMART-2SL array controller", &ida_v3_access }, 144 { 0x4032, "Compaq Smart Array 3200 controller", &ida_v3_access }, 145 { 0x4033, "Compaq Smart Array 3100ES controller", &ida_v3_access }, 146 { 0x4034, "Compaq Smart Array 221 controller", &ida_v3_access }, 147 148 { 0x4040, "Compaq Integrated Array controller", &ida_v4_access }, 149 { 0x4050, "Compaq Smart Array 4200 controller", &ida_v4_access }, 150 { 0x4051, "Compaq Smart Array 4250ES controller", &ida_v4_access }, 151 152 { IDA_DEVICEID_DEC_SMART, 153 "DEC/Compaq Smart Array 4200 controller", &ida_v4_access }, 154 155 { 0, "", 0 }, 156}; 157 158static int ida_pci_probe(device_t dev); 159static int ida_pci_attach(device_t dev); 160 161static device_method_t ida_pci_methods[] = { 162 DEVMETHOD(device_probe, ida_pci_probe), 163 DEVMETHOD(device_attach, ida_pci_attach), 164 DEVMETHOD(device_detach, ida_detach), 165 166 DEVMETHOD(bus_print_child, bus_generic_print_child), 167 168 { 0, 0 } 169}; 170 171static driver_t ida_pci_driver = { 172 "ida", 173 ida_pci_methods, 174 sizeof(struct ida_softc) 175}; 176 177static devclass_t ida_devclass; 178 179static struct ida_board * 180ida_pci_match(u_int32_t id) 181{ 182 int i; 183 184 for (i = 0; board_id[i].board; i++) 185 if (board_id[i].board == id) 186 return (&board_id[i]); 187 return (NULL); 188} 189 190static int 191ida_pci_probe(device_t dev) 192{ 193 struct ida_board *board = NULL; 194 u_int32_t id = pci_get_devid(dev); 195 196 if (id == IDA_DEVICEID_SMART) 197 board = ida_pci_match(pci_get_subdevice(dev)); 198 if (id == IDA_DEVICEID_DEC_SMART) 199 board = ida_pci_match(id); 200 if (board != NULL) { 201 device_set_desc(dev, board->desc); 202 return (0); 203 } 204 return (ENXIO); 205} 206 207static int 208ida_pci_attach(device_t dev) 209{ 210 struct ida_board *board; 211 struct ida_softc *ida; 212 u_int command; 213 int error, rid; 214 215 command = pci_read_config(dev, PCIR_COMMAND, 1); 216 217 /* 218 * it appears that this board only does MEMIO access. 219 */ 220 if ((command & PCIM_CMD_MEMEN) == 0) { 221 device_printf(dev, "Only memory mapped I/O is supported\n"); 222 return (ENXIO); 223 } 224 225 ida = (struct ida_softc *)device_get_softc(dev); 226 ida->dev = dev; 227 228 board = ida_pci_match(pci_get_subdevice(dev)); 229 if (board == NULL) 230 board = ida_pci_match(pci_get_devid(dev)); 231 ida->cmd = *board->accessor; 232 233 ida->regs_res_type = SYS_RES_MEMORY; 234 ida->regs_res_id = IDA_PCI_MEMADDR; 235 ida->regs = bus_alloc_resource(dev, ida->regs_res_type, 236 &ida->regs_res_id, 0, ~0, 1, RF_ACTIVE); 237 if (ida->regs == NULL) { 238 device_printf(dev, "can't allocate register resources\n"); 239 return (ENOMEM); 240 } 241 242 error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/1, 243 /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 244 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 245 /*maxsize*/MAXBSIZE, /*nsegments*/IDA_NSEG, 246 /*maxsegsize*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/BUS_DMA_ALLOCNOW, 247 &ida->parent_dmat); 248 if (error != 0) { 249 device_printf(dev, "can't allocate DMA tag\n"); 250 ida_free(ida); 251 return (ENOMEM); 252 } 253 254 rid = 0; 255 ida->irq_res_type = SYS_RES_IRQ; 256 ida->irq = bus_alloc_resource(dev, ida->irq_res_type, &rid, 257 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 258 if (ida->irq == NULL) { 259 ida_free(ida); 260 return (ENOMEM); 261 } 262 error = bus_setup_intr(dev, ida->irq, INTR_TYPE_BIO, 263 ida_intr, ida, &ida->ih); 264 if (error) { 265 device_printf(dev, "can't setup interrupt\n"); 266 ida_free(ida); 267 return (ENOMEM); 268 } 269 270 error = ida_init(ida); 271 if (error) { 272 ida_free(ida); 273 return (error); 274 } 275 ida_attach(ida); 276 ida->flags = IDA_ATTACHED; 277 278 return (0); 279} 280 281DRIVER_MODULE(ida, pci, ida_pci_driver, ida_devclass, 0, 0);
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