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ichsmb.c (66703) ichsmb.c (69689)
1
2/*
3 * ichsmb.c
4 *
5 * Copyright (c) 2000 Whistle Communications, Inc.
6 * All rights reserved.
7 *
8 * Subject to the following obligations and disclaimer of warranty, use and

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31 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
35 * OF SUCH DAMAGE.
36 *
37 * Author: Archie Cobbs <archie@freebsd.org>
38 *
1
2/*
3 * ichsmb.c
4 *
5 * Copyright (c) 2000 Whistle Communications, Inc.
6 * All rights reserved.
7 *
8 * Subject to the following obligations and disclaimer of warranty, use and

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31 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
35 * OF SUCH DAMAGE.
36 *
37 * Author: Archie Cobbs <archie@freebsd.org>
38 *
39 * $FreeBSD: head/sys/dev/ichsmb/ichsmb.c 66703 2000-10-06 00:09:46Z archie $
39 * $FreeBSD: head/sys/dev/ichsmb/ichsmb.c 69689 2000-12-07 02:09:39Z archie $
40 */
41
42/*
43 * Support for the SMBus controller logical device which is part of the
44 * Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips.
40 */
41
42/*
43 * Support for the SMBus controller logical device which is part of the
44 * Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips.
45 *
46 * This driver assumes that the generic SMBus code will ensure that
47 * at most one process at a time calls into the SMBus methods below.
45 */
46
47#include <sys/param.h>
48#include <sys/systm.h>
49#include <sys/kernel.h>
50#include <sys/errno.h>
48 */
49
50#include <sys/param.h>
51#include <sys/systm.h>
52#include <sys/kernel.h>
53#include <sys/errno.h>
54#include <sys/mutex.h>
51#include <sys/syslog.h>
52#include <sys/bus.h>
53
54#include <machine/bus.h>
55#include <sys/rman.h>
56#include <machine/resource.h>
57
58#include <dev/smbus/smbconf.h>

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115
116 /* Clear interrupt conditions */
117 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, 0xff);
118
119 /* Add "smbus" child */
120 if ((error = bus_generic_attach(dev)) != 0) {
121 log(LOG_ERR, "%s: failed to attach child: %d\n",
122 device_get_nameunit(dev), error);
55#include <sys/syslog.h>
56#include <sys/bus.h>
57
58#include <machine/bus.h>
59#include <sys/rman.h>
60#include <machine/resource.h>
61
62#include <dev/smbus/smbconf.h>

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119
120 /* Clear interrupt conditions */
121 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, 0xff);
122
123 /* Add "smbus" child */
124 if ((error = bus_generic_attach(dev)) != 0) {
125 log(LOG_ERR, "%s: failed to attach child: %d\n",
126 device_get_nameunit(dev), error);
123 error = ENXIO;
127 return (ENXIO);
124 }
125
128 }
129
126 /* Done */
127 return (error);
130 /* Create mutex */
131 mtx_init(&sc->mutex, device_get_nameunit(dev), 0);
132 return (0);
128}
129
130/********************************************************************
131 SMBUS METHODS
132********************************************************************/
133
134int
135ichsmb_callback(device_t dev, int index, caddr_t data)

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150 return (smb_error);
151}
152
153int
154ichsmb_quick(device_t dev, u_char slave, int how)
155{
156 const sc_p sc = device_get_softc(dev);
157 int smb_error;
133}
134
135/********************************************************************
136 SMBUS METHODS
137********************************************************************/
138
139int
140ichsmb_callback(device_t dev, int index, caddr_t data)

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155 return (smb_error);
156}
157
158int
159ichsmb_quick(device_t dev, u_char slave, int how)
160{
161 const sc_p sc = device_get_softc(dev);
162 int smb_error;
158 int s;
159
160 DBG("slave=0x%02x how=%d\n", slave, how);
161 KASSERT(sc->ich_cmd == -1,
162 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
163 switch (how) {
164 case SMB_QREAD:
165 case SMB_QWRITE:
163
164 DBG("slave=0x%02x how=%d\n", slave, how);
165 KASSERT(sc->ich_cmd == -1,
166 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
167 switch (how) {
168 case SMB_QREAD:
169 case SMB_QWRITE:
166 s = splhigh();
170 mtx_enter(&sc->mutex, MTX_DEF | MTX_NORECURSE);
167 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_QUICK;
168 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
169 (slave << 1) | (how == SMB_QREAD ?
170 ICH_XMIT_SLVA_READ : ICH_XMIT_SLVA_WRITE));
171 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
172 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
173 smb_error = ichsmb_wait(sc);
171 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_QUICK;
172 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
173 (slave << 1) | (how == SMB_QREAD ?
174 ICH_XMIT_SLVA_READ : ICH_XMIT_SLVA_WRITE));
175 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
176 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
177 smb_error = ichsmb_wait(sc);
174 splx(s);
178 mtx_exit(&sc->mutex, MTX_DEF | MTX_NORECURSE);
175 break;
176 default:
177 smb_error = SMB_ENOTSUPP;
178 }
179 DBG("smb_error=%d\n", smb_error);
180 return (smb_error);
181}
182
183int
184ichsmb_sendb(device_t dev, u_char slave, char byte)
185{
186 const sc_p sc = device_get_softc(dev);
187 int smb_error;
179 break;
180 default:
181 smb_error = SMB_ENOTSUPP;
182 }
183 DBG("smb_error=%d\n", smb_error);
184 return (smb_error);
185}
186
187int
188ichsmb_sendb(device_t dev, u_char slave, char byte)
189{
190 const sc_p sc = device_get_softc(dev);
191 int smb_error;
188 int s;
189
190 DBG("slave=0x%02x byte=0x%02x\n", slave, (u_char)byte);
191 KASSERT(sc->ich_cmd == -1,
192 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
192
193 DBG("slave=0x%02x byte=0x%02x\n", slave, (u_char)byte);
194 KASSERT(sc->ich_cmd == -1,
195 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
193 s = splhigh();
196 mtx_enter(&sc->mutex, MTX_DEF | MTX_NORECURSE);
194 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
195 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
196 (slave << 1) | ICH_XMIT_SLVA_WRITE);
197 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, byte);
198 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
199 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
200 smb_error = ichsmb_wait(sc);
197 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
198 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
199 (slave << 1) | ICH_XMIT_SLVA_WRITE);
200 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, byte);
201 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
202 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
203 smb_error = ichsmb_wait(sc);
201 splx(s);
204 mtx_exit(&sc->mutex, MTX_DEF | MTX_NORECURSE);
202 DBG("smb_error=%d\n", smb_error);
203 return (smb_error);
204}
205
206int
207ichsmb_recvb(device_t dev, u_char slave, char *byte)
208{
209 const sc_p sc = device_get_softc(dev);
210 int smb_error;
205 DBG("smb_error=%d\n", smb_error);
206 return (smb_error);
207}
208
209int
210ichsmb_recvb(device_t dev, u_char slave, char *byte)
211{
212 const sc_p sc = device_get_softc(dev);
213 int smb_error;
211 int s;
212
213 DBG("slave=0x%02x\n", slave);
214 KASSERT(sc->ich_cmd == -1,
215 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
214
215 DBG("slave=0x%02x\n", slave);
216 KASSERT(sc->ich_cmd == -1,
217 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
216 s = splhigh();
218 mtx_enter(&sc->mutex, MTX_DEF | MTX_NORECURSE);
217 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
218 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
219 (slave << 1) | ICH_XMIT_SLVA_READ);
220 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
221 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
222 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
223 *byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
219 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
220 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
221 (slave << 1) | ICH_XMIT_SLVA_READ);
222 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
223 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
224 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
225 *byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
224 splx(s);
226 mtx_exit(&sc->mutex, MTX_DEF | MTX_NORECURSE);
225 DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
226 return (smb_error);
227}
228
229int
230ichsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
231{
232 const sc_p sc = device_get_softc(dev);
233 int smb_error;
227 DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
228 return (smb_error);
229}
230
231int
232ichsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
233{
234 const sc_p sc = device_get_softc(dev);
235 int smb_error;
234 int s;
235
236 DBG("slave=0x%02x cmd=0x%02x byte=0x%02x\n",
237 slave, (u_char)cmd, (u_char)byte);
238 KASSERT(sc->ich_cmd == -1,
239 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
236
237 DBG("slave=0x%02x cmd=0x%02x byte=0x%02x\n",
238 slave, (u_char)cmd, (u_char)byte);
239 KASSERT(sc->ich_cmd == -1,
240 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
240 s = splhigh();
241 mtx_enter(&sc->mutex, MTX_DEF | MTX_NORECURSE);
241 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
242 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
243 (slave << 1) | ICH_XMIT_SLVA_WRITE);
244 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
245 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, byte);
246 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
247 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
248 smb_error = ichsmb_wait(sc);
242 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
243 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
244 (slave << 1) | ICH_XMIT_SLVA_WRITE);
245 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
246 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, byte);
247 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
248 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
249 smb_error = ichsmb_wait(sc);
249 splx(s);
250 mtx_exit(&sc->mutex, MTX_DEF | MTX_NORECURSE);
250 DBG("smb_error=%d\n", smb_error);
251 return (smb_error);
252}
253
254int
255ichsmb_writew(device_t dev, u_char slave, char cmd, short word)
256{
257 const sc_p sc = device_get_softc(dev);
258 int smb_error;
251 DBG("smb_error=%d\n", smb_error);
252 return (smb_error);
253}
254
255int
256ichsmb_writew(device_t dev, u_char slave, char cmd, short word)
257{
258 const sc_p sc = device_get_softc(dev);
259 int smb_error;
259 int s;
260
261 DBG("slave=0x%02x cmd=0x%02x word=0x%04x\n",
262 slave, (u_char)cmd, (u_int16_t)word);
263 KASSERT(sc->ich_cmd == -1,
264 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
260
261 DBG("slave=0x%02x cmd=0x%02x word=0x%04x\n",
262 slave, (u_char)cmd, (u_int16_t)word);
263 KASSERT(sc->ich_cmd == -1,
264 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
265 s = splhigh();
265 mtx_enter(&sc->mutex, MTX_DEF | MTX_NORECURSE);
266 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
267 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
268 (slave << 1) | ICH_XMIT_SLVA_WRITE);
269 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
270 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, word & 0xff);
271 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, word >> 8);
272 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
273 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
274 smb_error = ichsmb_wait(sc);
266 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
267 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
268 (slave << 1) | ICH_XMIT_SLVA_WRITE);
269 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
270 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, word & 0xff);
271 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, word >> 8);
272 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
273 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
274 smb_error = ichsmb_wait(sc);
275 splx(s);
275 mtx_exit(&sc->mutex, MTX_DEF | MTX_NORECURSE);
276 DBG("smb_error=%d\n", smb_error);
277 return (smb_error);
278}
279
280int
281ichsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
282{
283 const sc_p sc = device_get_softc(dev);
284 int smb_error;
276 DBG("smb_error=%d\n", smb_error);
277 return (smb_error);
278}
279
280int
281ichsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
282{
283 const sc_p sc = device_get_softc(dev);
284 int smb_error;
285 int s;
286
287 DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
288 KASSERT(sc->ich_cmd == -1,
289 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
285
286 DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
287 KASSERT(sc->ich_cmd == -1,
288 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
290 s = splhigh();
289 mtx_enter(&sc->mutex, MTX_DEF | MTX_NORECURSE);
291 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
292 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
293 (slave << 1) | ICH_XMIT_SLVA_READ);
294 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
295 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
296 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
297 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
298 *byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
290 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
291 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
292 (slave << 1) | ICH_XMIT_SLVA_READ);
293 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
294 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
295 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
296 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
297 *byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
299 splx(s);
298 mtx_exit(&sc->mutex, MTX_DEF | MTX_NORECURSE);
300 DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
301 return (smb_error);
302}
303
304int
305ichsmb_readw(device_t dev, u_char slave, char cmd, short *word)
306{
307 const sc_p sc = device_get_softc(dev);
308 int smb_error;
299 DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
300 return (smb_error);
301}
302
303int
304ichsmb_readw(device_t dev, u_char slave, char cmd, short *word)
305{
306 const sc_p sc = device_get_softc(dev);
307 int smb_error;
309 int s;
310
311 DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
312 KASSERT(sc->ich_cmd == -1,
313 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
308
309 DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
310 KASSERT(sc->ich_cmd == -1,
311 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
314 s = splhigh();
312 mtx_enter(&sc->mutex, MTX_DEF | MTX_NORECURSE);
315 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
316 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
317 (slave << 1) | ICH_XMIT_SLVA_READ);
318 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
319 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
320 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
321 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
322 *word = (bus_space_read_1(sc->io_bst,
323 sc->io_bsh, ICH_D0) & 0xff)
324 | (bus_space_read_1(sc->io_bst,
325 sc->io_bsh, ICH_D1) << 8);
326 }
313 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
314 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
315 (slave << 1) | ICH_XMIT_SLVA_READ);
316 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
317 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
318 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
319 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
320 *word = (bus_space_read_1(sc->io_bst,
321 sc->io_bsh, ICH_D0) & 0xff)
322 | (bus_space_read_1(sc->io_bst,
323 sc->io_bsh, ICH_D1) << 8);
324 }
327 splx(s);
325 mtx_exit(&sc->mutex, MTX_DEF | MTX_NORECURSE);
328 DBG("smb_error=%d word=0x%04x\n", smb_error, (u_int16_t)*word);
329 return (smb_error);
330}
331
332int
333ichsmb_pcall(device_t dev, u_char slave, char cmd, short sdata, short *rdata)
334{
335 const sc_p sc = device_get_softc(dev);
336 int smb_error;
326 DBG("smb_error=%d word=0x%04x\n", smb_error, (u_int16_t)*word);
327 return (smb_error);
328}
329
330int
331ichsmb_pcall(device_t dev, u_char slave, char cmd, short sdata, short *rdata)
332{
333 const sc_p sc = device_get_softc(dev);
334 int smb_error;
337 int s;
338
339 DBG("slave=0x%02x cmd=0x%02x sdata=0x%04x\n",
340 slave, (u_char)cmd, (u_int16_t)sdata);
341 KASSERT(sc->ich_cmd == -1,
342 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
335
336 DBG("slave=0x%02x cmd=0x%02x sdata=0x%04x\n",
337 slave, (u_char)cmd, (u_int16_t)sdata);
338 KASSERT(sc->ich_cmd == -1,
339 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
343 s = splhigh();
340 mtx_enter(&sc->mutex, MTX_DEF | MTX_NORECURSE);
344 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_PROC_CALL;
345 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
346 (slave << 1) | ICH_XMIT_SLVA_WRITE);
347 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
348 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, sdata & 0xff);
349 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, sdata >> 8);
350 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
351 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
352 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
353 *rdata = (bus_space_read_1(sc->io_bst,
354 sc->io_bsh, ICH_D0) & 0xff)
355 | (bus_space_read_1(sc->io_bst,
356 sc->io_bsh, ICH_D1) << 8);
357 }
341 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_PROC_CALL;
342 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
343 (slave << 1) | ICH_XMIT_SLVA_WRITE);
344 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
345 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, sdata & 0xff);
346 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, sdata >> 8);
347 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
348 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
349 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
350 *rdata = (bus_space_read_1(sc->io_bst,
351 sc->io_bsh, ICH_D0) & 0xff)
352 | (bus_space_read_1(sc->io_bst,
353 sc->io_bsh, ICH_D1) << 8);
354 }
358 splx(s);
355 mtx_exit(&sc->mutex, MTX_DEF | MTX_NORECURSE);
359 DBG("smb_error=%d rdata=0x%04x\n", smb_error, (u_int16_t)*rdata);
360 return (smb_error);
361}
362
363int
364ichsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
365{
366 const sc_p sc = device_get_softc(dev);
367 int smb_error;
356 DBG("smb_error=%d rdata=0x%04x\n", smb_error, (u_int16_t)*rdata);
357 return (smb_error);
358}
359
360int
361ichsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
362{
363 const sc_p sc = device_get_softc(dev);
364 int smb_error;
368 int s;
369
370 DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
371#if ICHSMB_DEBUG
372#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
373 {
374 u_char *p;
375
376 for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {

--- 10 unchanged lines hidden (view full) ---

387 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
388 if (count < 1 || count > 32)
389 return (EINVAL);
390 bcopy(buf, sc->block_data, count);
391 sc->block_count = count;
392 sc->block_index = 1;
393 sc->block_write = 1;
394
365
366 DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
367#if ICHSMB_DEBUG
368#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
369 {
370 u_char *p;
371
372 for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {

--- 10 unchanged lines hidden (view full) ---

383 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
384 if (count < 1 || count > 32)
385 return (EINVAL);
386 bcopy(buf, sc->block_data, count);
387 sc->block_count = count;
388 sc->block_index = 1;
389 sc->block_write = 1;
390
395 s = splhigh();
391 mtx_enter(&sc->mutex, MTX_DEF | MTX_NORECURSE);
396 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
397 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
398 (slave << 1) | ICH_XMIT_SLVA_WRITE);
399 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
400 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count);
401 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_BLOCK_DB, buf[0]);
402 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
403 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
404 smb_error = ichsmb_wait(sc);
392 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
393 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
394 (slave << 1) | ICH_XMIT_SLVA_WRITE);
395 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
396 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count);
397 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_BLOCK_DB, buf[0]);
398 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
399 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
400 smb_error = ichsmb_wait(sc);
405 splx(s);
401 mtx_exit(&sc->mutex, MTX_DEF | MTX_NORECURSE);
406 DBG("smb_error=%d\n", smb_error);
407 return (smb_error);
408}
409
410int
411ichsmb_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
412{
413 const sc_p sc = device_get_softc(dev);
414 int smb_error;
402 DBG("smb_error=%d\n", smb_error);
403 return (smb_error);
404}
405
406int
407ichsmb_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
408{
409 const sc_p sc = device_get_softc(dev);
410 int smb_error;
415 int s;
416
417 DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
418 KASSERT(sc->ich_cmd == -1,
419 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
420 if (count < 1 || count > 32)
421 return (EINVAL);
422 bzero(sc->block_data, sizeof(sc->block_data));
423 sc->block_count = count;
424 sc->block_index = 0;
425 sc->block_write = 0;
426
411
412 DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
413 KASSERT(sc->ich_cmd == -1,
414 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
415 if (count < 1 || count > 32)
416 return (EINVAL);
417 bzero(sc->block_data, sizeof(sc->block_data));
418 sc->block_count = count;
419 sc->block_index = 0;
420 sc->block_write = 0;
421
427 s = splhigh();
422 mtx_enter(&sc->mutex, MTX_DEF | MTX_NORECURSE);
428 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
429 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
430 (slave << 1) | ICH_XMIT_SLVA_READ);
431 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
432 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count); /* XXX? */
433 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
434 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
435 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
436 bcopy(sc->block_data, buf, sc->block_count);
423 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
424 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
425 (slave << 1) | ICH_XMIT_SLVA_READ);
426 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
427 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count); /* XXX? */
428 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
429 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
430 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
431 bcopy(sc->block_data, buf, sc->block_count);
437 splx(s);
432 mtx_exit(&sc->mutex, MTX_DEF | MTX_NORECURSE);
438 DBG("smb_error=%d\n", smb_error);
439#if ICHSMB_DEBUG
440#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
441 {
442 u_char *p;
443
444 for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
445 DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"

--- 44 unchanged lines hidden (view full) ---

490{
491 const sc_p sc = cookie;
492 const device_t dev = sc->dev;
493 const int maxloops = 16;
494 u_int8_t status;
495 u_int8_t ok_bits;
496 int cmd_index;
497 int count;
433 DBG("smb_error=%d\n", smb_error);
434#if ICHSMB_DEBUG
435#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
436 {
437 u_char *p;
438
439 for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
440 DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"

--- 44 unchanged lines hidden (view full) ---

485{
486 const sc_p sc = cookie;
487 const device_t dev = sc->dev;
488 const int maxloops = 16;
489 u_int8_t status;
490 u_int8_t ok_bits;
491 int cmd_index;
492 int count;
498 int s;
499
493
500 s = splhigh();
494 mtx_enter(&sc->mutex, MTX_DEF | MTX_NORECURSE);
501 for (count = 0; count < maxloops; count++) {
502
503 /* Get and reset status bits */
504 status = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA);
505#if ICHSMB_DEBUG
506 if ((status & ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY))
507 || count > 0) {
508 DBG("%d stat=0x%02x\n", count, status);

--- 95 unchanged lines hidden (view full) ---

604 ICH_HST_STA, status);
605 wakeup(sc);
606 break;
607 }
608
609 /* Clear status bits and try again */
610 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, status);
611 }
495 for (count = 0; count < maxloops; count++) {
496
497 /* Get and reset status bits */
498 status = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA);
499#if ICHSMB_DEBUG
500 if ((status & ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY))
501 || count > 0) {
502 DBG("%d stat=0x%02x\n", count, status);

--- 95 unchanged lines hidden (view full) ---

598 ICH_HST_STA, status);
599 wakeup(sc);
600 break;
601 }
602
603 /* Clear status bits and try again */
604 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, status);
605 }
612 splx(s);
606 mtx_exit(&sc->mutex, MTX_DEF | MTX_NORECURSE);
613
614 /* Too many loops? */
615 if (count == maxloops) {
616 log(LOG_ERR, "%s: interrupt loop, status=0x%02x\n",
617 device_get_nameunit(dev),
618 bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
619 }
620}
621
622/*
607
608 /* Too many loops? */
609 if (count == maxloops) {
610 log(LOG_ERR, "%s: interrupt loop, status=0x%02x\n",
611 device_get_nameunit(dev),
612 bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
613 }
614}
615
616/*
623 * Wait for command completion. Assumes splhigh().
617 * Wait for command completion. Assumes mutex is held.
624 * Returns an SMB_* error code.
625 */
626static int
627ichsmb_wait(sc_p sc)
628{
629 const device_t dev = sc->dev;
630 int error, smb_error;
631
632 KASSERT(sc->ich_cmd != -1,
633 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
618 * Returns an SMB_* error code.
619 */
620static int
621ichsmb_wait(sc_p sc)
622{
623 const device_t dev = sc->dev;
624 int error, smb_error;
625
626 KASSERT(sc->ich_cmd != -1,
627 ("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
628 mtx_assert(&sc->mutex, MA_OWNED);
634sleep:
629sleep:
635 error = tsleep(sc, PZERO | PCATCH, "ichsmb", hz / 4);
636 DBG("tsleep -> %d\n", error);
630 error = msleep(sc, &sc->mutex, PZERO | PCATCH, "ichsmb", hz / 4);
631 DBG("msleep -> %d\n", error);
637 switch (error) {
638 case ERESTART:
639 if (sc->ich_cmd != -1)
640 goto sleep;
641 /* FALLTHROUGH */
642 case 0:
643 smb_error = sc->smb_error;
644 break;

--- 38 unchanged lines hidden --- 		632 switch (error) {
633 case ERESTART:
634 if (sc->ich_cmd != -1)
635 goto sleep;
636 /* FALLTHROUGH */
637 case 0:
638 smb_error = sc->smb_error;
639 break;

--- 38 unchanged lines hidden ---