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ichsmb.c (162234) ichsmb.c (165951)
1/*-
2 * ichsmb.c
3 *
4 * Author: Archie Cobbs <archie@freebsd.org>
5 * Copyright (c) 2000 Whistle Communications, Inc.
6 * All rights reserved.
7 *
8 * Subject to the following obligations and disclaimer of warranty, use and
9 * redistribution of this software, in source or object code forms, with or
10 * without modifications are expressly permitted by Whistle Communications;
11 * provided, however, that:
12 * 1. Any and all reproductions of the source or object code must include the
13 * copyright notice above and the following disclaimer of warranties; and
14 * 2. No rights are granted, in any manner or form, to use Whistle
15 * Communications, Inc. trademarks, including the mark "WHISTLE
16 * COMMUNICATIONS" on advertising, endorsements, or otherwise except as
17 * such appears in the above copyright notice or in the software.
18 *
19 * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
20 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
21 * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
22 * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
24 * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
25 * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
26 * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
27 * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
28 * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
29 * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
30 * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
35 * OF SUCH DAMAGE.
36 */
37
38#include <sys/cdefs.h>
1/*-
2 * ichsmb.c
3 *
4 * Author: Archie Cobbs <archie@freebsd.org>
5 * Copyright (c) 2000 Whistle Communications, Inc.
6 * All rights reserved.
7 *
8 * Subject to the following obligations and disclaimer of warranty, use and
9 * redistribution of this software, in source or object code forms, with or
10 * without modifications are expressly permitted by Whistle Communications;
11 * provided, however, that:
12 * 1. Any and all reproductions of the source or object code must include the
13 * copyright notice above and the following disclaimer of warranties; and
14 * 2. No rights are granted, in any manner or form, to use Whistle
15 * Communications, Inc. trademarks, including the mark "WHISTLE
16 * COMMUNICATIONS" on advertising, endorsements, or otherwise except as
17 * such appears in the above copyright notice or in the software.
18 *
19 * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
20 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
21 * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
22 * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
24 * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
25 * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
26 * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
27 * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
28 * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
29 * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
30 * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
35 * OF SUCH DAMAGE.
36 */
37
38#include <sys/cdefs.h>
39__FBSDID("$FreeBSD: head/sys/dev/ichsmb/ichsmb.c 162234 2006-09-11 20:52:41Z jhb $");
39__FBSDID("$FreeBSD: head/sys/dev/ichsmb/ichsmb.c 165951 2007-01-11 19:56:24Z jhb $");
40
41/*
42 * Support for the SMBus controller logical device which is part of the
43 * Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips.
44 *
45 * This driver assumes that the generic SMBus code will ensure that
46 * at most one process at a time calls into the SMBus methods below.
47 */
48
49#include <sys/param.h>
50#include <sys/systm.h>
51#include <sys/kernel.h>
52#include <sys/errno.h>
53#include <sys/lock.h>
54#include <sys/module.h>
55#include <sys/mutex.h>
56#include <sys/syslog.h>
57#include <sys/bus.h>
58
59#include <machine/bus.h>
60#include <sys/rman.h>
61#include <machine/resource.h>
62
63#include <dev/smbus/smbconf.h>
64
65#include <dev/ichsmb/ichsmb_var.h>
66#include <dev/ichsmb/ichsmb_reg.h>
67
68/*
69 * Enable debugging by defining ICHSMB_DEBUG to a non-zero value.
70 */
71#define ICHSMB_DEBUG 0
72#if ICHSMB_DEBUG != 0 && defined(__CC_SUPPORTS___FUNC__)
73#define DBG(fmt, args...) \
40
41/*
42 * Support for the SMBus controller logical device which is part of the
43 * Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips.
44 *
45 * This driver assumes that the generic SMBus code will ensure that
46 * at most one process at a time calls into the SMBus methods below.
47 */
48
49#include <sys/param.h>
50#include <sys/systm.h>
51#include <sys/kernel.h>
52#include <sys/errno.h>
53#include <sys/lock.h>
54#include <sys/module.h>
55#include <sys/mutex.h>
56#include <sys/syslog.h>
57#include <sys/bus.h>
58
59#include <machine/bus.h>
60#include <sys/rman.h>
61#include <machine/resource.h>
62
63#include <dev/smbus/smbconf.h>
64
65#include <dev/ichsmb/ichsmb_var.h>
66#include <dev/ichsmb/ichsmb_reg.h>
67
68/*
69 * Enable debugging by defining ICHSMB_DEBUG to a non-zero value.
70 */
71#define ICHSMB_DEBUG 0
72#if ICHSMB_DEBUG != 0 && defined(__CC_SUPPORTS___FUNC__)
73#define DBG(fmt, args...) \
74 do { log(LOG_DEBUG, "%s: " fmt, __func__ , ## args); } while (0)
74 do { printf("%s: " fmt, __func__ , ## args); } while (0)
75#else
76#define DBG(fmt, args...) do { } while (0)
77#endif
78
79/*
80 * Our child device driver name
81 */
82#define DRIVER_SMBUS "smbus"
83
84/*
85 * Internal functions
86 */
87static int ichsmb_wait(sc_p sc);
88
89/********************************************************************
90 BUS-INDEPENDENT BUS METHODS
91********************************************************************/
92
93/*
94 * Handle probe-time duties that are independent of the bus
95 * our device lives on.
96 */
97int
98ichsmb_probe(device_t dev)
99{
100 return (BUS_PROBE_DEFAULT);
101}
102
103/*
104 * Handle attach-time duties that are independent of the bus
105 * our device lives on.
106 */
107int
108ichsmb_attach(device_t dev)
109{
110 const sc_p sc = device_get_softc(dev);
111 int error;
112
75#else
76#define DBG(fmt, args...) do { } while (0)
77#endif
78
79/*
80 * Our child device driver name
81 */
82#define DRIVER_SMBUS "smbus"
83
84/*
85 * Internal functions
86 */
87static int ichsmb_wait(sc_p sc);
88
89/********************************************************************
90 BUS-INDEPENDENT BUS METHODS
91********************************************************************/
92
93/*
94 * Handle probe-time duties that are independent of the bus
95 * our device lives on.
96 */
97int
98ichsmb_probe(device_t dev)
99{
100 return (BUS_PROBE_DEFAULT);
101}
102
103/*
104 * Handle attach-time duties that are independent of the bus
105 * our device lives on.
106 */
107int
108ichsmb_attach(device_t dev)
109{
110 const sc_p sc = device_get_softc(dev);
111 int error;
112
113 /* Create mutex */
114 mtx_init(&sc->mutex, device_get_nameunit(dev), "ichsmb", MTX_DEF);
115
113 /* Add child: an instance of the "smbus" device */
114 if ((sc->smb = device_add_child(dev, DRIVER_SMBUS, -1)) == NULL) {
116 /* Add child: an instance of the "smbus" device */
117 if ((sc->smb = device_add_child(dev, DRIVER_SMBUS, -1)) == NULL) {
115 log(LOG_ERR, "%s: no \"%s\" child found\n",
116 device_get_nameunit(dev), DRIVER_SMBUS);
117 return (ENXIO);
118 device_printf(dev, "no \"%s\" child found\n", DRIVER_SMBUS);
119 error = ENXIO;
120 goto fail;
118 }
119
120 /* Clear interrupt conditions */
121 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, 0xff);
122
121 }
122
123 /* Clear interrupt conditions */
124 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, 0xff);
125
123 /* Add "smbus" child */
126 /* Set up interrupt handler */
127 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
128 ichsmb_device_intr, sc, &sc->irq_handle);
129 if (error != 0) {
130 device_printf(dev, "can't setup irq\n");
131 goto fail;
132 }
133
134 /* Attach "smbus" child */
124 if ((error = bus_generic_attach(dev)) != 0) {
135 if ((error = bus_generic_attach(dev)) != 0) {
125 log(LOG_ERR, "%s: failed to attach child: %d\n",
126 device_get_nameunit(dev), error);
127 return (ENXIO);
136 device_printf(dev, "failed to attach child: %d\n", error);
137 goto fail;
128 }
129
138 }
139
130 /* Create mutex */
131 mtx_init(&sc->mutex, device_get_nameunit(dev), "ichsmb", MTX_DEF);
132 return (0);
140 return (0);
141
142fail:
143 mtx_destroy(&sc->mutex);
144 return (error);
133}
134
135/********************************************************************
136 SMBUS METHODS
137********************************************************************/
138
139int
140ichsmb_callback(device_t dev, int index, void *data)
141{
142 int smb_error = 0;
143
144 DBG("index=%d how=%d\n", index, data ? *(int *)data : -1);
145 switch (index) {
146 case SMB_REQUEST_BUS:
147 break;
148 case SMB_RELEASE_BUS:
149 break;
150 default:
151 smb_error = SMB_EABORT; /* XXX */
152 break;
153 }
154 DBG("smb_error=%d\n", smb_error);
155 return (smb_error);
156}
157
158int
159ichsmb_quick(device_t dev, u_char slave, int how)
160{
161 const sc_p sc = device_get_softc(dev);
162 int smb_error;
163
164 DBG("slave=0x%02x how=%d\n", slave, how);
165 KASSERT(sc->ich_cmd == -1,
166 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
167 switch (how) {
168 case SMB_QREAD:
169 case SMB_QWRITE:
170 mtx_lock(&sc->mutex);
171 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_QUICK;
172 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
173 (slave << 1) | (how == SMB_QREAD ?
174 ICH_XMIT_SLVA_READ : ICH_XMIT_SLVA_WRITE));
175 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
176 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
177 smb_error = ichsmb_wait(sc);
178 mtx_unlock(&sc->mutex);
179 break;
180 default:
181 smb_error = SMB_ENOTSUPP;
182 }
183 DBG("smb_error=%d\n", smb_error);
184 return (smb_error);
185}
186
187int
188ichsmb_sendb(device_t dev, u_char slave, char byte)
189{
190 const sc_p sc = device_get_softc(dev);
191 int smb_error;
192
193 DBG("slave=0x%02x byte=0x%02x\n", slave, (u_char)byte);
194 KASSERT(sc->ich_cmd == -1,
195 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
196 mtx_lock(&sc->mutex);
197 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
198 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
199 (slave << 1) | ICH_XMIT_SLVA_WRITE);
200 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, byte);
201 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
202 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
203 smb_error = ichsmb_wait(sc);
204 mtx_unlock(&sc->mutex);
205 DBG("smb_error=%d\n", smb_error);
206 return (smb_error);
207}
208
209int
210ichsmb_recvb(device_t dev, u_char slave, char *byte)
211{
212 const sc_p sc = device_get_softc(dev);
213 int smb_error;
214
215 DBG("slave=0x%02x\n", slave);
216 KASSERT(sc->ich_cmd == -1,
217 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
218 mtx_lock(&sc->mutex);
219 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
220 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
221 (slave << 1) | ICH_XMIT_SLVA_READ);
222 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
223 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
224 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
225 *byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
226 mtx_unlock(&sc->mutex);
227 DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
228 return (smb_error);
229}
230
231int
232ichsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
233{
234 const sc_p sc = device_get_softc(dev);
235 int smb_error;
236
237 DBG("slave=0x%02x cmd=0x%02x byte=0x%02x\n",
238 slave, (u_char)cmd, (u_char)byte);
239 KASSERT(sc->ich_cmd == -1,
240 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
241 mtx_lock(&sc->mutex);
242 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
243 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
244 (slave << 1) | ICH_XMIT_SLVA_WRITE);
245 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
246 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, byte);
247 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
248 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
249 smb_error = ichsmb_wait(sc);
250 mtx_unlock(&sc->mutex);
251 DBG("smb_error=%d\n", smb_error);
252 return (smb_error);
253}
254
255int
256ichsmb_writew(device_t dev, u_char slave, char cmd, short word)
257{
258 const sc_p sc = device_get_softc(dev);
259 int smb_error;
260
261 DBG("slave=0x%02x cmd=0x%02x word=0x%04x\n",
262 slave, (u_char)cmd, (u_int16_t)word);
263 KASSERT(sc->ich_cmd == -1,
264 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
265 mtx_lock(&sc->mutex);
266 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
267 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
268 (slave << 1) | ICH_XMIT_SLVA_WRITE);
269 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
270 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, word & 0xff);
271 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, word >> 8);
272 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
273 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
274 smb_error = ichsmb_wait(sc);
275 mtx_unlock(&sc->mutex);
276 DBG("smb_error=%d\n", smb_error);
277 return (smb_error);
278}
279
280int
281ichsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
282{
283 const sc_p sc = device_get_softc(dev);
284 int smb_error;
285
286 DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
287 KASSERT(sc->ich_cmd == -1,
288 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
289 mtx_lock(&sc->mutex);
290 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
291 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
292 (slave << 1) | ICH_XMIT_SLVA_READ);
293 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
294 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
295 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
296 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
297 *byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
298 mtx_unlock(&sc->mutex);
299 DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
300 return (smb_error);
301}
302
303int
304ichsmb_readw(device_t dev, u_char slave, char cmd, short *word)
305{
306 const sc_p sc = device_get_softc(dev);
307 int smb_error;
308
309 DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
310 KASSERT(sc->ich_cmd == -1,
311 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
312 mtx_lock(&sc->mutex);
313 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
314 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
315 (slave << 1) | ICH_XMIT_SLVA_READ);
316 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
317 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
318 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
319 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
320 *word = (bus_space_read_1(sc->io_bst,
321 sc->io_bsh, ICH_D0) & 0xff)
322 | (bus_space_read_1(sc->io_bst,
323 sc->io_bsh, ICH_D1) << 8);
324 }
325 mtx_unlock(&sc->mutex);
326 DBG("smb_error=%d word=0x%04x\n", smb_error, (u_int16_t)*word);
327 return (smb_error);
328}
329
330int
331ichsmb_pcall(device_t dev, u_char slave, char cmd, short sdata, short *rdata)
332{
333 const sc_p sc = device_get_softc(dev);
334 int smb_error;
335
336 DBG("slave=0x%02x cmd=0x%02x sdata=0x%04x\n",
337 slave, (u_char)cmd, (u_int16_t)sdata);
338 KASSERT(sc->ich_cmd == -1,
339 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
340 mtx_lock(&sc->mutex);
341 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_PROC_CALL;
342 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
343 (slave << 1) | ICH_XMIT_SLVA_WRITE);
344 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
345 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, sdata & 0xff);
346 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, sdata >> 8);
347 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
348 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
349 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
350 *rdata = (bus_space_read_1(sc->io_bst,
351 sc->io_bsh, ICH_D0) & 0xff)
352 | (bus_space_read_1(sc->io_bst,
353 sc->io_bsh, ICH_D1) << 8);
354 }
355 mtx_unlock(&sc->mutex);
356 DBG("smb_error=%d rdata=0x%04x\n", smb_error, (u_int16_t)*rdata);
357 return (smb_error);
358}
359
360int
361ichsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
362{
363 const sc_p sc = device_get_softc(dev);
364 int smb_error;
365
366 DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
367#if ICHSMB_DEBUG
368#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
369 {
370 u_char *p;
371
372 for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
373 DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
374 " %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
375 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
376 DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
377 DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
378 }
379 }
380#undef DISP
381#endif
382 KASSERT(sc->ich_cmd == -1,
383 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
384 if (count < 1 || count > 32)
385 return (SMB_EINVAL);
386 bcopy(buf, sc->block_data, count);
387 sc->block_count = count;
388 sc->block_index = 1;
389 sc->block_write = 1;
390
391 mtx_lock(&sc->mutex);
392 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
393 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
394 (slave << 1) | ICH_XMIT_SLVA_WRITE);
395 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
396 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count);
397 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_BLOCK_DB, buf[0]);
398 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
399 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
400 smb_error = ichsmb_wait(sc);
401 mtx_unlock(&sc->mutex);
402 DBG("smb_error=%d\n", smb_error);
403 return (smb_error);
404}
405
406int
407ichsmb_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
408{
409 const sc_p sc = device_get_softc(dev);
410 int smb_error;
411
412 DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
413 KASSERT(sc->ich_cmd == -1,
414 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
415 if (*count < 1 || *count > 32)
416 return (SMB_EINVAL);
417 bzero(sc->block_data, sizeof(sc->block_data));
418 sc->block_count = 0;
419 sc->block_index = 0;
420 sc->block_write = 0;
421
422 mtx_lock(&sc->mutex);
423 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
424 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
425 (slave << 1) | ICH_XMIT_SLVA_READ);
426 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
427 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, *count); /* XXX? */
428 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
429 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
430 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
431 bcopy(sc->block_data, buf, min(sc->block_count, *count));
432 *count = sc->block_count;
433 }
434 mtx_unlock(&sc->mutex);
435 DBG("smb_error=%d\n", smb_error);
436#if ICHSMB_DEBUG
437#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
438 {
439 u_char *p;
440
441 for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
442 DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
443 " %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
444 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
445 DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
446 DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
447 }
448 }
449#undef DISP
450#endif
451 return (smb_error);
452}
453
454/********************************************************************
455 OTHER FUNCTIONS
456********************************************************************/
457
458/*
459 * This table describes what interrupts we should ever expect to
460 * see after each ICH command, not including the SMBALERT interrupt.
461 */
462static const u_int8_t ichsmb_state_irqs[] = {
463 /* quick */
464 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
465 /* byte */
466 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
467 /* byte data */
468 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
469 /* word data */
470 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
471 /* process call */
472 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
473 /* block */
474 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
475 | ICH_HST_STA_BYTE_DONE_STS),
476 /* i2c read (not used) */
477 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
478 | ICH_HST_STA_BYTE_DONE_STS)
479};
480
481/*
482 * Interrupt handler. This handler is bus-independent. Note that our
483 * interrupt may be shared, so we must handle "false" interrupts.
484 */
485void
486ichsmb_device_intr(void *cookie)
487{
488 const sc_p sc = cookie;
489 const device_t dev = sc->dev;
490 const int maxloops = 16;
491 u_int8_t status;
492 u_int8_t ok_bits;
493 int cmd_index;
494 int count;
495
496 mtx_lock(&sc->mutex);
497 for (count = 0; count < maxloops; count++) {
498
499 /* Get and reset status bits */
500 status = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA);
501#if ICHSMB_DEBUG
502 if ((status & ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY))
503 || count > 0) {
504 DBG("%d stat=0x%02x\n", count, status);
505 }
506#endif
507 status &= ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY);
508 if (status == 0)
509 break;
510
511 /* Check for unexpected interrupt */
512 ok_bits = ICH_HST_STA_SMBALERT_STS;
513 cmd_index = sc->ich_cmd >> 2;
514 if (sc->ich_cmd != -1) {
515 KASSERT(cmd_index < sizeof(ichsmb_state_irqs),
516 ("%s: ich_cmd=%d", device_get_nameunit(dev),
517 sc->ich_cmd));
518 ok_bits |= ichsmb_state_irqs[cmd_index];
519 }
520 if ((status & ~ok_bits) != 0) {
145}
146
147/********************************************************************
148 SMBUS METHODS
149********************************************************************/
150
151int
152ichsmb_callback(device_t dev, int index, void *data)
153{
154 int smb_error = 0;
155
156 DBG("index=%d how=%d\n", index, data ? *(int *)data : -1);
157 switch (index) {
158 case SMB_REQUEST_BUS:
159 break;
160 case SMB_RELEASE_BUS:
161 break;
162 default:
163 smb_error = SMB_EABORT; /* XXX */
164 break;
165 }
166 DBG("smb_error=%d\n", smb_error);
167 return (smb_error);
168}
169
170int
171ichsmb_quick(device_t dev, u_char slave, int how)
172{
173 const sc_p sc = device_get_softc(dev);
174 int smb_error;
175
176 DBG("slave=0x%02x how=%d\n", slave, how);
177 KASSERT(sc->ich_cmd == -1,
178 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
179 switch (how) {
180 case SMB_QREAD:
181 case SMB_QWRITE:
182 mtx_lock(&sc->mutex);
183 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_QUICK;
184 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
185 (slave << 1) | (how == SMB_QREAD ?
186 ICH_XMIT_SLVA_READ : ICH_XMIT_SLVA_WRITE));
187 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
188 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
189 smb_error = ichsmb_wait(sc);
190 mtx_unlock(&sc->mutex);
191 break;
192 default:
193 smb_error = SMB_ENOTSUPP;
194 }
195 DBG("smb_error=%d\n", smb_error);
196 return (smb_error);
197}
198
199int
200ichsmb_sendb(device_t dev, u_char slave, char byte)
201{
202 const sc_p sc = device_get_softc(dev);
203 int smb_error;
204
205 DBG("slave=0x%02x byte=0x%02x\n", slave, (u_char)byte);
206 KASSERT(sc->ich_cmd == -1,
207 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
208 mtx_lock(&sc->mutex);
209 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
210 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
211 (slave << 1) | ICH_XMIT_SLVA_WRITE);
212 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, byte);
213 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
214 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
215 smb_error = ichsmb_wait(sc);
216 mtx_unlock(&sc->mutex);
217 DBG("smb_error=%d\n", smb_error);
218 return (smb_error);
219}
220
221int
222ichsmb_recvb(device_t dev, u_char slave, char *byte)
223{
224 const sc_p sc = device_get_softc(dev);
225 int smb_error;
226
227 DBG("slave=0x%02x\n", slave);
228 KASSERT(sc->ich_cmd == -1,
229 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
230 mtx_lock(&sc->mutex);
231 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
232 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
233 (slave << 1) | ICH_XMIT_SLVA_READ);
234 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
235 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
236 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
237 *byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
238 mtx_unlock(&sc->mutex);
239 DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
240 return (smb_error);
241}
242
243int
244ichsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
245{
246 const sc_p sc = device_get_softc(dev);
247 int smb_error;
248
249 DBG("slave=0x%02x cmd=0x%02x byte=0x%02x\n",
250 slave, (u_char)cmd, (u_char)byte);
251 KASSERT(sc->ich_cmd == -1,
252 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
253 mtx_lock(&sc->mutex);
254 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
255 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
256 (slave << 1) | ICH_XMIT_SLVA_WRITE);
257 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
258 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, byte);
259 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
260 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
261 smb_error = ichsmb_wait(sc);
262 mtx_unlock(&sc->mutex);
263 DBG("smb_error=%d\n", smb_error);
264 return (smb_error);
265}
266
267int
268ichsmb_writew(device_t dev, u_char slave, char cmd, short word)
269{
270 const sc_p sc = device_get_softc(dev);
271 int smb_error;
272
273 DBG("slave=0x%02x cmd=0x%02x word=0x%04x\n",
274 slave, (u_char)cmd, (u_int16_t)word);
275 KASSERT(sc->ich_cmd == -1,
276 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
277 mtx_lock(&sc->mutex);
278 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
279 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
280 (slave << 1) | ICH_XMIT_SLVA_WRITE);
281 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
282 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, word & 0xff);
283 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, word >> 8);
284 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
285 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
286 smb_error = ichsmb_wait(sc);
287 mtx_unlock(&sc->mutex);
288 DBG("smb_error=%d\n", smb_error);
289 return (smb_error);
290}
291
292int
293ichsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
294{
295 const sc_p sc = device_get_softc(dev);
296 int smb_error;
297
298 DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
299 KASSERT(sc->ich_cmd == -1,
300 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
301 mtx_lock(&sc->mutex);
302 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
303 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
304 (slave << 1) | ICH_XMIT_SLVA_READ);
305 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
306 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
307 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
308 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
309 *byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
310 mtx_unlock(&sc->mutex);
311 DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
312 return (smb_error);
313}
314
315int
316ichsmb_readw(device_t dev, u_char slave, char cmd, short *word)
317{
318 const sc_p sc = device_get_softc(dev);
319 int smb_error;
320
321 DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
322 KASSERT(sc->ich_cmd == -1,
323 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
324 mtx_lock(&sc->mutex);
325 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
326 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
327 (slave << 1) | ICH_XMIT_SLVA_READ);
328 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
329 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
330 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
331 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
332 *word = (bus_space_read_1(sc->io_bst,
333 sc->io_bsh, ICH_D0) & 0xff)
334 | (bus_space_read_1(sc->io_bst,
335 sc->io_bsh, ICH_D1) << 8);
336 }
337 mtx_unlock(&sc->mutex);
338 DBG("smb_error=%d word=0x%04x\n", smb_error, (u_int16_t)*word);
339 return (smb_error);
340}
341
342int
343ichsmb_pcall(device_t dev, u_char slave, char cmd, short sdata, short *rdata)
344{
345 const sc_p sc = device_get_softc(dev);
346 int smb_error;
347
348 DBG("slave=0x%02x cmd=0x%02x sdata=0x%04x\n",
349 slave, (u_char)cmd, (u_int16_t)sdata);
350 KASSERT(sc->ich_cmd == -1,
351 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
352 mtx_lock(&sc->mutex);
353 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_PROC_CALL;
354 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
355 (slave << 1) | ICH_XMIT_SLVA_WRITE);
356 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
357 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, sdata & 0xff);
358 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, sdata >> 8);
359 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
360 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
361 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
362 *rdata = (bus_space_read_1(sc->io_bst,
363 sc->io_bsh, ICH_D0) & 0xff)
364 | (bus_space_read_1(sc->io_bst,
365 sc->io_bsh, ICH_D1) << 8);
366 }
367 mtx_unlock(&sc->mutex);
368 DBG("smb_error=%d rdata=0x%04x\n", smb_error, (u_int16_t)*rdata);
369 return (smb_error);
370}
371
372int
373ichsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
374{
375 const sc_p sc = device_get_softc(dev);
376 int smb_error;
377
378 DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
379#if ICHSMB_DEBUG
380#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
381 {
382 u_char *p;
383
384 for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
385 DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
386 " %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
387 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
388 DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
389 DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
390 }
391 }
392#undef DISP
393#endif
394 KASSERT(sc->ich_cmd == -1,
395 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
396 if (count < 1 || count > 32)
397 return (SMB_EINVAL);
398 bcopy(buf, sc->block_data, count);
399 sc->block_count = count;
400 sc->block_index = 1;
401 sc->block_write = 1;
402
403 mtx_lock(&sc->mutex);
404 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
405 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
406 (slave << 1) | ICH_XMIT_SLVA_WRITE);
407 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
408 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count);
409 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_BLOCK_DB, buf[0]);
410 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
411 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
412 smb_error = ichsmb_wait(sc);
413 mtx_unlock(&sc->mutex);
414 DBG("smb_error=%d\n", smb_error);
415 return (smb_error);
416}
417
418int
419ichsmb_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
420{
421 const sc_p sc = device_get_softc(dev);
422 int smb_error;
423
424 DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
425 KASSERT(sc->ich_cmd == -1,
426 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
427 if (*count < 1 || *count > 32)
428 return (SMB_EINVAL);
429 bzero(sc->block_data, sizeof(sc->block_data));
430 sc->block_count = 0;
431 sc->block_index = 0;
432 sc->block_write = 0;
433
434 mtx_lock(&sc->mutex);
435 sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
436 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
437 (slave << 1) | ICH_XMIT_SLVA_READ);
438 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
439 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, *count); /* XXX? */
440 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
441 ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
442 if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
443 bcopy(sc->block_data, buf, min(sc->block_count, *count));
444 *count = sc->block_count;
445 }
446 mtx_unlock(&sc->mutex);
447 DBG("smb_error=%d\n", smb_error);
448#if ICHSMB_DEBUG
449#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
450 {
451 u_char *p;
452
453 for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
454 DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
455 " %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
456 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
457 DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
458 DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
459 }
460 }
461#undef DISP
462#endif
463 return (smb_error);
464}
465
466/********************************************************************
467 OTHER FUNCTIONS
468********************************************************************/
469
470/*
471 * This table describes what interrupts we should ever expect to
472 * see after each ICH command, not including the SMBALERT interrupt.
473 */
474static const u_int8_t ichsmb_state_irqs[] = {
475 /* quick */
476 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
477 /* byte */
478 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
479 /* byte data */
480 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
481 /* word data */
482 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
483 /* process call */
484 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
485 /* block */
486 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
487 | ICH_HST_STA_BYTE_DONE_STS),
488 /* i2c read (not used) */
489 (ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
490 | ICH_HST_STA_BYTE_DONE_STS)
491};
492
493/*
494 * Interrupt handler. This handler is bus-independent. Note that our
495 * interrupt may be shared, so we must handle "false" interrupts.
496 */
497void
498ichsmb_device_intr(void *cookie)
499{
500 const sc_p sc = cookie;
501 const device_t dev = sc->dev;
502 const int maxloops = 16;
503 u_int8_t status;
504 u_int8_t ok_bits;
505 int cmd_index;
506 int count;
507
508 mtx_lock(&sc->mutex);
509 for (count = 0; count < maxloops; count++) {
510
511 /* Get and reset status bits */
512 status = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA);
513#if ICHSMB_DEBUG
514 if ((status & ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY))
515 || count > 0) {
516 DBG("%d stat=0x%02x\n", count, status);
517 }
518#endif
519 status &= ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY);
520 if (status == 0)
521 break;
522
523 /* Check for unexpected interrupt */
524 ok_bits = ICH_HST_STA_SMBALERT_STS;
525 cmd_index = sc->ich_cmd >> 2;
526 if (sc->ich_cmd != -1) {
527 KASSERT(cmd_index < sizeof(ichsmb_state_irqs),
528 ("%s: ich_cmd=%d", device_get_nameunit(dev),
529 sc->ich_cmd));
530 ok_bits |= ichsmb_state_irqs[cmd_index];
531 }
532 if ((status & ~ok_bits) != 0) {
521 log(LOG_ERR, "%s: irq 0x%02x during %d\n",
522 device_get_nameunit(dev), status, cmd_index);
533 device_printf(dev, "irq 0x%02x during %d\n", status,
534 cmd_index);
523 bus_space_write_1(sc->io_bst, sc->io_bsh,
524 ICH_HST_STA, (status & ~ok_bits));
525 continue;
526 }
527
528 /* Handle SMBALERT interrupt */
529 if (status & ICH_HST_STA_SMBALERT_STS) {
530 static int smbalert_count = 16;
531 if (smbalert_count > 0) {
535 bus_space_write_1(sc->io_bst, sc->io_bsh,
536 ICH_HST_STA, (status & ~ok_bits));
537 continue;
538 }
539
540 /* Handle SMBALERT interrupt */
541 if (status & ICH_HST_STA_SMBALERT_STS) {
542 static int smbalert_count = 16;
543 if (smbalert_count > 0) {
532 log(LOG_WARNING, "%s: SMBALERT# rec'd\n",
533 device_get_nameunit(dev));
544 device_printf(dev, "SMBALERT# rec'd\n");
534 if (--smbalert_count == 0) {
545 if (--smbalert_count == 0) {
535 log(LOG_WARNING,
536 "%s: not logging anymore\n",
537 device_get_nameunit(dev));
546 device_printf(dev,
547 "not logging anymore\n");
538 }
539 }
540 }
541
542 /* Check for bus error */
543 if (status & ICH_HST_STA_BUS_ERR) {
544 sc->smb_error = SMB_ECOLLI; /* XXX SMB_EBUSERR? */
545 goto finished;
546 }
547
548 /* Check for device error */
549 if (status & ICH_HST_STA_DEV_ERR) {
550 sc->smb_error = SMB_ENOACK; /* or SMB_ETIMEOUT? */
551 goto finished;
552 }
553
554 /* Check for byte completion in block transfer */
555 if (status & ICH_HST_STA_BYTE_DONE_STS) {
556 if (sc->block_write) {
557 if (sc->block_index < sc->block_count) {
558
559 /* Write next byte */
560 bus_space_write_1(sc->io_bst,
561 sc->io_bsh, ICH_BLOCK_DB,
562 sc->block_data[sc->block_index++]);
563 }
564 } else {
565
566 /* First interrupt, get the count also */
567 if (sc->block_index == 0) {
568 sc->block_count = bus_space_read_1(
569 sc->io_bst, sc->io_bsh, ICH_D0);
570 }
571
572 /* Get next byte, if any */
573 if (sc->block_index < sc->block_count) {
574
575 /* Read next byte */
576 sc->block_data[sc->block_index++] =
577 bus_space_read_1(sc->io_bst,
578 sc->io_bsh, ICH_BLOCK_DB);
579
580 /* Set "LAST_BYTE" bit before reading
581 the last byte of block data */
582 if (sc->block_index
583 >= sc->block_count - 1) {
584 bus_space_write_1(sc->io_bst,
585 sc->io_bsh, ICH_HST_CNT,
586 ICH_HST_CNT_LAST_BYTE
587 | ICH_HST_CNT_INTREN
588 | sc->ich_cmd);
589 }
590 }
591 }
592 }
593
594 /* Check command completion */
595 if (status & ICH_HST_STA_INTR) {
596 sc->smb_error = SMB_ENOERR;
597finished:
598 sc->ich_cmd = -1;
599 bus_space_write_1(sc->io_bst, sc->io_bsh,
600 ICH_HST_STA, status);
601 wakeup(sc);
602 break;
603 }
604
605 /* Clear status bits and try again */
606 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, status);
607 }
608 mtx_unlock(&sc->mutex);
609
610 /* Too many loops? */
611 if (count == maxloops) {
548 }
549 }
550 }
551
552 /* Check for bus error */
553 if (status & ICH_HST_STA_BUS_ERR) {
554 sc->smb_error = SMB_ECOLLI; /* XXX SMB_EBUSERR? */
555 goto finished;
556 }
557
558 /* Check for device error */
559 if (status & ICH_HST_STA_DEV_ERR) {
560 sc->smb_error = SMB_ENOACK; /* or SMB_ETIMEOUT? */
561 goto finished;
562 }
563
564 /* Check for byte completion in block transfer */
565 if (status & ICH_HST_STA_BYTE_DONE_STS) {
566 if (sc->block_write) {
567 if (sc->block_index < sc->block_count) {
568
569 /* Write next byte */
570 bus_space_write_1(sc->io_bst,
571 sc->io_bsh, ICH_BLOCK_DB,
572 sc->block_data[sc->block_index++]);
573 }
574 } else {
575
576 /* First interrupt, get the count also */
577 if (sc->block_index == 0) {
578 sc->block_count = bus_space_read_1(
579 sc->io_bst, sc->io_bsh, ICH_D0);
580 }
581
582 /* Get next byte, if any */
583 if (sc->block_index < sc->block_count) {
584
585 /* Read next byte */
586 sc->block_data[sc->block_index++] =
587 bus_space_read_1(sc->io_bst,
588 sc->io_bsh, ICH_BLOCK_DB);
589
590 /* Set "LAST_BYTE" bit before reading
591 the last byte of block data */
592 if (sc->block_index
593 >= sc->block_count - 1) {
594 bus_space_write_1(sc->io_bst,
595 sc->io_bsh, ICH_HST_CNT,
596 ICH_HST_CNT_LAST_BYTE
597 | ICH_HST_CNT_INTREN
598 | sc->ich_cmd);
599 }
600 }
601 }
602 }
603
604 /* Check command completion */
605 if (status & ICH_HST_STA_INTR) {
606 sc->smb_error = SMB_ENOERR;
607finished:
608 sc->ich_cmd = -1;
609 bus_space_write_1(sc->io_bst, sc->io_bsh,
610 ICH_HST_STA, status);
611 wakeup(sc);
612 break;
613 }
614
615 /* Clear status bits and try again */
616 bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, status);
617 }
618 mtx_unlock(&sc->mutex);
619
620 /* Too many loops? */
621 if (count == maxloops) {
612 log(LOG_ERR, "%s: interrupt loop, status=0x%02x\n",
613 device_get_nameunit(dev),
622 device_printf(dev, "interrupt loop, status=0x%02x\n",
614 bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
615 }
616}
617
618/*
619 * Wait for command completion. Assumes mutex is held.
620 * Returns an SMB_* error code.
621 */
622static int
623ichsmb_wait(sc_p sc)
624{
625 const device_t dev = sc->dev;
626 int error, smb_error;
627
628 KASSERT(sc->ich_cmd != -1,
629 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
630 mtx_assert(&sc->mutex, MA_OWNED);
631 error = msleep(sc, &sc->mutex, PZERO, "ichsmb", hz / 4);
632 DBG("msleep -> %d\n", error);
633 switch (error) {
634 case 0:
635 smb_error = sc->smb_error;
636 break;
637 case EWOULDBLOCK:
623 bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
624 }
625}
626
627/*
628 * Wait for command completion. Assumes mutex is held.
629 * Returns an SMB_* error code.
630 */
631static int
632ichsmb_wait(sc_p sc)
633{
634 const device_t dev = sc->dev;
635 int error, smb_error;
636
637 KASSERT(sc->ich_cmd != -1,
638 ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
639 mtx_assert(&sc->mutex, MA_OWNED);
640 error = msleep(sc, &sc->mutex, PZERO, "ichsmb", hz / 4);
641 DBG("msleep -> %d\n", error);
642 switch (error) {
643 case 0:
644 smb_error = sc->smb_error;
645 break;
646 case EWOULDBLOCK:
638 log(LOG_ERR, "%s: device timeout, status=0x%02x\n",
639 device_get_nameunit(dev),
647 device_printf(dev, "device timeout, status=0x%02x\n",
640 bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
641 sc->ich_cmd = -1;
642 smb_error = SMB_ETIMEOUT;
643 break;
644 default:
645 smb_error = SMB_EABORT;
646 break;
647 }
648 return (smb_error);
649}
650
651/*
652 * Release resources associated with device.
653 */
654void
655ichsmb_release_resources(sc_p sc)
656{
657 const device_t dev = sc->dev;
658
659 if (sc->irq_handle != NULL) {
660 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
661 sc->irq_handle = NULL;
662 }
663 if (sc->irq_res != NULL) {
664 bus_release_resource(dev,
665 SYS_RES_IRQ, sc->irq_rid, sc->irq_res);
666 sc->irq_res = NULL;
667 }
668 if (sc->io_res != NULL) {
669 bus_release_resource(dev,
670 SYS_RES_IOPORT, sc->io_rid, sc->io_res);
671 sc->io_res = NULL;
672 }
673}
674
675int
676ichsmb_detach(device_t dev)
677{
678 const sc_p sc = device_get_softc(dev);
679 int error;
680
681 error = bus_generic_detach(dev);
682 if (error)
683 return (error);
684 device_delete_child(dev, sc->smb);
685 ichsmb_release_resources(sc);
686 mtx_destroy(&sc->mutex);
687
688 return 0;
689}
690
691DRIVER_MODULE(smbus, ichsmb, smbus_driver, smbus_devclass, 0, 0);
648 bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
649 sc->ich_cmd = -1;
650 smb_error = SMB_ETIMEOUT;
651 break;
652 default:
653 smb_error = SMB_EABORT;
654 break;
655 }
656 return (smb_error);
657}
658
659/*
660 * Release resources associated with device.
661 */
662void
663ichsmb_release_resources(sc_p sc)
664{
665 const device_t dev = sc->dev;
666
667 if (sc->irq_handle != NULL) {
668 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
669 sc->irq_handle = NULL;
670 }
671 if (sc->irq_res != NULL) {
672 bus_release_resource(dev,
673 SYS_RES_IRQ, sc->irq_rid, sc->irq_res);
674 sc->irq_res = NULL;
675 }
676 if (sc->io_res != NULL) {
677 bus_release_resource(dev,
678 SYS_RES_IOPORT, sc->io_rid, sc->io_res);
679 sc->io_res = NULL;
680 }
681}
682
683int
684ichsmb_detach(device_t dev)
685{
686 const sc_p sc = device_get_softc(dev);
687 int error;
688
689 error = bus_generic_detach(dev);
690 if (error)
691 return (error);
692 device_delete_child(dev, sc->smb);
693 ichsmb_release_resources(sc);
694 mtx_destroy(&sc->mutex);
695
696 return 0;
697}
698
699DRIVER_MODULE(smbus, ichsmb, smbus_driver, smbus_devclass, 0, 0);