| ns16550.h (137948) | ns16550.h (158844) |
|---|---|
| 1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 13 unchanged lines hidden (view full) --- 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)ns16550.h 7.1 (Berkeley) 5/9/91 | 1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 13 unchanged lines hidden (view full) --- 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)ns16550.h 7.1 (Berkeley) 5/9/91 |
| 30 * $FreeBSD: head/sys/dev/ic/ns16550.h 137948 2004-11-20 23:19:42Z marcel $ | 30 * $FreeBSD: head/sys/dev/ic/ns16550.h 158844 2006-05-23 00:41:12Z benno $ |
| 31 */ 32 33/* 34 * NS8250... UART registers. 35 */ 36 37/* 8250 registers #[0-6]. */ 38 --- 83 unchanged lines hidden (view full) --- 122#define MSR_DDSR 0x02 123#define MSR_DCTS 0x01 124 125/* 8250 multiplexed registers #[0-1]. Access enabled by LCR[7]. */ 126#define com_dll 0 /* divisor latch low (R/W) */ 127#define com_dlbl com_dll 128#define com_dlm 1 /* divisor latch high (R/W) */ 129#define com_dlbh com_dlm | 31 */ 32 33/* 34 * NS8250... UART registers. 35 */ 36 37/* 8250 registers #[0-6]. */ 38 --- 83 unchanged lines hidden (view full) --- 122#define MSR_DDSR 0x02 123#define MSR_DCTS 0x01 124 125/* 8250 multiplexed registers #[0-1]. Access enabled by LCR[7]. */ 126#define com_dll 0 /* divisor latch low (R/W) */ 127#define com_dlbl com_dll 128#define com_dlm 1 /* divisor latch high (R/W) */ 129#define com_dlbh com_dlm |
| 130#define REG_DL com_dll | 130#define REG_DLL com_dll 131#define REG_DLH com_dlm |
| 131 132/* 16450 register #7. Not multiplexed. */ 133#define com_scr 7 /* scratch register (R/W) */ 134 135/* 16550 register #2. Not multiplexed. */ 136#define com_fcr 2 /* FIFO control register (W) */ 137#define com_fifo com_fcr 138#define REG_FCR com_fcr --- 84 unchanged lines hidden --- | 132 133/* 16450 register #7. Not multiplexed. */ 134#define com_scr 7 /* scratch register (R/W) */ 135 136/* 16550 register #2. Not multiplexed. */ 137#define com_fcr 2 /* FIFO control register (W) */ 138#define com_fifo com_fcr 139#define REG_FCR com_fcr --- 84 unchanged lines hidden --- |