hwpmc_mpc7xxx.c (256281) | hwpmc_mpc7xxx.c (263122) |
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1/*- 2 * Copyright (c) 2011 Justin Hibbits 3 * Copyright (c) 2005, Joseph Koshy 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 13 unchanged lines hidden (view full) --- 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2011 Justin Hibbits 3 * Copyright (c) 2005, Joseph Koshy 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 13 unchanged lines hidden (view full) --- 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29#include <sys/cdefs.h> |
30__FBSDID("$FreeBSD: stable/10/sys/dev/hwpmc/hwpmc_mpc7xxx.c 255164 2013-09-03 00:34:18Z jhibbits $"); | 30__FBSDID("$FreeBSD: stable/10/sys/dev/hwpmc/hwpmc_mpc7xxx.c 263122 2014-03-14 00:12:53Z jhibbits $"); |
31 32#include <sys/param.h> 33#include <sys/pmc.h> 34#include <sys/pmckern.h> 35#include <sys/systm.h> 36 37#include <machine/pmc_mdep.h> 38#include <machine/spr.h> --- 25 unchanged lines hidden (view full) --- 64 * currently. 65 */ 66 67/* 68 * This should work for every 32-bit PowerPC implementation I know of (G3 and G4 69 * specifically). 70 */ 71 | 31 32#include <sys/param.h> 33#include <sys/pmc.h> 34#include <sys/pmckern.h> 35#include <sys/systm.h> 36 37#include <machine/pmc_mdep.h> 38#include <machine/spr.h> --- 25 unchanged lines hidden (view full) --- 64 * currently. 65 */ 66 67/* 68 * This should work for every 32-bit PowerPC implementation I know of (G3 and G4 69 * specifically). 70 */ 71 |
72struct powerpc_event_code_map { | 72struct mpc7xxx_event_code_map { |
73 enum pmc_event pe_ev; /* enum value */ 74 uint8_t pe_counter_mask; /* Which counter this can be counted in. */ | 73 enum pmc_event pe_ev; /* enum value */ 74 uint8_t pe_counter_mask; /* Which counter this can be counted in. */ |
75 uint8_t pe_code; /* numeric code */ | 75 uint8_t pe_code; /* numeric code */ |
76}; 77 78#define PPC_PMC_MASK1 0 79#define PPC_PMC_MASK2 1 80#define PPC_PMC_MASK3 2 81#define PPC_PMC_MASK4 3 82#define PPC_PMC_MASK5 4 83#define PPC_PMC_MASK6 5 84#define PPC_PMC_MASK_ALL 0x3f 85#define PMC_POWERPC_EVENT(id, mask, number) \ 86 { .pe_ev = PMC_EV_PPC7450_##id, .pe_counter_mask = mask, .pe_code = number } 87 | 76}; 77 78#define PPC_PMC_MASK1 0 79#define PPC_PMC_MASK2 1 80#define PPC_PMC_MASK3 2 81#define PPC_PMC_MASK4 3 82#define PPC_PMC_MASK5 4 83#define PPC_PMC_MASK6 5 84#define PPC_PMC_MASK_ALL 0x3f 85#define PMC_POWERPC_EVENT(id, mask, number) \ 86 { .pe_ev = PMC_EV_PPC7450_##id, .pe_counter_mask = mask, .pe_code = number } 87 |
88static struct powerpc_event_code_map powerpc_event_codes[] = { | 88static struct mpc7xxx_event_code_map mpc7xxx_event_codes[] = { |
89 PMC_POWERPC_EVENT(CYCLE,PPC_PMC_MASK_ALL, 1), 90 PMC_POWERPC_EVENT(INSTR_COMPLETED, 0x0f, 2), 91 PMC_POWERPC_EVENT(TLB_BIT_TRANSITIONS, 0x0f, 3), 92 PMC_POWERPC_EVENT(INSTR_DISPATCHED, 0x0f, 4), 93 PMC_POWERPC_EVENT(PMON_EXCEPT, 0x0f, 5), 94 PMC_POWERPC_EVENT(PMON_SIG, 0x0f, 7), 95 PMC_POWERPC_EVENT(VPU_INSTR_COMPLETED, 0x03, 8), 96 PMC_POWERPC_EVENT(VFPU_INSTR_COMPLETED, 0x03, 9), --- 209 unchanged lines hidden (view full) --- 306 PMC_POWERPC_EVENT(PREFETCH_ENGINE_REQUEST, 0x20, 52), 307 PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_LOAD, 0x20, 53), 308 PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_STORE, 0x20, 54), 309 PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_INSTR_FETCH, 0x20, 55), 310 PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_LOAD_STORE_INSTR_FETCH, 0x20, 56), 311 PMC_POWERPC_EVENT(PREFETCH_ENGINE_FULL, 0x20, 57) 312}; 313 | 89 PMC_POWERPC_EVENT(CYCLE,PPC_PMC_MASK_ALL, 1), 90 PMC_POWERPC_EVENT(INSTR_COMPLETED, 0x0f, 2), 91 PMC_POWERPC_EVENT(TLB_BIT_TRANSITIONS, 0x0f, 3), 92 PMC_POWERPC_EVENT(INSTR_DISPATCHED, 0x0f, 4), 93 PMC_POWERPC_EVENT(PMON_EXCEPT, 0x0f, 5), 94 PMC_POWERPC_EVENT(PMON_SIG, 0x0f, 7), 95 PMC_POWERPC_EVENT(VPU_INSTR_COMPLETED, 0x03, 8), 96 PMC_POWERPC_EVENT(VFPU_INSTR_COMPLETED, 0x03, 9), --- 209 unchanged lines hidden (view full) --- 306 PMC_POWERPC_EVENT(PREFETCH_ENGINE_REQUEST, 0x20, 52), 307 PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_LOAD, 0x20, 53), 308 PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_STORE, 0x20, 54), 309 PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_INSTR_FETCH, 0x20, 55), 310 PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_LOAD_STORE_INSTR_FETCH, 0x20, 56), 311 PMC_POWERPC_EVENT(PREFETCH_ENGINE_FULL, 0x20, 57) 312}; 313 |
314const size_t powerpc_event_codes_size = 315 sizeof(powerpc_event_codes) / sizeof(powerpc_event_codes[0]); | 314const size_t mpc7xxx_event_codes_size = 315 sizeof(mpc7xxx_event_codes) / sizeof(mpc7xxx_event_codes[0]); |
316 317static pmc_value_t 318mpc7xxx_pmcn_read(unsigned int pmc) 319{ 320 switch (pmc) { 321 case 0: 322 return mfspr(SPR_PMC1); 323 break; --- 236 unchanged lines hidden (view full) --- 560 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 561 ("[powerpc,%d] wrong cpu number %d", __LINE__, cpu)); 562 PMCDBG(MDP,INI,1,"powerpc-init cpu=%d", cpu); 563 564 powerpc_pcpu[cpu] = pac = malloc(sizeof(struct powerpc_cpu), M_PMC, 565 M_WAITOK|M_ZERO); 566 pac->pc_ppcpmcs = malloc(sizeof(struct pmc_hw) * MPC7XXX_MAX_PMCS, 567 M_PMC, M_WAITOK|M_ZERO); | 316 317static pmc_value_t 318mpc7xxx_pmcn_read(unsigned int pmc) 319{ 320 switch (pmc) { 321 case 0: 322 return mfspr(SPR_PMC1); 323 break; --- 236 unchanged lines hidden (view full) --- 560 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 561 ("[powerpc,%d] wrong cpu number %d", __LINE__, cpu)); 562 PMCDBG(MDP,INI,1,"powerpc-init cpu=%d", cpu); 563 564 powerpc_pcpu[cpu] = pac = malloc(sizeof(struct powerpc_cpu), M_PMC, 565 M_WAITOK|M_ZERO); 566 pac->pc_ppcpmcs = malloc(sizeof(struct pmc_hw) * MPC7XXX_MAX_PMCS, 567 M_PMC, M_WAITOK|M_ZERO); |
568 pac->pc_class = PMC_CLASS_PPC7450; |
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568 pc = pmc_pcpu[cpu]; 569 first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_PPC7450].pcd_ri; 570 KASSERT(pc != NULL, ("[powerpc,%d] NULL per-cpu pointer", __LINE__)); 571 572 for (i = 0, phw = pac->pc_ppcpmcs; i < MPC7XXX_MAX_PMCS; i++, phw++) { 573 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED | 574 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(i); 575 phw->phw_pmc = NULL; --- 30 unchanged lines hidden (view full) --- 606 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 607 ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu)); 608 KASSERT(ri >= 0 && ri < MPC7XXX_MAX_PMCS, 609 ("[powerpc,%d] illegal row index %d", __LINE__, ri)); 610 611 caps = a->pm_caps; 612 613 pe = a->pm_ev; | 569 pc = pmc_pcpu[cpu]; 570 first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_PPC7450].pcd_ri; 571 KASSERT(pc != NULL, ("[powerpc,%d] NULL per-cpu pointer", __LINE__)); 572 573 for (i = 0, phw = pac->pc_ppcpmcs; i < MPC7XXX_MAX_PMCS; i++, phw++) { 574 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED | 575 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(i); 576 phw->phw_pmc = NULL; --- 30 unchanged lines hidden (view full) --- 607 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 608 ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu)); 609 KASSERT(ri >= 0 && ri < MPC7XXX_MAX_PMCS, 610 ("[powerpc,%d] illegal row index %d", __LINE__, ri)); 611 612 caps = a->pm_caps; 613 614 pe = a->pm_ev; |
614 for (i = 0; i < powerpc_event_codes_size; i++) { 615 if (powerpc_event_codes[i].pe_ev == pe) { 616 config = powerpc_event_codes[i].pe_code; 617 counter = powerpc_event_codes[i].pe_counter_mask; | 615 for (i = 0; i < mpc7xxx_event_codes_size; i++) { 616 if (mpc7xxx_event_codes[i].pe_ev == pe) { 617 config = mpc7xxx_event_codes[i].pe_code; 618 counter = mpc7xxx_event_codes[i].pe_counter_mask; |
618 break; 619 } 620 } | 619 break; 620 } 621 } |
621 if (i == powerpc_event_codes_size) | 622 if (i == mpc7xxx_event_codes_size) |
622 return (EINVAL); 623 624 if ((counter & (1 << ri)) == 0) 625 return (EINVAL); 626 627 if (caps & PMC_CAP_SYSTEM) 628 config |= POWERPC_PMC_KERNEL_ENABLE; 629 if (caps & PMC_CAP_USER) --- 89 unchanged lines hidden (view full) --- 719 return (retval); 720} 721 722int 723pmc_mpc7xxx_initialize(struct pmc_mdep *pmc_mdep) 724{ 725 struct pmc_classdep *pcd; 726 | 623 return (EINVAL); 624 625 if ((counter & (1 << ri)) == 0) 626 return (EINVAL); 627 628 if (caps & PMC_CAP_SYSTEM) 629 config |= POWERPC_PMC_KERNEL_ENABLE; 630 if (caps & PMC_CAP_USER) --- 89 unchanged lines hidden (view full) --- 720 return (retval); 721} 722 723int 724pmc_mpc7xxx_initialize(struct pmc_mdep *pmc_mdep) 725{ 726 struct pmc_classdep *pcd; 727 |
728 pmc_mdep->pmd_cputype = PMC_CPU_PPC_7450; 729 |
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727 pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_PPC7450]; 728 pcd->pcd_caps = POWERPC_PMC_CAPS; 729 pcd->pcd_class = PMC_CLASS_PPC7450; 730 pcd->pcd_num = MPC7XXX_MAX_PMCS; 731 pcd->pcd_ri = pmc_mdep->pmd_npmc; 732 pcd->pcd_width = 32; /* All PMCs, even in ppc970, are 32-bit */ 733 734 pcd->pcd_allocate_pmc = mpc7xxx_allocate_pmc; 735 pcd->pcd_config_pmc = mpc7xxx_config_pmc; 736 pcd->pcd_pcpu_fini = mpc7xxx_pcpu_fini; 737 pcd->pcd_pcpu_init = mpc7xxx_pcpu_init; | 730 pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_PPC7450]; 731 pcd->pcd_caps = POWERPC_PMC_CAPS; 732 pcd->pcd_class = PMC_CLASS_PPC7450; 733 pcd->pcd_num = MPC7XXX_MAX_PMCS; 734 pcd->pcd_ri = pmc_mdep->pmd_npmc; 735 pcd->pcd_width = 32; /* All PMCs, even in ppc970, are 32-bit */ 736 737 pcd->pcd_allocate_pmc = mpc7xxx_allocate_pmc; 738 pcd->pcd_config_pmc = mpc7xxx_config_pmc; 739 pcd->pcd_pcpu_fini = mpc7xxx_pcpu_fini; 740 pcd->pcd_pcpu_init = mpc7xxx_pcpu_init; |
741 pcd->pcd_describe = powerpc_describe; 742 pcd->pcd_get_config = powerpc_get_config; |
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738 pcd->pcd_read_pmc = mpc7xxx_read_pmc; 739 pcd->pcd_release_pmc = mpc7xxx_release_pmc; 740 pcd->pcd_start_pmc = mpc7xxx_start_pmc; 741 pcd->pcd_stop_pmc = mpc7xxx_stop_pmc; 742 pcd->pcd_write_pmc = mpc7xxx_write_pmc; 743 744 pmc_mdep->pmd_npmc += MPC7XXX_MAX_PMCS; | 743 pcd->pcd_read_pmc = mpc7xxx_read_pmc; 744 pcd->pcd_release_pmc = mpc7xxx_release_pmc; 745 pcd->pcd_start_pmc = mpc7xxx_start_pmc; 746 pcd->pcd_stop_pmc = mpc7xxx_stop_pmc; 747 pcd->pcd_write_pmc = mpc7xxx_write_pmc; 748 749 pmc_mdep->pmd_npmc += MPC7XXX_MAX_PMCS; |
745 pmc_mdep->pmd_intr = mpc7xxx_intr; | 750 pmc_mdep->pmd_intr = mpc7xxx_intr; |
746 | 751 |
747 return 0; | 752 return (0); |
748} | 753} |