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hwpmc_core.h (185363) hwpmc_core.h (206089)
1/*-
2 * Copyright (c) 2008 Joseph Koshy
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
1/*-
2 * Copyright (c) 2008 Joseph Koshy
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/dev/hwpmc/hwpmc_core.h 185363 2008-11-27 09:00:47Z jkoshy $
26 * $FreeBSD: head/sys/dev/hwpmc/hwpmc_core.h 206089 2010-04-02 13:23:49Z fabient $
27 */
28
29#ifndef _DEV_HWPMC_CORE_H_
30#define _DEV_HWPMC_CORE_H_ 1
31
32/*
33 * Fixed-function PMCs.
34 */

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41#define IAF_ANY 0x4
42#define IAF_PMI 0x8
43
44/*
45 * Programmable PMCs.
46 */
47struct pmc_md_iap_op_pmcallocate {
48 uint32_t pm_iap_config;
27 */
28
29#ifndef _DEV_HWPMC_CORE_H_
30#define _DEV_HWPMC_CORE_H_ 1
31
32/*
33 * Fixed-function PMCs.
34 */

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41#define IAF_ANY 0x4
42#define IAF_PMI 0x8
43
44/*
45 * Programmable PMCs.
46 */
47struct pmc_md_iap_op_pmcallocate {
48 uint32_t pm_iap_config;
49 uint32_t pm_iap_rsp;
49};
50
51#define IAP_EVSEL(C) ((C) & 0xFF)
52#define IAP_UMASK(C) ((C) & 0xFF00)
53#define IAP_USR (1 << 16)
54#define IAP_OS (1 << 17)
55#define IAP_EDGE (1 << 18)
56#define IAP_INT (1 << 20)
57#define IAP_ANY (1 << 21)
58#define IAP_EN (1 << 22)
59#define IAP_INV (1 << 23)
60#define IAP_CMASK(C) (((C) & 0xFF) << 24)
61
50};
51
52#define IAP_EVSEL(C) ((C) & 0xFF)
53#define IAP_UMASK(C) ((C) & 0xFF00)
54#define IAP_USR (1 << 16)
55#define IAP_OS (1 << 17)
56#define IAP_EDGE (1 << 18)
57#define IAP_INT (1 << 20)
58#define IAP_ANY (1 << 21)
59#define IAP_EN (1 << 22)
60#define IAP_INV (1 << 23)
61#define IAP_CMASK(C) (((C) & 0xFF) << 24)
62
63#define IA_OFFCORE_RSP_MASK 0xF7FF
64
62#ifdef _KERNEL
63
64/*
65 * Fixed-function counters.
66 */
67#define IAF_MASK 0xF
68
69#define IAF_CTR0 0x309
70#define IAF_CTR1 0x30A
71#define IAF_CTR2 0x30B
72
73#define IAF_OFFSET 32
74#define IAF_CTRL 0x38D
75
76/*
77 * Programmable counters.
78 */
65#ifdef _KERNEL
66
67/*
68 * Fixed-function counters.
69 */
70#define IAF_MASK 0xF
71
72#define IAF_CTR0 0x309
73#define IAF_CTR1 0x30A
74#define IAF_CTR2 0x30B
75
76#define IAF_OFFSET 32
77#define IAF_CTRL 0x38D
78
79/*
80 * Programmable counters.
81 */
79#define IAP_PMC0 0x0C1
80#define IAP_PMC1 0x0C2
81
82
83#define IAP_PMC0 0x0C1
82#define IAP_EVSEL0 0x186
84#define IAP_EVSEL0 0x186
83#define IAP_EVSEL1 0x187
84
85/*
86 * Simplified programming interface in Intel Performance Architecture
87 * v2 and later.
88 */
85
86/*
87 * Simplified programming interface in Intel Performance Architecture
88 * v2 and later.
89 */
90
89#define IA_GLOBAL_STATUS 0x38E
90#define IA_GLOBAL_CTRL 0x38F
91#define IA_GLOBAL_OVF_CTRL 0x390
92
93#define IA_GLOBAL_STATUS_FLAG_CONDCHG (1ULL << 63)
94#define IA_GLOBAL_STATUS_FLAG_OVFBUF (1ULL << 62)
95
91#define IA_GLOBAL_STATUS 0x38E
92#define IA_GLOBAL_CTRL 0x38F
93#define IA_GLOBAL_OVF_CTRL 0x390
94
95#define IA_GLOBAL_STATUS_FLAG_CONDCHG (1ULL << 63)
96#define IA_GLOBAL_STATUS_FLAG_OVFBUF (1ULL << 62)
97
98/*
99 * Offcore response configuration.
100 */
101#define IA_OFFCORE_RSP0 0x1A6
102#define IA_OFFCORE_RSP1 0x1A7
103
96struct pmc_md_iaf_pmc {
97 uint64_t pm_iaf_ctrl;
98};
99
100struct pmc_md_iap_pmc {
101 uint32_t pm_iap_evsel;
104struct pmc_md_iaf_pmc {
105 uint64_t pm_iaf_ctrl;
106};
107
108struct pmc_md_iap_pmc {
109 uint32_t pm_iap_evsel;
110 uint32_t pm_iap_rsp;
102};
103
104/*
105 * Prototypes.
106 */
107
108int pmc_core_initialize(struct pmc_mdep *_md, int _maxcpu);
109void pmc_core_finalize(struct pmc_mdep *_md);

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112
113/*
114 * Prototypes.
115 */
116
117int pmc_core_initialize(struct pmc_mdep *_md, int _maxcpu);
118void pmc_core_finalize(struct pmc_mdep *_md);

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