| hwpmc_amd.c (145338) | hwpmc_amd.c (145615) |
|---|---|
| 1/*- 2 * Copyright (c) 2003-2005 Joseph Koshy 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 */ 27 28#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2003-2005 Joseph Koshy 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 */ 27 28#include <sys/cdefs.h> |
| 29__FBSDID("$FreeBSD: head/sys/dev/hwpmc/hwpmc_amd.c 145338 2005-04-20 20:26:39Z marcel $"); | 29__FBSDID("$FreeBSD: head/sys/dev/hwpmc/hwpmc_amd.c 145615 2005-04-28 08:13:19Z jkoshy $"); |
| 30 31/* Support for the AMD K7 and later processors */ 32 33#include <sys/param.h> 34#include <sys/lock.h> 35#include <sys/malloc.h> 36#include <sys/mutex.h> 37#include <sys/pmc.h> --- 400 unchanged lines hidden (view full) --- 438 * pmc 'pm'. 439 */ 440 441static int 442amd_config_pmc(int cpu, int ri, struct pmc *pm) 443{ 444 struct pmc_hw *phw; 445 | 30 31/* Support for the AMD K7 and later processors */ 32 33#include <sys/param.h> 34#include <sys/lock.h> 35#include <sys/malloc.h> 36#include <sys/mutex.h> 37#include <sys/pmc.h> --- 400 unchanged lines hidden (view full) --- 438 * pmc 'pm'. 439 */ 440 441static int 442amd_config_pmc(int cpu, int ri, struct pmc *pm) 443{ 444 struct pmc_hw *phw; 445 |
| 446 PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); 447 |
|
| 446 KASSERT(cpu >= 0 && cpu < mp_ncpus, 447 ("[amd,%d] illegal CPU value %d", __LINE__, cpu)); 448 KASSERT(ri >= 0 && ri < AMD_NPMCS, 449 ("[amd,%d] illegal row-index %d", __LINE__, ri)); 450 451 phw = pmc_pcpu[cpu]->pc_hwpmcs[ri]; 452 453 KASSERT(pm == NULL || phw->phw_pmc == NULL, | 448 KASSERT(cpu >= 0 && cpu < mp_ncpus, 449 ("[amd,%d] illegal CPU value %d", __LINE__, cpu)); 450 KASSERT(ri >= 0 && ri < AMD_NPMCS, 451 ("[amd,%d] illegal row-index %d", __LINE__, ri)); 452 453 phw = pmc_pcpu[cpu]->pc_hwpmcs[ri]; 454 455 KASSERT(pm == NULL || phw->phw_pmc == NULL, |
| 454 ("[amd,%d] hwpmc not unconfigured before re-config", __LINE__)); | 456 ("[amd,%d] pm=%p phw->pm=%p hwpmc not unconfigured", 457 __LINE__, pm, phw->phw_pmc)); |
| 455 456 phw->phw_pmc = pm; 457 return 0; 458} 459 460/* 461 * Machine dependent actions taken during the context switch in of a 462 * thread. 463 */ 464 465static int | 458 459 phw->phw_pmc = pm; 460 return 0; 461} 462 463/* 464 * Machine dependent actions taken during the context switch in of a 465 * thread. 466 */ 467 468static int |
| 466amd_switch_in(struct pmc_cpu *pc) | 469amd_switch_in(struct pmc_cpu *pc, struct pmc_process *pp) |
| 467{ 468 (void) pc; 469 | 470{ 471 (void) pc; 472 |
| 470 /* enable the RDPMC instruction */ 471 load_cr4(rcr4() | CR4_PCE); | 473 PMCDBG(MDP,SWI,1, "pc=%p pp=%p enable-msr=%d", pc, pp, 474 (pp->pp_flags & PMC_FLAG_ENABLE_MSR_ACCESS) != 0); 475 476 /* enable the RDPMC instruction if needed */ 477 if (pp->pp_flags & PMC_FLAG_ENABLE_MSR_ACCESS) 478 load_cr4(rcr4() | CR4_PCE); 479 |
| 472 return 0; 473} 474 475/* 476 * Machine dependent actions taken during the context switch out of a 477 * thread. 478 */ 479 480static int | 480 return 0; 481} 482 483/* 484 * Machine dependent actions taken during the context switch out of a 485 * thread. 486 */ 487 488static int |
| 481amd_switch_out(struct pmc_cpu *pc) | 489amd_switch_out(struct pmc_cpu *pc, struct pmc_process *pp) |
| 482{ 483 (void) pc; | 490{ 491 (void) pc; |
| 492 (void) pp; /* can be NULL */ |
|
| 484 | 493 |
| 485 /* disallow RDPMC instruction */ | 494 PMCDBG(MDP,SWO,1, "pc=%p pp=%p enable-msr=%d", pc, pp, pp ? 495 (pp->pp_flags & PMC_FLAG_ENABLE_MSR_ACCESS) == 1 : 0); 496 497 /* always turn off the RDPMC instruction */ |
| 486 load_cr4(rcr4() & ~CR4_PCE); | 498 load_cr4(rcr4() & ~CR4_PCE); |
| 499 |
|
| 487 return 0; 488} 489 490/* 491 * Check if a given allocation is feasible. 492 */ 493 494static int --- 318 unchanged lines hidden (view full) --- 813 */ 814 815static int 816amd_get_msr(int ri, uint32_t *msr) 817{ 818 KASSERT(ri >= 0 && ri < AMD_NPMCS, 819 ("[amd,%d] ri %d out of range", __LINE__, ri)); 820 | 500 return 0; 501} 502 503/* 504 * Check if a given allocation is feasible. 505 */ 506 507static int --- 318 unchanged lines hidden (view full) --- 826 */ 827 828static int 829amd_get_msr(int ri, uint32_t *msr) 830{ 831 KASSERT(ri >= 0 && ri < AMD_NPMCS, 832 ("[amd,%d] ri %d out of range", __LINE__, ri)); 833 |
| 821 *msr = amd_pmcdesc[ri].pm_perfctr; | 834 *msr = amd_pmcdesc[ri].pm_perfctr - AMD_PMC_PERFCTR_0; |
| 822 return 0; 823} 824 825/* 826 * processor dependent initialization. 827 */ 828 829/* --- 166 unchanged lines hidden --- | 835 return 0; 836} 837 838/* 839 * processor dependent initialization. 840 */ 841 842/* --- 166 unchanged lines hidden --- |