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if_hatm.c (232874) if_hatm.c (254263)
1/*-
2 * Copyright (c) 2001-2003
3 * Fraunhofer Institute for Open Communication Systems (FhG Fokus).
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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28 *
29 * ForeHE driver.
30 *
31 * This file contains the module and driver infrastructure stuff as well
32 * as a couple of utility functions and the entire initialisation.
33 */
34
35#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2001-2003
3 * Fraunhofer Institute for Open Communication Systems (FhG Fokus).
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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28 *
29 * ForeHE driver.
30 *
31 * This file contains the module and driver infrastructure stuff as well
32 * as a couple of utility functions and the entire initialisation.
33 */
34
35#include <sys/cdefs.h>
36__FBSDID("$FreeBSD: head/sys/dev/hatm/if_hatm.c 232874 2012-03-12 18:15:08Z scottl $");
36__FBSDID("$FreeBSD: head/sys/dev/hatm/if_hatm.c 254263 2013-08-12 23:30:01Z scottl $");
37
38#include "opt_inet.h"
39#include "opt_natm.h"
40
41#include <sys/types.h>
42#include <sys/param.h>
43#include <sys/systm.h>
44#include <sys/malloc.h>

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1681 cv_init(&sc->cv_rcclose, "RCClose");
1682
1683 sysctl_ctx_init(&sc->sysctl_ctx);
1684
1685 /*
1686 * 4.2 BIOS Configuration
1687 */
1688 v = pci_read_config(dev, PCIR_COMMAND, 2);
37
38#include "opt_inet.h"
39#include "opt_natm.h"
40
41#include <sys/types.h>
42#include <sys/param.h>
43#include <sys/systm.h>
44#include <sys/malloc.h>

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1681 cv_init(&sc->cv_rcclose, "RCClose");
1682
1683 sysctl_ctx_init(&sc->sysctl_ctx);
1684
1685 /*
1686 * 4.2 BIOS Configuration
1687 */
1688 v = pci_read_config(dev, PCIR_COMMAND, 2);
1689 v |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
1689 v |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
1690 pci_write_config(dev, PCIR_COMMAND, v, 2);
1691
1692 /*
1693 * 4.3 PCI Bus Controller-Specific Initialisation
1694 */
1695 v = pci_read_config(dev, HE_PCIR_GEN_CNTL_0, 4);
1696 v |= HE_PCIM_CTL0_MRL | HE_PCIM_CTL0_MRM | HE_PCIM_CTL0_IGNORE_TIMEOUT;
1697#if BYTE_ORDER == BIG_ENDIAN && 0
1698 v |= HE_PCIM_CTL0_BIGENDIAN;
1699#endif
1700 pci_write_config(dev, HE_PCIR_GEN_CNTL_0, v, 4);
1701
1702 /*
1703 * Map memory
1704 */
1690 pci_write_config(dev, PCIR_COMMAND, v, 2);
1691
1692 /*
1693 * 4.3 PCI Bus Controller-Specific Initialisation
1694 */
1695 v = pci_read_config(dev, HE_PCIR_GEN_CNTL_0, 4);
1696 v |= HE_PCIM_CTL0_MRL | HE_PCIM_CTL0_MRM | HE_PCIM_CTL0_IGNORE_TIMEOUT;
1697#if BYTE_ORDER == BIG_ENDIAN && 0
1698 v |= HE_PCIM_CTL0_BIGENDIAN;
1699#endif
1700 pci_write_config(dev, HE_PCIR_GEN_CNTL_0, v, 4);
1701
1702 /*
1703 * Map memory
1704 */
1705 v = pci_read_config(dev, PCIR_COMMAND, 2);
1706 if (!(v & PCIM_CMD_MEMEN)) {
1707 device_printf(dev, "failed to enable memory\n");
1708 error = ENXIO;
1709 goto failed;
1710 }
1711 sc->memid = PCIR_BAR(0);
1712 sc->memres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->memid,
1713 RF_ACTIVE);
1714 if (sc->memres == NULL) {
1715 device_printf(dev, "could not map memory\n");
1716 error = ENXIO;
1717 goto failed;
1718 }

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1705 sc->memid = PCIR_BAR(0);
1706 sc->memres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->memid,
1707 RF_ACTIVE);
1708 if (sc->memres == NULL) {
1709 device_printf(dev, "could not map memory\n");
1710 error = ENXIO;
1711 goto failed;
1712 }

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