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if_gem_pci.c (177560) if_gem_pci.c (194763)
1/*-
2 * Copyright (C) 2001 Eduardo Horvath.
3 * Copyright (c) 2007 Marius Strobl <marius@FreeBSD.org>
4 * All rights reserved.
5 *
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 15 unchanged lines hidden (view full) ---

24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
29 */
30
31#include <sys/cdefs.h>
1/*-
2 * Copyright (C) 2001 Eduardo Horvath.
3 * Copyright (c) 2007 Marius Strobl <marius@FreeBSD.org>
4 * All rights reserved.
5 *
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 15 unchanged lines hidden (view full) ---

24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: head/sys/dev/gem/if_gem_pci.c 177560 2008-03-24 17:23:53Z marius $");
32__FBSDID("$FreeBSD: head/sys/dev/gem/if_gem_pci.c 194763 2009-06-23 20:36:59Z marius $");
33
34/*
35 * PCI bindings for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers
36 */
37
38#include <sys/param.h>
39#include <sys/systm.h>
40#include <sys/bus.h>

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85 DEVMETHOD(bus_print_child, bus_generic_print_child),
86 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
87
88 /* MII interface */
89 DEVMETHOD(miibus_readreg, gem_mii_readreg),
90 DEVMETHOD(miibus_writereg, gem_mii_writereg),
91 DEVMETHOD(miibus_statchg, gem_mii_statchg),
92
33
34/*
35 * PCI bindings for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers
36 */
37
38#include <sys/param.h>
39#include <sys/systm.h>
40#include <sys/bus.h>

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85 DEVMETHOD(bus_print_child, bus_generic_print_child),
86 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
87
88 /* MII interface */
89 DEVMETHOD(miibus_readreg, gem_mii_readreg),
90 DEVMETHOD(miibus_writereg, gem_mii_writereg),
91 DEVMETHOD(miibus_statchg, gem_mii_statchg),
92
93 { 0, 0 }
93 KOBJMETHOD_END
94};
95
96static driver_t gem_pci_driver = {
97 "gem",
98 gem_pci_methods,
99 sizeof(struct gem_softc)
100};
101
102DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0);
103MODULE_DEPEND(gem, pci, 1, 1, 1);
104MODULE_DEPEND(gem, ether, 1, 1, 1);
105
106static const struct gem_pci_dev {
107 uint32_t gpd_devid;
108 int gpd_variant;
109 const char *gpd_desc;
94};
95
96static driver_t gem_pci_driver = {
97 "gem",
98 gem_pci_methods,
99 sizeof(struct gem_softc)
100};
101
102DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0);
103MODULE_DEPEND(gem, pci, 1, 1, 1);
104MODULE_DEPEND(gem, ether, 1, 1, 1);
105
106static const struct gem_pci_dev {
107 uint32_t gpd_devid;
108 int gpd_variant;
109 const char *gpd_desc;
110} gem_pci_devlist[] = {
110} const gem_pci_devlist[] = {
111 { 0x1101108e, GEM_SUN_ERI, "Sun ERI 10/100 Ethernet" },
112 { 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet" },
113 { 0x0021106b, GEM_APPLE_GMAC, "Apple UniNorth GMAC Ethernet" },
114 { 0x0024106b, GEM_APPLE_GMAC, "Apple Pangea GMAC Ethernet" },
115 { 0x0032106b, GEM_APPLE_GMAC, "Apple UniNorth2 GMAC Ethernet" },
116 { 0x004c106b, GEM_APPLE_K2_GMAC,"Apple K2 GMAC Ethernet" },
117 { 0x0051106b, GEM_APPLE_GMAC, "Apple Shasta GMAC Ethernet" },
118 { 0x006b106b, GEM_APPLE_GMAC, "Apple Intrepid 2 GMAC Ethernet" },

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195 }
196 rman_set_bustag(sc->sc_res[GEM_RES_BANK2],
197 rman_get_bustag(sc->sc_res[GEM_RES_BANK1]));
198 bus_space_subregion(rman_get_bustag(sc->sc_res[GEM_RES_BANK1]),
199 rman_get_bushandle(sc->sc_res[GEM_RES_BANK1]),
200 GEM_PCI_BANK2_OFFSET, GEM_PCI_BANK2_SIZE,
201 &sc->sc_res[GEM_RES_BANK2]->r_bushandle);
202
111 { 0x1101108e, GEM_SUN_ERI, "Sun ERI 10/100 Ethernet" },
112 { 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet" },
113 { 0x0021106b, GEM_APPLE_GMAC, "Apple UniNorth GMAC Ethernet" },
114 { 0x0024106b, GEM_APPLE_GMAC, "Apple Pangea GMAC Ethernet" },
115 { 0x0032106b, GEM_APPLE_GMAC, "Apple UniNorth2 GMAC Ethernet" },
116 { 0x004c106b, GEM_APPLE_K2_GMAC,"Apple K2 GMAC Ethernet" },
117 { 0x0051106b, GEM_APPLE_GMAC, "Apple Shasta GMAC Ethernet" },
118 { 0x006b106b, GEM_APPLE_GMAC, "Apple Intrepid 2 GMAC Ethernet" },

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195 }
196 rman_set_bustag(sc->sc_res[GEM_RES_BANK2],
197 rman_get_bustag(sc->sc_res[GEM_RES_BANK1]));
198 bus_space_subregion(rman_get_bustag(sc->sc_res[GEM_RES_BANK1]),
199 rman_get_bushandle(sc->sc_res[GEM_RES_BANK1]),
200 GEM_PCI_BANK2_OFFSET, GEM_PCI_BANK2_SIZE,
201 &sc->sc_res[GEM_RES_BANK2]->r_bushandle);
202
203 /* Determine whether we're running at 66MHz. */
204 if ((GEM_BANK2_READ_4(sc, GEM_PCI_BIF_CONFIG) &
205 GEM_PCI_BIF_CNF_M66EN) != 0)
206 sc->sc_flags |= GEM_PCI66;
207
203#if defined(__powerpc__) || defined(__sparc64__)
204 OF_getetheraddr(dev, sc->sc_enaddr);
205#else
206 /*
207 * Dig out VPD (vital product data) and read NA (network address).
208#if defined(__powerpc__) || defined(__sparc64__)
209 OF_getetheraddr(dev, sc->sc_enaddr);
210#else
211 /*
212 * Dig out VPD (vital product data) and read NA (network address).
208 * The VPD of GEM resides in the PCI Expansion ROM (PCI FCode) and
209 * can't be accessed via the PCI capability pointer.
213 * The VPD resides in the PCI Expansion ROM (PCI FCode) and can't
214 * be accessed via the PCI capability pointer.
210 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later)
211 * chapter 2 describes the data structure.
212 */
213
214#define PCI_ROMHDR_SIZE 0x1c
215#define PCI_ROMHDR_SIG 0x00
216#define PCI_ROMHDR_SIG_MAGIC 0xaa55 /* little endian */
217#define PCI_ROMHDR_PTR_DATA 0x18
218#define PCI_ROM_SIZE 0x18
219#define PCI_ROM_SIG 0x00
220#define PCI_ROM_SIG_MAGIC 0x52494350 /* "PCIR", endian */
221 /* reversed */
222#define PCI_ROM_VENDOR 0x04
223#define PCI_ROM_DEVICE 0x06
224#define PCI_ROM_PTR_VPD 0x08
225#define PCI_VPDRES_BYTE0 0x00
226#define PCI_VPDRES_ISLARGE(x) ((x) & 0x80)
227#define PCI_VPDRES_LARGE_NAME(x) ((x) & 0x7f)
215 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later)
216 * chapter 2 describes the data structure.
217 */
218
219#define PCI_ROMHDR_SIZE 0x1c
220#define PCI_ROMHDR_SIG 0x00
221#define PCI_ROMHDR_SIG_MAGIC 0xaa55 /* little endian */
222#define PCI_ROMHDR_PTR_DATA 0x18
223#define PCI_ROM_SIZE 0x18
224#define PCI_ROM_SIG 0x00
225#define PCI_ROM_SIG_MAGIC 0x52494350 /* "PCIR", endian */
226 /* reversed */
227#define PCI_ROM_VENDOR 0x04
228#define PCI_ROM_DEVICE 0x06
229#define PCI_ROM_PTR_VPD 0x08
230#define PCI_VPDRES_BYTE0 0x00
231#define PCI_VPDRES_ISLARGE(x) ((x) & 0x80)
232#define PCI_VPDRES_LARGE_NAME(x) ((x) & 0x7f)
228#define PCI_VPDRES_TYPE_VPD 0x10 /* large */
229#define PCI_VPDRES_LARGE_LEN_LSB 0x01
230#define PCI_VPDRES_LARGE_LEN_MSB 0x02
233#define PCI_VPDRES_LARGE_LEN_LSB 0x01
234#define PCI_VPDRES_LARGE_LEN_MSB 0x02
231#define PCI_VPDRES_LARGE_DATA 0x03
232#define PCI_VPD_SIZE 0x03
235#define PCI_VPDRES_LARGE_SIZE 0x03
236#define PCI_VPDRES_TYPE_VPD 0x10 /* large */
233#define PCI_VPD_KEY0 0x00
234#define PCI_VPD_KEY1 0x01
235#define PCI_VPD_LEN 0x02
237#define PCI_VPD_KEY0 0x00
238#define PCI_VPD_KEY1 0x01
239#define PCI_VPD_LEN 0x02
236#define PCI_VPD_DATA 0x03
240#define PCI_VPD_SIZE 0x03
237
238#define GEM_ROM_READ_1(sc, offs) \
241
242#define GEM_ROM_READ_1(sc, offs) \
239 GEM_BANK1_READ_1((sc), GEM_PCI_ROM_OFFSET + (offs))
243 GEM_BANK1_READ_1((sc), GEM_PCI_ROM_OFFSET + (offs))
240#define GEM_ROM_READ_2(sc, offs) \
244#define GEM_ROM_READ_2(sc, offs) \
241 GEM_BANK1_READ_2((sc), GEM_PCI_ROM_OFFSET + (offs))
245 GEM_BANK1_READ_2((sc), GEM_PCI_ROM_OFFSET + (offs))
242#define GEM_ROM_READ_4(sc, offs) \
246#define GEM_ROM_READ_4(sc, offs) \
243 GEM_BANK1_READ_4((sc), GEM_PCI_ROM_OFFSET + (offs))
247 GEM_BANK1_READ_4((sc), GEM_PCI_ROM_OFFSET + (offs))
244
245 /* Read PCI Expansion ROM header. */
246 if (GEM_ROM_READ_2(sc, PCI_ROMHDR_SIG) != PCI_ROMHDR_SIG_MAGIC ||
247 (i = GEM_ROM_READ_2(sc, PCI_ROMHDR_PTR_DATA)) <
248 PCI_ROMHDR_SIZE) {
249 device_printf(dev, "unexpected PCI Expansion ROM header\n");
250 goto fail;
251 }

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268 * endian and the end tag is non-standard (0x79) and followed
269 * by an all-zero "checksum" byte. Sun calls this a "Fresh
270 * Choice Ethernet" VPD...
271 */
272 if (PCI_VPDRES_ISLARGE(GEM_ROM_READ_1(sc,
273 j + PCI_VPDRES_BYTE0)) == 0 ||
274 PCI_VPDRES_LARGE_NAME(GEM_ROM_READ_1(sc,
275 j + PCI_VPDRES_BYTE0)) != PCI_VPDRES_TYPE_VPD ||
248
249 /* Read PCI Expansion ROM header. */
250 if (GEM_ROM_READ_2(sc, PCI_ROMHDR_SIG) != PCI_ROMHDR_SIG_MAGIC ||
251 (i = GEM_ROM_READ_2(sc, PCI_ROMHDR_PTR_DATA)) <
252 PCI_ROMHDR_SIZE) {
253 device_printf(dev, "unexpected PCI Expansion ROM header\n");
254 goto fail;
255 }

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272 * endian and the end tag is non-standard (0x79) and followed
273 * by an all-zero "checksum" byte. Sun calls this a "Fresh
274 * Choice Ethernet" VPD...
275 */
276 if (PCI_VPDRES_ISLARGE(GEM_ROM_READ_1(sc,
277 j + PCI_VPDRES_BYTE0)) == 0 ||
278 PCI_VPDRES_LARGE_NAME(GEM_ROM_READ_1(sc,
279 j + PCI_VPDRES_BYTE0)) != PCI_VPDRES_TYPE_VPD ||
276 (GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_LSB) << 8 |
280 ((GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_LSB) << 8) |
277 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_MSB)) !=
278 PCI_VPD_SIZE + ETHER_ADDR_LEN ||
281 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_MSB)) !=
282 PCI_VPD_SIZE + ETHER_ADDR_LEN ||
279 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_KEY0) !=
283 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY0) !=
280 0x4e /* N */ ||
284 0x4e /* N */ ||
281 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_KEY1) !=
285 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY1) !=
282 0x41 /* A */ ||
286 0x41 /* A */ ||
283 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_LEN) !=
287 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_LEN) !=
284 ETHER_ADDR_LEN ||
288 ETHER_ADDR_LEN ||
285 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_DATA +
289 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE +
286 ETHER_ADDR_LEN) != 0x79) {
287 device_printf(dev, "unexpected PCI VPD\n");
288 goto fail;
289 }
290 bus_read_region_1(sc->sc_res[GEM_RES_BANK1],
290 ETHER_ADDR_LEN) != 0x79) {
291 device_printf(dev, "unexpected PCI VPD\n");
292 goto fail;
293 }
294 bus_read_region_1(sc->sc_res[GEM_RES_BANK1],
291 GEM_PCI_ROM_OFFSET + j + PCI_VPDRES_LARGE_DATA + PCI_VPD_DATA,
295 GEM_PCI_ROM_OFFSET + j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE,
292 sc->sc_enaddr, ETHER_ADDR_LEN);
293#endif
294
295 if (gem_attach(sc) != 0) {
296 device_printf(dev, "could not be attached\n");
297 goto fail;
298 }
299

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325 GEM_LOCK_DESTROY(sc);
326 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
327 return (0);
328}
329
330static int
331gem_pci_suspend(device_t dev)
332{
296 sc->sc_enaddr, ETHER_ADDR_LEN);
297#endif
298
299 if (gem_attach(sc) != 0) {
300 device_printf(dev, "could not be attached\n");
301 goto fail;
302 }
303

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329 GEM_LOCK_DESTROY(sc);
330 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
331 return (0);
332}
333
334static int
335gem_pci_suspend(device_t dev)
336{
333 struct gem_softc *sc;
334
337
335 sc = device_get_softc(dev);
336 gem_suspend(sc);
338 gem_suspend(device_get_softc(dev));
337 return (0);
338}
339
340static int
341gem_pci_resume(device_t dev)
342{
339 return (0);
340}
341
342static int
343gem_pci_resume(device_t dev)
344{
343 struct gem_softc *sc;
344
345
345 sc = device_get_softc(dev);
346 gem_resume(sc);
346 gem_resume(device_get_softc(dev));
347 return (0);
348}
347 return (0);
348}