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if_fxp.c (80345) if_fxp.c (82425)
1/*-
2 * Copyright (c) 1995, David Greenman
3 * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 11 unchanged lines hidden (view full) ---

20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1995, David Greenman
3 * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 11 unchanged lines hidden (view full) ---

20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/fxp/if_fxp.c 80345 2001-07-25 18:00:17Z jlemon $
28 * $FreeBSD: head/sys/dev/fxp/if_fxp.c 82425 2001-08-27 16:07:12Z jlemon $
29 */
30
31/*
32 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
33 */
34
35#include "vlan.h"
36

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180static void fxp_release(struct fxp_softc *sc);
181static int fxp_ioctl(struct ifnet *ifp, u_long command,
182 caddr_t data);
183static void fxp_watchdog(struct ifnet *ifp);
184static int fxp_add_rfabuf(struct fxp_softc *sc, struct mbuf *oldm);
185static void fxp_mc_setup(struct fxp_softc *sc);
186static u_int16_t fxp_eeprom_getword(struct fxp_softc *sc, int offset,
187 int autosize);
29 */
30
31/*
32 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
33 */
34
35#include "vlan.h"
36

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180static void fxp_release(struct fxp_softc *sc);
181static int fxp_ioctl(struct ifnet *ifp, u_long command,
182 caddr_t data);
183static void fxp_watchdog(struct ifnet *ifp);
184static int fxp_add_rfabuf(struct fxp_softc *sc, struct mbuf *oldm);
185static void fxp_mc_setup(struct fxp_softc *sc);
186static u_int16_t fxp_eeprom_getword(struct fxp_softc *sc, int offset,
187 int autosize);
188static void fxp_eeprom_putword(struct fxp_softc *sc, int offset,
189 u_int16_t data);
188static void fxp_autosize_eeprom(struct fxp_softc *sc);
189static void fxp_read_eeprom(struct fxp_softc *sc, u_short *data,
190 int offset, int words);
190static void fxp_autosize_eeprom(struct fxp_softc *sc);
191static void fxp_read_eeprom(struct fxp_softc *sc, u_short *data,
192 int offset, int words);
193static void fxp_write_eeprom(struct fxp_softc *sc, u_short *data,
194 int offset, int words);
191static int fxp_ifmedia_upd(struct ifnet *ifp);
192static void fxp_ifmedia_sts(struct ifnet *ifp,
193 struct ifmediareq *ifmr);
194static int fxp_serial_ifmedia_upd(struct ifnet *ifp);
195static void fxp_serial_ifmedia_sts(struct ifnet *ifp,
196 struct ifmediareq *ifmr);
197static volatile int fxp_miibus_readreg(device_t dev, int phy, int reg);
198static void fxp_miibus_writereg(device_t dev, int phy, int reg,

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256static __inline void
257fxp_scb_wait(struct fxp_softc *sc)
258{
259 int i = 10000;
260
261 while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i)
262 DELAY(2);
263 if (i == 0)
195static int fxp_ifmedia_upd(struct ifnet *ifp);
196static void fxp_ifmedia_sts(struct ifnet *ifp,
197 struct ifmediareq *ifmr);
198static int fxp_serial_ifmedia_upd(struct ifnet *ifp);
199static void fxp_serial_ifmedia_sts(struct ifnet *ifp,
200 struct ifmediareq *ifmr);
201static volatile int fxp_miibus_readreg(device_t dev, int phy, int reg);
202static void fxp_miibus_writereg(device_t dev, int phy, int reg,

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260static __inline void
261fxp_scb_wait(struct fxp_softc *sc)
262{
263 int i = 10000;
264
265 while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i)
266 DELAY(2);
267 if (i == 0)
264 device_printf(sc->dev, "SCB timeout: 0x%x, 0x%x, 0x%x 0x%x\n",
268 device_printf(sc->dev, "SCB timeout: 0x%x 0x%x 0x%x 0x%x\n",
265 CSR_READ_1(sc, FXP_CSR_SCB_COMMAND),
266 CSR_READ_1(sc, FXP_CSR_SCB_STATACK),
267 CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS),
268 CSR_READ_2(sc, FXP_CSR_FLOWCONTROL));
269}
270
271static __inline void
272fxp_scb_cmd(struct fxp_softc *sc, int cmd)

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474 * differentiate between a 82557 and greater.
475 */
476 fxp_read_eeprom(sc, &data, 5, 1);
477 if ((data >> 8) == 1)
478 sc->chip = FXP_CHIP_82557;
479
480 /*
481 * Enable workarounds for certain chip revision deficiencies.
269 CSR_READ_1(sc, FXP_CSR_SCB_COMMAND),
270 CSR_READ_1(sc, FXP_CSR_SCB_STATACK),
271 CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS),
272 CSR_READ_2(sc, FXP_CSR_FLOWCONTROL));
273}
274
275static __inline void
276fxp_scb_cmd(struct fxp_softc *sc, int cmd)

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478 * differentiate between a 82557 and greater.
479 */
480 fxp_read_eeprom(sc, &data, 5, 1);
481 if ((data >> 8) == 1)
482 sc->chip = FXP_CHIP_82557;
483
484 /*
485 * Enable workarounds for certain chip revision deficiencies.
486 *
487 * Systems based on the ICH2/ICH2-M chip from Intel have a defect
488 * where the chip can cause a PCI protocol violation if it receives
489 * a CU_RESUME command when it is entering the IDLE state. The
490 * workaround is to disable Dynamic Standby Mode, so the chip never
491 * deasserts CLKRUN#, and always remains in an active state.
492 *
493 * See Intel 82801BA/82801BAM Specification Update, Errata #30.
482 */
483 i = pci_get_device(dev);
494 */
495 i = pci_get_device(dev);
484 if (i == 0x2449 || (i > 0x1030 && i < 0x1039))
485 sc->flags |= FXP_FLAG_CU_RESUME_BUG;
496 if (i == 0x2449 || (i > 0x1030 && i < 0x1039)) {
497 fxp_read_eeprom(sc, &data, 10, 1);
498 if (data & 0x02) { /* STB enable */
499 u_int16_t cksum;
500 int i;
486
501
502 device_printf(dev,
503 "*** DISABLING DYNAMIC STANDBY MODE IN EEPROM ***\n");
504 data &= ~0x02;
505 fxp_write_eeprom(sc, &data, 10, 1);
506 device_printf(dev, "New EEPROM ID: 0x%x\n", data);
507 cksum = 0;
508 for (i = 0; i < (1 << sc->eeprom_size) - 1; i++) {
509 fxp_read_eeprom(sc, &data, i, 1);
510 cksum += data;
511 }
512 i = (1 << sc->eeprom_size) - 1;
513 cksum = 0xBABA - cksum;
514 fxp_read_eeprom(sc, &data, i, 1);
515 fxp_write_eeprom(sc, &cksum, i, 1);
516 device_printf(dev,
517 "EEPROM checksum @ 0x%x: 0x%x -> 0x%x\n",
518 i, data, cksum);
519 /*
520 * We need to do a full PCI reset here. A software
521 * reset to the port doesn't cut it, but let's try
522 * anyway.
523 */
524 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET);
525 DELAY(50);
526 device_printf(dev,
527 "*** PLEASE REBOOT THE SYSTEM NOW FOR CORRECT OPERATION ***\n");
528#if 1
529 /*
530 * If the user elects to continue, try the software
531 * workaround, as it is better than nothing.
532 */
533 sc->flags |= FXP_FLAG_CU_RESUME_BUG;
534#endif
535 }
536 }
537
487 /*
488 * If we are not a 82557 chip, we can enable extended features.
489 */
490 if (sc->chip != FXP_CHIP_82557) {
491 /*
492 * If MWI is enabled in the PCI configuration, and there
493 * is a valid cacheline size (8 or 16 dwords), then tell
494 * the board to turn on MWI.

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734 fxp_init(sc);
735
736 sc->suspended = 0;
737
738 splx(s);
739 return (0);
740}
741
538 /*
539 * If we are not a 82557 chip, we can enable extended features.
540 */
541 if (sc->chip != FXP_CHIP_82557) {
542 /*
543 * If MWI is enabled in the PCI configuration, and there
544 * is a valid cacheline size (8 or 16 dwords), then tell
545 * the board to turn on MWI.

--- 239 unchanged lines hidden (view full) ---

785 fxp_init(sc);
786
787 sc->suspended = 0;
788
789 splx(s);
790 return (0);
791}
792
793static void
794fxp_eeprom_shiftin(struct fxp_softc *sc, int data, int length)
795{
796 u_int16_t reg;
797 int x;
798
799 /*
800 * Shift in data.
801 */
802 for (x = 1 << (length - 1); x; x >>= 1) {
803 if (data & x)
804 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
805 else
806 reg = FXP_EEPROM_EECS;
807 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
808 DELAY(1);
809 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK);
810 DELAY(1);
811 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
812 DELAY(1);
813 }
814}
815
742/*
743 * Read from the serial EEPROM. Basically, you manually shift in
744 * the read opcode (one bit at a time) and then shift in the address,
745 * and then you shift out the data (all of this one bit at a time).
746 * The word size is 16 bits, so you have to provide the address for
747 * every 16 bits of data.
748 */
749static u_int16_t
750fxp_eeprom_getword(struct fxp_softc *sc, int offset, int autosize)
751{
752 u_int16_t reg, data;
753 int x;
754
755 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
756 /*
757 * Shift in read opcode.
758 */
816/*
817 * Read from the serial EEPROM. Basically, you manually shift in
818 * the read opcode (one bit at a time) and then shift in the address,
819 * and then you shift out the data (all of this one bit at a time).
820 * The word size is 16 bits, so you have to provide the address for
821 * every 16 bits of data.
822 */
823static u_int16_t
824fxp_eeprom_getword(struct fxp_softc *sc, int offset, int autosize)
825{
826 u_int16_t reg, data;
827 int x;
828
829 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
830 /*
831 * Shift in read opcode.
832 */
759 for (x = 1 << 2; x; x >>= 1) {
760 if (FXP_EEPROM_OPC_READ & x)
761 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
762 else
763 reg = FXP_EEPROM_EECS;
764 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
765 DELAY(1);
766 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK);
767 DELAY(1);
768 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
769 DELAY(1);
770 }
833 fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_READ, 3);
771 /*
772 * Shift in address.
773 */
774 data = 0;
775 for (x = 1 << (sc->eeprom_size - 1); x; x >>= 1) {
776 if (offset & x)
777 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
778 else

--- 25 unchanged lines hidden (view full) ---

804 DELAY(1);
805 }
806 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
807 DELAY(1);
808
809 return (data);
810}
811
834 /*
835 * Shift in address.
836 */
837 data = 0;
838 for (x = 1 << (sc->eeprom_size - 1); x; x >>= 1) {
839 if (offset & x)
840 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
841 else

--- 25 unchanged lines hidden (view full) ---

867 DELAY(1);
868 }
869 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
870 DELAY(1);
871
872 return (data);
873}
874
875static void
876fxp_eeprom_putword(struct fxp_softc *sc, int offset, u_int16_t data)
877{
878 int i;
879
880 /*
881 * Erase/write enable.
882 */
883 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
884 fxp_eeprom_shiftin(sc, 0x4, 3);
885 fxp_eeprom_shiftin(sc, 0x03 << (sc->eeprom_size - 2), sc->eeprom_size);
886 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
887 DELAY(1);
888 /*
889 * Shift in write opcode, address, data.
890 */
891 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
892 fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_WRITE, 3);
893 fxp_eeprom_shiftin(sc, offset, sc->eeprom_size);
894 fxp_eeprom_shiftin(sc, data, 16);
895 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
896 DELAY(1);
897 /*
898 * Wait for EEPROM to finish up.
899 */
900 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
901 DELAY(1);
902 for (i = 0; i < 1000; i++) {
903 if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO)
904 break;
905 DELAY(50);
906 }
907 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
908 DELAY(1);
909 /*
910 * Erase/write disable.
911 */
912 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
913 fxp_eeprom_shiftin(sc, 0x4, 3);
914 fxp_eeprom_shiftin(sc, 0, sc->eeprom_size);
915 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
916 DELAY(1);
917}
918
812/*
813 * From NetBSD:
814 *
815 * Figure out EEPROM size.
816 *
817 * 559's can have either 64-word or 256-word EEPROMs, the 558
818 * datasheet only talks about 64-word EEPROMs, and the 557 datasheet
819 * talks about the existance of 16 to 256 word EEPROMs.
820 *
821 * The only known sizes are 64 and 256, where the 256 version is used
822 * by CardBus cards to store CIS information.
823 *
824 * The address is shifted in msb-to-lsb, and after the last
825 * address-bit the EEPROM is supposed to output a `dummy zero' bit,
826 * after which follows the actual data. We try to detect this zero, by
827 * probing the data-out bit in the EEPROM control register just after
828 * having shifted in a bit. If the bit is zero, we assume we've
829 * shifted enough address bits. The data-out should be tri-state,
830 * before this, which should translate to a logical one.
919/*
920 * From NetBSD:
921 *
922 * Figure out EEPROM size.
923 *
924 * 559's can have either 64-word or 256-word EEPROMs, the 558
925 * datasheet only talks about 64-word EEPROMs, and the 557 datasheet
926 * talks about the existance of 16 to 256 word EEPROMs.
927 *
928 * The only known sizes are 64 and 256, where the 256 version is used
929 * by CardBus cards to store CIS information.
930 *
931 * The address is shifted in msb-to-lsb, and after the last
932 * address-bit the EEPROM is supposed to output a `dummy zero' bit,
933 * after which follows the actual data. We try to detect this zero, by
934 * probing the data-out bit in the EEPROM control register just after
935 * having shifted in a bit. If the bit is zero, we assume we've
936 * shifted enough address bits. The data-out should be tri-state,
937 * before this, which should translate to a logical one.
831 *
832 * Other ways to do this would be to try to read a register with known
833 * contents with a varying number of address bits, but no such
834 * register seem to be available. The high bits of register 10 are 01
835 * on the 558 and 559, but apparently not on the 557.
836 *
837 * The Linux driver computes a checksum on the EEPROM data, but the
838 * value of this checksum is not very well documented.
839 */
840static void
841fxp_autosize_eeprom(struct fxp_softc *sc)
842{
843
844 /* guess maximum size of 256 words */
845 sc->eeprom_size = 8;
846

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852fxp_read_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words)
853{
854 int i;
855
856 for (i = 0; i < words; i++)
857 data[i] = fxp_eeprom_getword(sc, offset + i, 0);
858}
859
938 */
939static void
940fxp_autosize_eeprom(struct fxp_softc *sc)
941{
942
943 /* guess maximum size of 256 words */
944 sc->eeprom_size = 8;
945

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951fxp_read_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words)
952{
953 int i;
954
955 for (i = 0; i < words; i++)
956 data[i] = fxp_eeprom_getword(sc, offset + i, 0);
957}
958
959static void
960fxp_write_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words)
961{
962 int i;
963
964 for (i = 0; i < words; i++)
965 fxp_eeprom_putword(sc, offset + i, data[i]);
966}
967
860/*
861 * Start packet transmission on the interface.
862 */
863static void
864fxp_start(struct ifnet *ifp)
865{
866 struct fxp_softc *sc = ifp->if_softc;
867 struct fxp_cb_tx *txp;

--- 393 unchanged lines hidden (view full) ---

1261 */
1262static void
1263fxp_stop(struct fxp_softc *sc)
1264{
1265 struct ifnet *ifp = &sc->sc_if;
1266 struct fxp_cb_tx *txp;
1267 int i;
1268
968/*
969 * Start packet transmission on the interface.
970 */
971static void
972fxp_start(struct ifnet *ifp)
973{
974 struct fxp_softc *sc = ifp->if_softc;
975 struct fxp_cb_tx *txp;

--- 393 unchanged lines hidden (view full) ---

1369 */
1370static void
1371fxp_stop(struct fxp_softc *sc)
1372{
1373 struct ifnet *ifp = &sc->sc_if;
1374 struct fxp_cb_tx *txp;
1375 int i;
1376
1269
1270 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1271 ifp->if_timer = 0;
1272
1273 /*
1274 * Cancel stats updater.
1275 */
1276 untimeout(fxp_tick, sc, sc->stat_ch);
1277

--- 648 unchanged lines hidden --- 		1377 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1378 ifp->if_timer = 0;
1379
1380 /*
1381 * Cancel stats updater.
1382 */
1383 untimeout(fxp_tick, sc, sc->stat_ch);
1384

--- 648 unchanged lines hidden ---