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esp_sbus.c (145201) esp_sbus.c (146392)
1/*-
2 * Copyright (c) 2004 Scott Long
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 51 unchanged lines hidden (view full) ---

60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
64 * POSSIBILITY OF SUCH DAMAGE.
65 */
66
67#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2004 Scott Long
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 51 unchanged lines hidden (view full) ---

60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
64 * POSSIBILITY OF SUCH DAMAGE.
65 */
66
67#include <sys/cdefs.h>
68__FBSDID("$FreeBSD: head/sys/dev/esp/esp_sbus.c 145201 2005-04-17 17:42:36Z marius $");
68__FBSDID("$FreeBSD: head/sys/dev/esp/esp_sbus.c 146392 2005-05-19 14:51:10Z marius $");
69
70#include <sys/param.h>
71#include <sys/systm.h>
72#include <sys/bus.h>
73#include <sys/kernel.h>
74#include <sys/module.h>
75#include <sys/resource.h>
76

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104
105 int sc_irqrid;
106 struct resource *sc_irqres;
107 void *sc_irq;
108
109 struct lsi64854_softc *sc_dma; /* pointer to my DMA */
110};
111
69
70#include <sys/param.h>
71#include <sys/systm.h>
72#include <sys/bus.h>
73#include <sys/kernel.h>
74#include <sys/module.h>
75#include <sys/resource.h>
76

--- 27 unchanged lines hidden (view full) ---

104
105 int sc_irqrid;
106 struct resource *sc_irqres;
107 void *sc_irq;
108
109 struct lsi64854_softc *sc_dma; /* pointer to my DMA */
110};
111
112static int esp_sbus_probe(device_t);
112static devclass_t esp_devclass;
113
114static int esp_probe(device_t);
115static int esp_dma_attach(device_t);
116static int esp_dma_detach(device_t);
113static int esp_sbus_attach(device_t);
114static int esp_sbus_detach(device_t);
117static int esp_sbus_attach(device_t);
118static int esp_sbus_detach(device_t);
115static int esp_sbus_suspend(device_t);
116static int esp_sbus_resume(device_t);
119static int esp_suspend(device_t);
120static int esp_resume(device_t);
117
121
122static device_method_t esp_dma_methods[] = {
123 DEVMETHOD(device_probe, esp_probe),
124 DEVMETHOD(device_attach, esp_dma_attach),
125 DEVMETHOD(device_detach, esp_dma_detach),
126 DEVMETHOD(device_suspend, esp_suspend),
127 DEVMETHOD(device_resume, esp_resume),
128 {0, 0}
129};
130
131static driver_t esp_dma_driver = {
132 "esp",
133 esp_dma_methods,
134 sizeof(struct esp_softc)
135};
136
137DRIVER_MODULE(esp, dma, esp_dma_driver, esp_devclass, 0, 0);
138
118static device_method_t esp_sbus_methods[] = {
139static device_method_t esp_sbus_methods[] = {
119 DEVMETHOD(device_probe, esp_sbus_probe),
140 DEVMETHOD(device_probe, esp_probe),
120 DEVMETHOD(device_attach, esp_sbus_attach),
121 DEVMETHOD(device_detach, esp_sbus_detach),
141 DEVMETHOD(device_attach, esp_sbus_attach),
142 DEVMETHOD(device_detach, esp_sbus_detach),
122 DEVMETHOD(device_suspend, esp_sbus_suspend),
123 DEVMETHOD(device_resume, esp_sbus_resume),
143 DEVMETHOD(device_suspend, esp_suspend),
144 DEVMETHOD(device_resume, esp_resume),
124 {0, 0}
125};
126
127static driver_t esp_sbus_driver = {
128 "esp",
129 esp_sbus_methods,
130 sizeof(struct esp_softc)
131};
132
145 {0, 0}
146};
147
148static driver_t esp_sbus_driver = {
149 "esp",
150 esp_sbus_methods,
151 sizeof(struct esp_softc)
152};
153
133static devclass_t esp_devclass;
134DRIVER_MODULE(esp, sbus, esp_sbus_driver, esp_devclass, 0, 0);
135
136/*
137 * Functions and the switch for the MI code.
138 */
139static u_char esp_read_reg(struct ncr53c9x_softc *, int);
140static void esp_write_reg(struct ncr53c9x_softc *, int, u_char);
141static int esp_dma_isintr(struct ncr53c9x_softc *);
142static void esp_dma_reset(struct ncr53c9x_softc *);
143static int esp_dma_intr(struct ncr53c9x_softc *);
144static int esp_dma_setup(struct ncr53c9x_softc *, caddr_t *, size_t *,
145 int, size_t *);
146static void esp_dma_go(struct ncr53c9x_softc *);
147static void esp_dma_stop(struct ncr53c9x_softc *);
148static int esp_dma_isactive(struct ncr53c9x_softc *);
154DRIVER_MODULE(esp, sbus, esp_sbus_driver, esp_devclass, 0, 0);
155
156/*
157 * Functions and the switch for the MI code.
158 */
159static u_char esp_read_reg(struct ncr53c9x_softc *, int);
160static void esp_write_reg(struct ncr53c9x_softc *, int, u_char);
161static int esp_dma_isintr(struct ncr53c9x_softc *);
162static void esp_dma_reset(struct ncr53c9x_softc *);
163static int esp_dma_intr(struct ncr53c9x_softc *);
164static int esp_dma_setup(struct ncr53c9x_softc *, caddr_t *, size_t *,
165 int, size_t *);
166static void esp_dma_go(struct ncr53c9x_softc *);
167static void esp_dma_stop(struct ncr53c9x_softc *);
168static int esp_dma_isactive(struct ncr53c9x_softc *);
149static void espattach(struct esp_softc *, struct ncr53c9x_glue *);
169static int espattach(struct esp_softc *, struct ncr53c9x_glue *);
150
151static struct ncr53c9x_glue esp_sbus_glue = {
152 esp_read_reg,
153 esp_write_reg,
154 esp_dma_isintr,
155 esp_dma_reset,
156 esp_dma_intr,
157 esp_dma_setup,
158 esp_dma_go,
159 esp_dma_stop,
160 esp_dma_isactive,
161 NULL, /* gl_clear_latched_intr */
162};
163
164static int
170
171static struct ncr53c9x_glue esp_sbus_glue = {
172 esp_read_reg,
173 esp_write_reg,
174 esp_dma_isintr,
175 esp_dma_reset,
176 esp_dma_intr,
177 esp_dma_setup,
178 esp_dma_go,
179 esp_dma_stop,
180 esp_dma_isactive,
181 NULL, /* gl_clear_latched_intr */
182};
183
184static int
165esp_sbus_probe(device_t dev)
185esp_probe(device_t dev)
166{
167 const char *name;
168
169 name = ofw_bus_get_name(dev);
170 if (strcmp("SUNW,fas", name) == 0) {
171 device_set_desc(dev, "Sun FAS366 Fast-Wide SCSI");
172 return (BUS_PROBE_DEFAULT);
186{
187 const char *name;
188
189 name = ofw_bus_get_name(dev);
190 if (strcmp("SUNW,fas", name) == 0) {
191 device_set_desc(dev, "Sun FAS366 Fast-Wide SCSI");
192 return (BUS_PROBE_DEFAULT);
193 } else if (strcmp("esp", name) == 0) {
194 device_set_desc(dev, "Sun ESP SCSI/Sun FAS Fast-SCSI");
195 return (BUS_PROBE_DEFAULT);
173 }
174
175 return (ENXIO);
176}
177
178static int
179esp_sbus_attach(device_t dev)
180{
181 struct esp_softc *esc;
182 struct ncr53c9x_softc *sc;
183 struct lsi64854_softc *lsc;
196 }
197
198 return (ENXIO);
199}
200
201static int
202esp_sbus_attach(device_t dev)
203{
204 struct esp_softc *esc;
205 struct ncr53c9x_softc *sc;
206 struct lsi64854_softc *lsc;
207 device_t *children;
208 const char *name;
184 phandle_t node;
209 phandle_t node;
185 int burst;
210 int burst, error, i, nchildren, slot;
186
187 esc = device_get_softc(dev);
188 bzero(esc, sizeof(struct esp_softc));
189 sc = &esc->sc_ncr53c9x;
190
211
212 esc = device_get_softc(dev);
213 bzero(esc, sizeof(struct esp_softc));
214 sc = &esc->sc_ncr53c9x;
215
216 lsc = NULL;
191 esc->sc_dev = dev;
217 esc->sc_dev = dev;
218 name = ofw_bus_get_name(dev);
192 node = ofw_bus_get_node(dev);
193 if (OF_getprop(node, "initiator-id", &sc->sc_id,
194 sizeof(sc->sc_id)) == -1)
195 sc->sc_id = 7;
219 node = ofw_bus_get_node(dev);
220 if (OF_getprop(node, "initiator-id", &sc->sc_id,
221 sizeof(sc->sc_id)) == -1)
222 sc->sc_id = 7;
196 if (OF_getprop(node, "clock-frequency", &sc->sc_freq,
197 sizeof(sc->sc_freq)) == -1) {
198 printf("failed to query OFW for clock-frequency\n");
199 sc->sc_freq = sbus_get_clockfreq(dev);
200 }
223 sc->sc_freq = sbus_get_clockfreq(dev);
201
202#ifdef ESP_SBUS_DEBUG
203 device_printf(dev, "%s: sc_id %d, freq %d\n", __func__, sc->sc_id,
204 sc->sc_freq);
205#endif
206
224
225#ifdef ESP_SBUS_DEBUG
226 device_printf(dev, "%s: sc_id %d, freq %d\n", __func__, sc->sc_id,
227 sc->sc_freq);
228#endif
229
207 /*
208 * allocate space for DMA, in SUNW,fas there are no separate
209 * DMA devices
210 */
211 lsc = malloc(sizeof (struct lsi64854_softc), M_DEVBUF,
212 M_NOWAIT | M_ZERO);
213 if (lsc == NULL) {
214 device_printf(dev, "out of memory (lsi64854_softc)\n");
215 return (ENOMEM);
216 }
217 esc->sc_dma = lsc;
230 if (strcmp(name, "SUNW,fas") == 0) {
231 /*
232 * Allocate space for DMA, in SUNW,fas there are no
233 * separate DMA devices.
234 */
235 lsc = malloc(sizeof (struct lsi64854_softc), M_DEVBUF,
236 M_NOWAIT | M_ZERO);
237 if (lsc == NULL) {
238 device_printf(dev, "out of memory (lsi64854_softc)\n");
239 return (ENOMEM);
240 }
241 esc->sc_dma = lsc;
218
242
219 /*
220 * fas has 2 register spaces: DMA (lsi64854) and SCSI core (ncr53c9x)
221 */
243 /*
244 * SUNW,fas have 2 register spaces: DMA (lsi64854) and
245 * SCSI core (ncr53c9x).
246 */
222
247
223 /* allocate DMA registers */
224 lsc->sc_rid = 0;
225 if ((lsc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
226 &lsc->sc_rid, RF_ACTIVE)) == NULL) {
227 device_printf(dev, "cannot allocate DMA registers\n");
228 free(lsc, M_DEVBUF);
229 return (ENXIO);
230 }
231 lsc->sc_regt = rman_get_bustag(lsc->sc_res);
232 lsc->sc_regh = rman_get_bushandle(lsc->sc_res);
248 /* Allocate DMA registers. */
249 lsc->sc_rid = 0;
250 if ((lsc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
251 &lsc->sc_rid, RF_ACTIVE)) == NULL) {
252 device_printf(dev, "cannot allocate DMA registers\n");
253 error = ENXIO;
254 goto fail_sbus_lsc;
255 }
256 lsc->sc_regt = rman_get_bustag(lsc->sc_res);
257 lsc->sc_regh = rman_get_bushandle(lsc->sc_res);
233
258
234 /* Create a parent DMA tag based on this bus */
235 if (bus_dma_tag_create(
236 NULL, /* parent */
237 PAGE_SIZE, 0, /* alignment, boundary */
238 BUS_SPACE_MAXADDR, /* lowaddr */
239 BUS_SPACE_MAXADDR, /* highaddr */
240 NULL, NULL, /* filter, filterarg */
241 BUS_SPACE_MAXSIZE_32BIT, /* maxsize */
242 0, /* nsegments */
243 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
244 0, /* flags */
245 NULL, NULL, /* no locking */
246 &lsc->sc_parent_dmat)) {
247 device_printf(dev, "cannot allocate parent DMA tag\n");
248 free(lsc, M_DEVBUF);
249 return (ENOMEM);
250 }
251 burst = sbus_get_burstsz(dev);
259 /* Create a parent DMA tag based on this bus. */
260 error = bus_dma_tag_create(
261 NULL, /* parent */
262 PAGE_SIZE, 0, /* alignment, boundary */
263 BUS_SPACE_MAXADDR, /* lowaddr */
264 BUS_SPACE_MAXADDR, /* highaddr */
265 NULL, NULL, /* filter, filterarg */
266 BUS_SPACE_MAXSIZE_32BIT, /* maxsize */
267 0, /* nsegments */
268 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
269 0, /* flags */
270 NULL, NULL, /* no locking */
271 &lsc->sc_parent_dmat);
272 if (error != 0) {
273 device_printf(dev, "cannot allocate parent DMA tag\n");
274 goto fail_sbus_lres;
275 }
276 burst = sbus_get_burstsz(dev);
252
253#ifdef ESP_SBUS_DEBUG
277
278#ifdef ESP_SBUS_DEBUG
254 printf("%s: burst 0x%x\n", __func__, burst);
279 printf("%s: burst 0x%x\n", __func__, burst);
255#endif
256
280#endif
281
257 lsc->sc_burst = (burst & SBUS_BURST_32) ? 32 :
258 (burst & SBUS_BURST_16) ? 16 : 0;
282 lsc->sc_burst = (burst & SBUS_BURST_32) ? 32 :
283 (burst & SBUS_BURST_16) ? 16 : 0;
259
284
260 lsc->sc_channel = L64854_CHANNEL_SCSI;
261 lsc->sc_client = sc;
262 lsc->sc_dev = dev;
285 lsc->sc_channel = L64854_CHANNEL_SCSI;
286 lsc->sc_client = sc;
287 lsc->sc_dev = dev;
263
288
264 lsi64854_attach(lsc);
289 error = lsi64854_attach(lsc);
290 if (error != 0) {
291 device_printf(dev, "lsi64854_attach failed\n");
292 goto fail_sbus_lpdma;
293 }
265
294
295 /*
296 * Allocate SCSI core registers.
297 */
298 esc->sc_rid = 1;
299 if ((esc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
300 &esc->sc_rid, RF_ACTIVE)) == NULL) {
301 device_printf(dev,
302 "cannot allocate SCSI core registers\n");
303 error = ENXIO;
304 goto fail_sbus_lsi;
305 }
306 esc->sc_regt = rman_get_bustag(esc->sc_res);
307 esc->sc_regh = rman_get_bushandle(esc->sc_res);
308 } else {
309 /*
310 * Search accompanying DMA engine. It should have been
311 * already attached otherwise there isn't much we can do.
312 */
313 if (device_get_children(device_get_parent(dev), &children,
314 &nchildren) != 0) {
315 device_printf(dev, "cannot determine siblings\n");
316 return (ENXIO);
317 }
318 slot = sbus_get_slot(dev);
319 for (i = 0; i < nchildren; i++) {
320 if (device_is_attached(children[i]) &&
321 sbus_get_slot(children[i]) == slot &&
322 strcmp(ofw_bus_get_name(children[i]), "dma") == 0) {
323 /* XXX hackery */
324 esc->sc_dma = (struct lsi64854_softc *)
325 device_get_softc(children[i]);
326 break;
327 }
328 }
329 free(children, M_TEMP);
330 if (esc->sc_dma == NULL) {
331 device_printf(dev, "cannot find DMA engine\n");
332 return (ENXIO);
333 }
334 esc->sc_dma->sc_client = sc;
335
336 /*
337 * Allocate SCSI core registers.
338 */
339 esc->sc_rid = 0;
340 if ((esc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
341 &esc->sc_rid, RF_ACTIVE)) == NULL) {
342 device_printf(dev,
343 "cannot allocate SCSI core registers\n");
344 return (ENXIO);
345 }
346 esc->sc_regt = rman_get_bustag(esc->sc_res);
347 esc->sc_regh = rman_get_bushandle(esc->sc_res);
348 }
349
350 error = espattach(esc, &esp_sbus_glue);
351 if (error != 0) {
352 device_printf(dev, "espattach failed\n");
353 goto fail_sbus_eres;
354 }
355
356 return (0);
357
358 fail_sbus_eres:
359 bus_release_resource(dev, SYS_RES_MEMORY, esc->sc_rid, esc->sc_res);
360 if (strcmp(name, "SUNW,fas") != 0)
361 return (error);
362 fail_sbus_lsi:
363 lsi64854_detach(lsc);
364 fail_sbus_lpdma:
365 bus_dma_tag_destroy(lsc->sc_parent_dmat);
366 fail_sbus_lres:
367 bus_release_resource(dev, SYS_RES_MEMORY, lsc->sc_rid, lsc->sc_res);
368 fail_sbus_lsc:
369 free(lsc, M_DEVBUF);
370 return (error);
371}
372
373static int
374esp_sbus_detach(device_t dev)
375{
376 struct esp_softc *esc;
377 struct ncr53c9x_softc *sc;
378 struct lsi64854_softc *lsc;
379 int error;
380
381 esc = device_get_softc(dev);
382 sc = &esc->sc_ncr53c9x;
383 lsc = esc->sc_dma;
384
385 bus_teardown_intr(esc->sc_dev, esc->sc_irqres, esc->sc_irq);
386 error = ncr53c9x_detach(sc);
387 if (error != 0)
388 return (error);
389 bus_release_resource(esc->sc_dev, SYS_RES_IRQ, esc->sc_irqrid,
390 esc->sc_irqres);
391 bus_release_resource(dev, SYS_RES_MEMORY, esc->sc_rid, esc->sc_res);
392 if (strcmp(ofw_bus_get_name(dev), "SUNW,fas") != 0)
393 return (0);
394 error = lsi64854_detach(lsc);
395 if (error != 0)
396 return (error);
397 bus_dma_tag_destroy(lsc->sc_parent_dmat);
398 bus_release_resource(dev, SYS_RES_MEMORY, lsc->sc_rid, lsc->sc_res);
399 free(lsc, M_DEVBUF);
400
401 return (0);
402}
403
404static int
405esp_dma_attach(device_t dev)
406{
407 struct esp_softc *esc;
408 struct ncr53c9x_softc *sc;
409 phandle_t node;
410 int error;
411
412 esc = device_get_softc(dev);
413 bzero(esc, sizeof(struct esp_softc));
414 sc = &esc->sc_ncr53c9x;
415
416 esc->sc_dev = dev;
417 node = ofw_bus_get_node(dev);
418 if (OF_getprop(node, "initiator-id", &sc->sc_id,
419 sizeof(sc->sc_id)) == -1)
420 sc->sc_id = 7;
421 if (OF_getprop(node, "clock-frequency", &sc->sc_freq,
422 sizeof(sc->sc_freq)) == -1) {
423 printf("failed to query OFW for clock-frequency\n");
424 return (ENXIO);
425 }
426
427#ifdef ESP_SBUS_DEBUG
428 device_printf(dev, "%s: sc_id %d, freq %d\n", __func__, sc->sc_id,
429 sc->sc_freq);
430#endif
431
432 /* XXX hackery */
433 esc->sc_dma = (struct lsi64854_softc *)
434 device_get_softc(device_get_parent(dev));
435 esc->sc_dma->sc_client = sc;
436
266 /*
437 /*
267 * allocate SCSI core registers
438 * Allocate SCSI core registers.
268 */
439 */
269 esc->sc_rid = 1;
440 esc->sc_rid = 0;
270 if ((esc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
271 &esc->sc_rid, RF_ACTIVE)) == NULL) {
272 device_printf(dev, "cannot allocate SCSI core registers\n");
441 if ((esc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
442 &esc->sc_rid, RF_ACTIVE)) == NULL) {
443 device_printf(dev, "cannot allocate SCSI core registers\n");
273 free(lsc, M_DEVBUF);
274 return (ENXIO);
275 }
276 esc->sc_regt = rman_get_bustag(esc->sc_res);
277 esc->sc_regh = rman_get_bushandle(esc->sc_res);
278
444 return (ENXIO);
445 }
446 esc->sc_regt = rman_get_bustag(esc->sc_res);
447 esc->sc_regh = rman_get_bushandle(esc->sc_res);
448
279 espattach(esc, &esp_sbus_glue);
449 error = espattach(esc, &esp_sbus_glue);
450 if (error != 0) {
451 device_printf(dev, "espattach failed\n");
452 goto fail_dma_eres;
453 }
280
281 return (0);
454
455 return (0);
456
457 fail_dma_eres:
458 bus_release_resource(dev, SYS_RES_MEMORY, esc->sc_rid, esc->sc_res);
459 return (error);
282}
283
284static int
460}
461
462static int
285esp_sbus_detach(device_t dev)
463esp_dma_detach(device_t dev)
286{
464{
287 struct ncr53c9x_softc *sc;
288 struct esp_softc *esc;
465 struct esp_softc *esc;
466 struct ncr53c9x_softc *sc;
467 int error;
289
290 esc = device_get_softc(dev);
291 sc = &esc->sc_ncr53c9x;
468
469 esc = device_get_softc(dev);
470 sc = &esc->sc_ncr53c9x;
292 return (ncr53c9x_detach(sc, 0));
471
472 bus_teardown_intr(esc->sc_dev, esc->sc_irqres, esc->sc_irq);
473 error = ncr53c9x_detach(sc);
474 if (error != 0)
475 return (error);
476 bus_release_resource(esc->sc_dev, SYS_RES_IRQ, esc->sc_irqrid,
477 esc->sc_irqres);
478 bus_release_resource(dev, SYS_RES_MEMORY, esc->sc_rid, esc->sc_res);
479
480 return (0);
293}
294
295static int
481}
482
483static int
296esp_sbus_suspend(device_t dev)
484esp_suspend(device_t dev)
297{
298
299 return (ENXIO);
300}
301
302static int
485{
486
487 return (ENXIO);
488}
489
490static int
303esp_sbus_resume(device_t dev)
491esp_resume(device_t dev)
304{
305
306 return (ENXIO);
307}
308
309/*
310 * Attach this instance, and then all the sub-devices
311 */
492{
493
494 return (ENXIO);
495}
496
497/*
498 * Attach this instance, and then all the sub-devices
499 */
312static void
500static int
313espattach(struct esp_softc *esc, struct ncr53c9x_glue *gluep)
314{
315 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
316 unsigned int uid = 0;
501espattach(struct esp_softc *esc, struct ncr53c9x_glue *gluep)
502{
503 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
504 unsigned int uid = 0;
505 int error;
317
318 /*
506
507 /*
508 * The `ESC' DMA chip must be reset before we can access
509 * the ESP registers.
510 */
511 if (esc->sc_dma->sc_rev == DMAREV_ESC)
512 DMA_RESET(esc->sc_dma);
513
514 /*
319 * Set up glue for MI code early; we use some of it here.
320 */
321 sc->sc_glue = gluep;
322
323 /* gimme MHz */
324 sc->sc_freq /= 1000000;
325
326 /*
327 * XXX More of this should be in ncr53c9x_attach(), but
328 * XXX should we really poke around the chip that much in
329 * XXX the MI code? Think about this more...
330 */
331
332 /*
515 * Set up glue for MI code early; we use some of it here.
516 */
517 sc->sc_glue = gluep;
518
519 /* gimme MHz */
520 sc->sc_freq /= 1000000;
521
522 /*
523 * XXX More of this should be in ncr53c9x_attach(), but
524 * XXX should we really poke around the chip that much in
525 * XXX the MI code? Think about this more...
526 */
527
528 /*
529 * Read the part-unique ID code of the SCSI chip. The contained
530 * value is only valid if all of the following conditions are met:
531 * - After power-up or chip reset.
532 * - Before any value is written to this register.
533 * - The NCRCFG2_FE bit is set.
534 * - A (NCRCMD_NOP | NCRCMD_DMA) command has been issued.
535 */
536 NCRCMD(sc, NCRCMD_RSTCHIP);
537 NCRCMD(sc, NCRCMD_NOP);
538 sc->sc_cfg2 = NCRCFG2_FE;
539 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
540 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
541 uid = NCR_READ_REG(sc, NCR_UID);
542
543 /*
333 * It is necessary to try to load the 2nd config register here,
334 * to find out what rev the esp chip is, else the ncr53c9x_reset
335 * will not set up the defaults correctly.
336 */
337 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
544 * It is necessary to try to load the 2nd config register here,
545 * to find out what rev the esp chip is, else the ncr53c9x_reset
546 * will not set up the defaults correctly.
547 */
548 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
549 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
550 sc->sc_cfg2 = 0;
551 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
338 sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_RPE;
552 sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_RPE;
339 sc->sc_cfg3 = NCRCFG3_CDB;
340 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
341
342 if ((NCR_READ_REG(sc, NCR_CFG2) & ~NCRCFG2_RSVD) !=
343 (NCRCFG2_SCSI2 | NCRCFG2_RPE)) {
344 sc->sc_rev = NCR_VARIANT_ESP100;
345 } else {
346 sc->sc_cfg2 = NCRCFG2_SCSI2;
347 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);

--- 4 unchanged lines hidden (view full) ---

352 if (NCR_READ_REG(sc, NCR_CFG3) !=
353 (NCRCFG3_CDB | NCRCFG3_FCLK)) {
354 sc->sc_rev = NCR_VARIANT_ESP100A;
355 } else {
356 /* NCRCFG2_FE enables > 64K transfers */
357 sc->sc_cfg2 |= NCRCFG2_FE;
358 sc->sc_cfg3 = 0;
359 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
553 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
554
555 if ((NCR_READ_REG(sc, NCR_CFG2) & ~NCRCFG2_RSVD) !=
556 (NCRCFG2_SCSI2 | NCRCFG2_RPE)) {
557 sc->sc_rev = NCR_VARIANT_ESP100;
558 } else {
559 sc->sc_cfg2 = NCRCFG2_SCSI2;
560 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);

--- 4 unchanged lines hidden (view full) ---

565 if (NCR_READ_REG(sc, NCR_CFG3) !=
566 (NCRCFG3_CDB | NCRCFG3_FCLK)) {
567 sc->sc_rev = NCR_VARIANT_ESP100A;
568 } else {
569 /* NCRCFG2_FE enables > 64K transfers */
570 sc->sc_cfg2 |= NCRCFG2_FE;
571 sc->sc_cfg3 = 0;
572 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
360 sc->sc_rev = NCR_VARIANT_ESP200;
361
362 /*
363 * XXX spec says it's valid after power up or chip
364 * reset.
365 */
366 uid = NCR_READ_REG(sc, NCR_UID);
367 if (((uid & 0xf8) >> 3) == 0x0a) /* XXX */
368 sc->sc_rev = NCR_VARIANT_FAS366;
573 if (sc->sc_freq <= 25)
574 sc->sc_rev = NCR_VARIANT_ESP200;
575 else {
576 switch ((uid & 0xf8) >> 3) {
577 case 0x00:
578 sc->sc_rev = NCR_VARIANT_FAS100A;
579 break;
580 case 0x02:
581 if ((uid & 0x07) == 0x02)
582 sc->sc_rev = NCR_VARIANT_FAS216;
583 else
584 sc->sc_rev = NCR_VARIANT_FAS236;
585 break;
586 case 0x0a:
587 sc->sc_rev = NCR_VARIANT_FAS366;
588 break;
589 default:
590 /*
591 * We could just treat unknown chips
592 * as ESP200 but then we would most
593 * likely drive them out of specs.
594 */
595 device_printf(esc->sc_dev,
596 "Unknown chip\n");
597 return (ENXIO);
598 }
599 }
369 }
370 }
371
372#ifdef ESP_SBUS_DEBUG
373 printf("%s: revision %d, uid 0x%x\n", __func__, sc->sc_rev, uid);
374#endif
375
376 /*

--- 8 unchanged lines hidden (view full) ---

385 * in "clocks per byte", and has a minimum value of 4.
386 * The SCSI period used in negotiation is one-fourth
387 * of the time (in nanoseconds) needed to transfer one byte.
388 * Since the chip's clock is given in MHz, we have the following
389 * formula: 4 * period = (1000 / freq) * 4
390 */
391 sc->sc_minsync = 1000 / sc->sc_freq;
392
600 }
601 }
602
603#ifdef ESP_SBUS_DEBUG
604 printf("%s: revision %d, uid 0x%x\n", __func__, sc->sc_rev, uid);
605#endif
606
607 /*

--- 8 unchanged lines hidden (view full) ---

616 * in "clocks per byte", and has a minimum value of 4.
617 * The SCSI period used in negotiation is one-fourth
618 * of the time (in nanoseconds) needed to transfer one byte.
619 * Since the chip's clock is given in MHz, we have the following
620 * formula: 4 * period = (1000 / freq) * 4
621 */
622 sc->sc_minsync = 1000 / sc->sc_freq;
623
393 /* limit minsync due to unsolved performance issues */
394 sc->sc_maxsync = sc->sc_minsync;
395 sc->sc_maxoffset = 15;
624 sc->sc_maxoffset = 15;
396
397 sc->sc_extended_geom = 1;
398
399 /*
400 * Alas, we must now modify the value a bit, because it's
401 * only valid when can switch on FASTCLK and FASTSCSI bits
402 * in config register 3...
403 */
404 switch (sc->sc_rev) {
405 case NCR_VARIANT_ESP100:
406 sc->sc_maxwidth = 0;
407 sc->sc_maxxfer = 64 * 1024;
408 sc->sc_minsync = 0; /* No synch on old chip? */
409 break;
410
411 case NCR_VARIANT_ESP100A:
625 sc->sc_extended_geom = 1;
626
627 /*
628 * Alas, we must now modify the value a bit, because it's
629 * only valid when can switch on FASTCLK and FASTSCSI bits
630 * in config register 3...
631 */
632 switch (sc->sc_rev) {
633 case NCR_VARIANT_ESP100:
634 sc->sc_maxwidth = 0;
635 sc->sc_maxxfer = 64 * 1024;
636 sc->sc_minsync = 0; /* No synch on old chip? */
637 break;
638
639 case NCR_VARIANT_ESP100A:
412 sc->sc_maxwidth = 1;
640 sc->sc_maxwidth = 0;
413 sc->sc_maxxfer = 64 * 1024;
414 /* Min clocks/byte is 5 */
415 sc->sc_minsync = ncr53c9x_cpb2stp(sc, 5);
416 break;
417
418 case NCR_VARIANT_ESP200:
641 sc->sc_maxxfer = 64 * 1024;
642 /* Min clocks/byte is 5 */
643 sc->sc_minsync = ncr53c9x_cpb2stp(sc, 5);
644 break;
645
646 case NCR_VARIANT_ESP200:
647 sc->sc_maxwidth = 0;
648 sc->sc_maxxfer = 16 * 1024 * 1024;
649 /* Min clocks/byte is 5 */
650 sc->sc_minsync = ncr53c9x_cpb2stp(sc, 5);
651 break;
652
653 case NCR_VARIANT_FAS100A:
654 case NCR_VARIANT_FAS216:
655 case NCR_VARIANT_FAS236:
656 /*
657 * The onboard SCSI chips in Sun Ultra 1 are actually
658 * documented to be NCR53C9X which use NCRCFG3_FCLK and
659 * NCRCFG3_FSCSI. BSD/OS however probes these chips as
660 * FAS100A and uses NCRF9XCFG3_FCLK and NCRF9XCFG3_FSCSI
661 * instead which seems to be correct as otherwise sync
662 * negotiation just doesn't work. Using NCRF9XCFG3_FCLK
663 * and NCRF9XCFG3_FSCSI with these chips in fact also
664 * yields Fast-SCSI speed.
665 */
666 sc->sc_features = NCR_F_FASTSCSI;
667 sc->sc_cfg3 = NCRF9XCFG3_FCLK;
668 sc->sc_cfg3_fscsi = NCRF9XCFG3_FSCSI;
669 sc->sc_maxwidth = 0;
670 sc->sc_maxxfer = 16 * 1024 * 1024;
671 break;
672
419 case NCR_VARIANT_FAS366:
420 sc->sc_maxwidth = 1;
421 sc->sc_maxxfer = 16 * 1024 * 1024;
673 case NCR_VARIANT_FAS366:
674 sc->sc_maxwidth = 1;
675 sc->sc_maxxfer = 16 * 1024 * 1024;
422 /* XXX - do actually set FAST* bits */
423 break;
424 }
425
676 break;
677 }
678
679 /* Limit minsync due to unsolved performance issues. */
680 sc->sc_maxsync = sc->sc_minsync;
681
426 /* Establish interrupt channel */
427 esc->sc_irqrid = 0;
428 if ((esc->sc_irqres = bus_alloc_resource_any(esc->sc_dev, SYS_RES_IRQ,
429 &esc->sc_irqrid, RF_SHAREABLE|RF_ACTIVE)) == NULL) {
682 /* Establish interrupt channel */
683 esc->sc_irqrid = 0;
684 if ((esc->sc_irqres = bus_alloc_resource_any(esc->sc_dev, SYS_RES_IRQ,
685 &esc->sc_irqrid, RF_SHAREABLE|RF_ACTIVE)) == NULL) {
430 device_printf(esc->sc_dev, "Cannot allocate interrupt\n");
431 return;
686 device_printf(esc->sc_dev, "cannot allocate interrupt\n");
687 return (ENXIO);
432 }
433 if (bus_setup_intr(esc->sc_dev, esc->sc_irqres,
434 INTR_TYPE_BIO|INTR_MPSAFE, ncr53c9x_intr, sc, &esc->sc_irq)) {
688 }
689 if (bus_setup_intr(esc->sc_dev, esc->sc_irqres,
690 INTR_TYPE_BIO|INTR_MPSAFE, ncr53c9x_intr, sc, &esc->sc_irq)) {
435 device_printf(esc->sc_dev, "Cannot set up interrupt\n");
436 return;
691 device_printf(esc->sc_dev, "cannot set up interrupt\n");
692 error = ENXIO;
693 goto fail_ires;
437 }
438
439 /* Turn on target selection using the `DMA' method */
440 if (sc->sc_rev != NCR_VARIANT_FAS366)
441 sc->sc_features |= NCR_F_DMASELECT;
442
443 /* Do the common parts of attachment. */
444 sc->sc_dev = esc->sc_dev;
694 }
695
696 /* Turn on target selection using the `DMA' method */
697 if (sc->sc_rev != NCR_VARIANT_FAS366)
698 sc->sc_features |= NCR_F_DMASELECT;
699
700 /* Do the common parts of attachment. */
701 sc->sc_dev = esc->sc_dev;
445 ncr53c9x_attach(sc);
702 error = ncr53c9x_attach(sc);
703 if (error != 0) {
704 device_printf(esc->sc_dev, "ncr53c9x_attach failed\n");
705 goto fail_intr;
706 }
707
708 return (0);
709
710 fail_intr:
711 bus_teardown_intr(esc->sc_dev, esc->sc_irqres, esc->sc_irq);
712 fail_ires:
713 bus_release_resource(esc->sc_dev, SYS_RES_IRQ, esc->sc_irqrid,
714 esc->sc_irqres);
715 return (error);
446}
447
448/*
449 * Glue functions.
450 */
451
452#ifdef ESP_SBUS_DEBUG
453int esp_sbus_debug = 0;

--- 133 unchanged lines hidden --- 		716}
717
718/*
719 * Glue functions.
720 */
721
722#ifdef ESP_SBUS_DEBUG
723int esp_sbus_debug = 0;

--- 133 unchanged lines hidden ---