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sdiff udiff text old ( 119572 ) new ( 121206 )
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if_ep.c (119572) if_ep.c (121206)
1/*
2 * Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <sys/cdefs.h>
1/*
2 * Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: head/sys/dev/ep/if_ep.c 119572 2003-08-30 08:10:58Z markm $");
32__FBSDID("$FreeBSD: head/sys/dev/ep/if_ep.c 121206 2003-10-18 15:22:43Z imp $");
33
34/*
35 * Modified from the FreeBSD 1.1.5.1 version by:
36 * Andres Vega Garcia
37 * INRIA - Sophia Antipolis, France
38 * avega@sophia.inria.fr
39 */
40

--- 15 unchanged lines hidden (view full) ---

56 */
57
58/*
59 * MAINTAINER: Matthew N. Dodd <winter@jurai.net>
60 * <mdodd@FreeBSD.org>
61 */
62
63#include <sys/cdefs.h>
33
34/*
35 * Modified from the FreeBSD 1.1.5.1 version by:
36 * Andres Vega Garcia
37 * INRIA - Sophia Antipolis, France
38 * avega@sophia.inria.fr
39 */
40

--- 15 unchanged lines hidden (view full) ---

56 */
57
58/*
59 * MAINTAINER: Matthew N. Dodd <winter@jurai.net>
60 * <mdodd@FreeBSD.org>
61 */
62
63#include <sys/cdefs.h>
64__FBSDID("$FreeBSD: head/sys/dev/ep/if_ep.c 119572 2003-08-30 08:10:58Z markm $");
64__FBSDID("$FreeBSD: head/sys/dev/ep/if_ep.c 121206 2003-10-18 15:22:43Z imp $");
65
66#include <sys/param.h>
67#include <sys/systm.h>
68#include <sys/mbuf.h>
69#include <sys/socket.h>
70#include <sys/sockio.h>
71#include <sys/bus.h>
72

--- 34 unchanged lines hidden (view full) ---

107#define EP_FSET(sc, f) (sc->stat |= (f))
108#define EP_FRST(sc, f) (sc->stat &= ~(f))
109
110static int
111eeprom_rdy(struct ep_softc *sc)
112{
113 int i;
114
65
66#include <sys/param.h>
67#include <sys/systm.h>
68#include <sys/mbuf.h>
69#include <sys/socket.h>
70#include <sys/sockio.h>
71#include <sys/bus.h>
72

--- 34 unchanged lines hidden (view full) ---

107#define EP_FSET(sc, f) (sc->stat |= (f))
108#define EP_FRST(sc, f) (sc->stat &= ~(f))
109
110static int
111eeprom_rdy(struct ep_softc *sc)
112{
113 int i;
114
115 for (i = 0; is_eeprom_busy(BASE) && i < MAX_EEPROMBUSY; i++)
115 for (i = 0; is_eeprom_busy(sc) && i < MAX_EEPROMBUSY; i++)
116 DELAY(100);
117
118 if (i >= MAX_EEPROMBUSY) {
119 printf("ep%d: eeprom failed to come ready.\n", sc->unit);
120 return (ENXIO);
121 }
122
123 return (0);

--- 5 unchanged lines hidden (view full) ---

129 */
130int
131get_e(struct ep_softc *sc, u_int16_t offset, u_int16_t *result)
132{
133
134 if (eeprom_rdy(sc))
135 return (ENXIO);
136
116 DELAY(100);
117
118 if (i >= MAX_EEPROMBUSY) {
119 printf("ep%d: eeprom failed to come ready.\n", sc->unit);
120 return (ENXIO);
121 }
122
123 return (0);

--- 5 unchanged lines hidden (view full) ---

129 */
130int
131get_e(struct ep_softc *sc, u_int16_t offset, u_int16_t *result)
132{
133
134 if (eeprom_rdy(sc))
135 return (ENXIO);
136
137 outw(BASE + EP_W0_EEPROM_COMMAND,
137 EP_WRITE_2(sc, EP_W0_EEPROM_COMMAND,
138 (EEPROM_CMD_RD << sc->epb.cmd_off) | offset);
139
140 if (eeprom_rdy(sc))
141 return (ENXIO);
142
138 (EEPROM_CMD_RD << sc->epb.cmd_off) | offset);
139
140 if (eeprom_rdy(sc))
141 return (ENXIO);
142
143 (*result) = inw(BASE + EP_W0_EEPROM_DATA);
143 (*result) = EP_READ_2(sc, EP_W0_EEPROM_DATA);
144
145 return (0);
146}
147
148int
149ep_get_macaddr(struct ep_softc *sc, u_char *addr)
150{
151 int i;

--- 37 unchanged lines hidden (view full) ---

189 device_printf(dev, "No irq?!\n");
190 error = ENXIO;
191 goto bad;
192 }
193 sc->dev = dev;
194 sc->unit = device_get_unit(dev);
195 sc->stat = 0; /* 16 bit access */
196
144
145 return (0);
146}
147
148int
149ep_get_macaddr(struct ep_softc *sc, u_char *addr)
150{
151 int i;

--- 37 unchanged lines hidden (view full) ---

189 device_printf(dev, "No irq?!\n");
190 error = ENXIO;
191 goto bad;
192 }
193 sc->dev = dev;
194 sc->unit = device_get_unit(dev);
195 sc->stat = 0; /* 16 bit access */
196
197 sc->ep_io_addr = rman_get_start(sc->iobase);
197 sc->bst = rman_get_bustag(sc->iobase);
198 sc->bsh = rman_get_bushandle(sc->iobase);
198
199
199 sc->ep_btag = rman_get_bustag(sc->iobase);
200 sc->ep_bhandle = rman_get_bushandle(sc->iobase);
201
202 sc->ep_connectors = 0;
203 sc->ep_connector = 0;
204
205 GO_WINDOW(0);
206 sc->epb.cmd_off = 0;
207
208 error = get_e(sc, EEPROM_PROD_ID, &result);
209 if (error)

--- 10 unchanged lines hidden (view full) ---

220}
221
222void
223ep_get_media(struct ep_softc *sc)
224{
225 u_int16_t config;
226
227 GO_WINDOW(0);
200 sc->ep_connectors = 0;
201 sc->ep_connector = 0;
202
203 GO_WINDOW(0);
204 sc->epb.cmd_off = 0;
205
206 error = get_e(sc, EEPROM_PROD_ID, &result);
207 if (error)

--- 10 unchanged lines hidden (view full) ---

218}
219
220void
221ep_get_media(struct ep_softc *sc)
222{
223 u_int16_t config;
224
225 GO_WINDOW(0);
228 config = inw(BASE + EP_W0_CONFIG_CTRL);
226 config = EP_READ_2(sc, EP_W0_CONFIG_CTRL);
229 if (config & IS_AUI)
230 sc->ep_connectors |= AUI;
231 if (config & IS_BNC)
232 sc->ep_connectors |= BNC;
233 if (config & IS_UTP)
234 sc->ep_connectors |= UTP;
235
236 if (!(sc->ep_connectors & 7))
237 if (bootverbose)
238 device_printf(sc->dev, "no connectors!\n");
239
240 /*
241 * This works for most of the cards so we'll do it here.
242 * The cards that require something different can override
243 * this later on.
244 */
227 if (config & IS_AUI)
228 sc->ep_connectors |= AUI;
229 if (config & IS_BNC)
230 sc->ep_connectors |= BNC;
231 if (config & IS_UTP)
232 sc->ep_connectors |= UTP;
233
234 if (!(sc->ep_connectors & 7))
235 if (bootverbose)
236 device_printf(sc->dev, "no connectors!\n");
237
238 /*
239 * This works for most of the cards so we'll do it here.
240 * The cards that require something different can override
241 * this later on.
242 */
245 sc->ep_connector = inw(BASE + EP_W0_ADDRESS_CFG) >> ACF_CONNECTOR_BITS;
243 sc->ep_connector = EP_READ_2(sc, EP_W0_ADDRESS_CFG) >> ACF_CONNECTOR_BITS;
246}
247
248void
249ep_free(device_t dev)
250{
251 struct ep_softc *sc = device_get_softc(dev);
252
253 if (sc->ep_intrhand)

--- 22 unchanged lines hidden (view full) ---

276 return (ENXIO);
277 }
278 /*
279 * Setup the station address
280 */
281 p = (u_short *)&sc->arpcom.ac_enaddr;
282 GO_WINDOW(2);
283 for (i = 0; i < 3; i++)
244}
245
246void
247ep_free(device_t dev)
248{
249 struct ep_softc *sc = device_get_softc(dev);
250
251 if (sc->ep_intrhand)

--- 22 unchanged lines hidden (view full) ---

274 return (ENXIO);
275 }
276 /*
277 * Setup the station address
278 */
279 p = (u_short *)&sc->arpcom.ac_enaddr;
280 GO_WINDOW(2);
281 for (i = 0; i < 3; i++)
284 outw(BASE + EP_W2_ADDR_0 + (i * 2), ntohs(p[i]));
282 EP_WRITE_2(sc, EP_W2_ADDR_0 + (i * 2), ntohs(p[i]));
285
286 device_printf(sc->dev, "Ethernet address %6D\n",
287 sc->arpcom.ac_enaddr, ":");
288
289 ifp = &sc->arpcom.ac_if;
290 attached = (ifp->if_softc != 0);
291
292 ifp->if_softc = sc;

--- 81 unchanged lines hidden (view full) ---

374 struct ep_softc *sc = xsc;
375 struct ifnet *ifp = &sc->arpcom.ac_if;
376 int s, i;
377
378 if (sc->gone)
379 return;
380
381 s = splimp();
283
284 device_printf(sc->dev, "Ethernet address %6D\n",
285 sc->arpcom.ac_enaddr, ":");
286
287 ifp = &sc->arpcom.ac_if;
288 attached = (ifp->if_softc != 0);
289
290 ifp->if_softc = sc;

--- 81 unchanged lines hidden (view full) ---

372 struct ep_softc *sc = xsc;
373 struct ifnet *ifp = &sc->arpcom.ac_if;
374 int s, i;
375
376 if (sc->gone)
377 return;
378
379 s = splimp();
382 while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS);
380 while (EP_READ_2(sc, EP_STATUS) & S_COMMAND_IN_PROGRESS);
383
384 GO_WINDOW(0);
381
382 GO_WINDOW(0);
385 outw(BASE + EP_COMMAND, STOP_TRANSCEIVER);
383 EP_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
386 GO_WINDOW(4);
384 GO_WINDOW(4);
387 outw(BASE + EP_W4_MEDIA_TYPE, DISABLE_UTP);
385 EP_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
388 GO_WINDOW(0);
389
390 /* Disable the card */
386 GO_WINDOW(0);
387
388 /* Disable the card */
391 outw(BASE + EP_W0_CONFIG_CTRL, 0);
389 EP_WRITE_2(sc, EP_W0_CONFIG_CTRL, 0);
392
393 /* Enable the card */
390
391 /* Enable the card */
394 outw(BASE + EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ);
392 EP_WRITE_2(sc, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ);
395
396 GO_WINDOW(2);
397
398 /* Reload the ether_addr. */
399 for (i = 0; i < 6; i++)
393
394 GO_WINDOW(2);
395
396 /* Reload the ether_addr. */
397 for (i = 0; i < 6; i++)
400 outb(BASE + EP_W2_ADDR_0 + i, sc->arpcom.ac_enaddr[i]);
398 EP_WRITE_1(sc, EP_W2_ADDR_0 + i, sc->arpcom.ac_enaddr[i]);
401
399
402 outw(BASE + EP_COMMAND, RX_RESET);
403 outw(BASE + EP_COMMAND, TX_RESET);
404 while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS);
400 EP_WRITE_2(sc, EP_COMMAND, RX_RESET);
401 EP_WRITE_2(sc, EP_COMMAND, TX_RESET);
402 while (EP_READ_2(sc, EP_STATUS) & S_COMMAND_IN_PROGRESS);
405
406 /* Window 1 is operating window */
407 GO_WINDOW(1);
408 for (i = 0; i < 31; i++)
403
404 /* Window 1 is operating window */
405 GO_WINDOW(1);
406 for (i = 0; i < 31; i++)
409 inb(BASE + EP_W1_TX_STATUS);
407 EP_READ_1(sc, EP_W1_TX_STATUS);
410
411 /* get rid of stray intr's */
408
409 /* get rid of stray intr's */
412 outw(BASE + EP_COMMAND, ACK_INTR | 0xff);
410 EP_WRITE_2(sc, EP_COMMAND, ACK_INTR | 0xff);
413
411
414 outw(BASE + EP_COMMAND, SET_RD_0_MASK | S_5_INTS);
412 EP_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK | S_5_INTS);
415
413
416 outw(BASE + EP_COMMAND, SET_INTR_MASK | S_5_INTS);
414 EP_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
417
418 if (ifp->if_flags & IFF_PROMISC)
415
416 if (ifp->if_flags & IFF_PROMISC)
419 outw(BASE + EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
417 EP_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
420 FIL_GROUP | FIL_BRDCST | FIL_ALL);
421 else
418 FIL_GROUP | FIL_BRDCST | FIL_ALL);
419 else
422 outw(BASE + EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
420 EP_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
423 FIL_GROUP | FIL_BRDCST);
424
425 if (!sc->epb.mii_trans)
426 ep_ifmedia_upd(ifp);
427
421 FIL_GROUP | FIL_BRDCST);
422
423 if (!sc->epb.mii_trans)
424 ep_ifmedia_upd(ifp);
425
428 outw(BASE + EP_COMMAND, RX_ENABLE);
429 outw(BASE + EP_COMMAND, TX_ENABLE);
426 EP_WRITE_2(sc, EP_COMMAND, RX_ENABLE);
427 EP_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
430
431 ifp->if_flags |= IFF_RUNNING;
432 ifp->if_flags &= ~IFF_OACTIVE; /* just in case */
433
434#ifdef EP_LOCAL_STATS
435 sc->rx_no_first = sc->rx_no_mbuf =
436 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
437#endif
438 EP_FSET(sc, F_RX_FIRST);
439 if (sc->top) {
440 m_freem(sc->top);
441 sc->top = sc->mcur = 0;
442 }
428
429 ifp->if_flags |= IFF_RUNNING;
430 ifp->if_flags &= ~IFF_OACTIVE; /* just in case */
431
432#ifdef EP_LOCAL_STATS
433 sc->rx_no_first = sc->rx_no_mbuf =
434 sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
435#endif
436 EP_FSET(sc, F_RX_FIRST);
437 if (sc->top) {
438 m_freem(sc->top);
439 sc->top = sc->mcur = 0;
440 }
443 outw(BASE + EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
444 outw(BASE + EP_COMMAND, SET_TX_START_THRESH | 16);
441 EP_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
442 EP_WRITE_2(sc, EP_COMMAND, SET_TX_START_THRESH | 16);
445
446 /*
447 * Store up a bunch of mbuf's for use later. (MAX_MBS).
448 * First we free up any that we had in case we're being
449 * called from intr or somewhere else.
450 */
451
452 GO_WINDOW(1);

--- 9 unchanged lines hidden (view full) ---

462 u_int len;
463 struct mbuf *m, *m0;
464 int s, pad;
465
466 sc = ifp->if_softc;
467 if (sc->gone)
468 return;
469
443
444 /*
445 * Store up a bunch of mbuf's for use later. (MAX_MBS).
446 * First we free up any that we had in case we're being
447 * called from intr or somewhere else.
448 */
449
450 GO_WINDOW(1);

--- 9 unchanged lines hidden (view full) ---

460 u_int len;
461 struct mbuf *m, *m0;
462 int s, pad;
463
464 sc = ifp->if_softc;
465 if (sc->gone)
466 return;
467
470 while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS);
468 while (EP_READ_2(sc, EP_STATUS) & S_COMMAND_IN_PROGRESS);
471 if (ifp->if_flags & IFF_OACTIVE)
472 return;
473
474startagain:
475 /* Sneak a peek at the next packet */
476 IF_DEQUEUE(&ifp->if_snd, m0);
477 if (m0 == NULL)
478 return;

--- 8 unchanged lines hidden (view full) ---

487 * Perhaps we should truncate them instead?
488 */
489 if (len + pad > ETHER_MAX_LEN) {
490 /* packet is obviously too large: toss it */
491 ifp->if_oerrors++;
492 m_freem(m0);
493 goto readcheck;
494 }
469 if (ifp->if_flags & IFF_OACTIVE)
470 return;
471
472startagain:
473 /* Sneak a peek at the next packet */
474 IF_DEQUEUE(&ifp->if_snd, m0);
475 if (m0 == NULL)
476 return;

--- 8 unchanged lines hidden (view full) ---

485 * Perhaps we should truncate them instead?
486 */
487 if (len + pad > ETHER_MAX_LEN) {
488 /* packet is obviously too large: toss it */
489 ifp->if_oerrors++;
490 m_freem(m0);
491 goto readcheck;
492 }
495 if (inw(BASE + EP_W1_FREE_TX) < len + pad + 4) {
493 if (EP_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
496 /* no room in FIFO */
494 /* no room in FIFO */
497 outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
495 EP_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
498 /* make sure */
496 /* make sure */
499 if (inw(BASE + EP_W1_FREE_TX) < len + pad + 4) {
497 if (EP_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
500 ifp->if_flags |= IFF_OACTIVE;
501 IF_PREPEND(&ifp->if_snd, m0);
502 return;
503 }
504 } else
498 ifp->if_flags |= IFF_OACTIVE;
499 IF_PREPEND(&ifp->if_snd, m0);
500 return;
501 }
502 } else
505 outw(BASE + EP_COMMAND,
503 EP_WRITE_2(sc, EP_COMMAND,
506 SET_TX_AVAIL_THRESH | EP_THRESH_DISABLE);
507
508 s = splhigh();
509
504 SET_TX_AVAIL_THRESH | EP_THRESH_DISABLE);
505
506 s = splhigh();
507
510 outw(BASE + EP_W1_TX_PIO_WR_1, len);
508 EP_WRITE_2(sc, EP_W1_TX_PIO_WR_1, len);
511 /* Second dword meaningless */
509 /* Second dword meaningless */
512 outw(BASE + EP_W1_TX_PIO_WR_1, 0x0);
510 EP_WRITE_2(sc, EP_W1_TX_PIO_WR_1, 0x0);
513
514 if (EP_FTST(sc, F_ACCESS_32_BITS)) {
515 for (m = m0; m != NULL; m = m->m_next) {
516 if (m->m_len > 3)
511
512 if (EP_FTST(sc, F_ACCESS_32_BITS)) {
513 for (m = m0; m != NULL; m = m->m_next) {
514 if (m->m_len > 3)
517 outsl(BASE + EP_W1_TX_PIO_WR_1,
518 mtod(m, caddr_t), m->m_len / 4);
515 EP_WRITE_MULTI_4(sc, EP_W1_TX_PIO_WR_1,
516 mtod(m, uint32_t *), m->m_len / 4);
519 if (m->m_len & 3)
517 if (m->m_len & 3)
520 outsb(BASE + EP_W1_TX_PIO_WR_1,
521 mtod(m, caddr_t)+(m->m_len & (~3)),
518 EP_WRITE_MULTI_1(sc, EP_W1_TX_PIO_WR_1,
519 mtod(m, uint8_t *)+(m->m_len & (~3)),
522 m->m_len & 3);
523 }
524 } else {
525 for (m = m0; m != NULL; m = m->m_next) {
526 if (m->m_len > 1)
520 m->m_len & 3);
521 }
522 } else {
523 for (m = m0; m != NULL; m = m->m_next) {
524 if (m->m_len > 1)
527 outsw(BASE + EP_W1_TX_PIO_WR_1,
528 mtod(m, caddr_t), m->m_len / 2);
525 EP_WRITE_MULTI_2(sc, EP_W1_TX_PIO_WR_1,
526 mtod(m, uint16_t *), m->m_len / 2);
529 if (m->m_len & 1)
527 if (m->m_len & 1)
530 outb(BASE + EP_W1_TX_PIO_WR_1,
531 *(mtod(m, caddr_t)+m->m_len - 1));
528 EP_WRITE_1(sc, EP_W1_TX_PIO_WR_1,
529 *(mtod(m, uint8_t *)+m->m_len - 1));
532 }
533 }
534
535 while (pad--)
530 }
531 }
532
533 while (pad--)
536 outb(BASE + EP_W1_TX_PIO_WR_1, 0); /* Padding */
534 EP_WRITE_1(sc, EP_W1_TX_PIO_WR_1, 0); /* Padding */
537
538 splx(s);
539
540 BPF_MTAP(ifp, m0);
541
542 ifp->if_timer = 2;
543 ifp->if_opackets++;
544 m_freem(m0);
545
546 /*
547 * Is another packet coming in? We don't want to overflow
548 * the tiny RX fifo.
549 */
550readcheck:
535
536 splx(s);
537
538 BPF_MTAP(ifp, m0);
539
540 ifp->if_timer = 2;
541 ifp->if_opackets++;
542 m_freem(m0);
543
544 /*
545 * Is another packet coming in? We don't want to overflow
546 * the tiny RX fifo.
547 */
548readcheck:
551 if (inw(BASE + EP_W1_RX_STATUS) & RX_BYTES_MASK) {
549 if (EP_READ_2(sc, EP_W1_RX_STATUS) & RX_BYTES_MASK) {
552 /*
553 * we check if we have packets left, in that case
554 * we prepare to come back later
555 */
556 if (ifp->if_snd.ifq_head)
550 /*
551 * we check if we have packets left, in that case
552 * we prepare to come back later
553 */
554 if (ifp->if_snd.ifq_head)
557 outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | 8);
555 EP_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | 8);
558 return;
559 }
560 goto startagain;
561}
562
563void
564ep_intr(void *arg)
565{

--- 4 unchanged lines hidden (view full) ---

570
571 x = splbio();
572
573 sc = (struct ep_softc *) arg;
574
575 /*
576 * quick fix: Try to detect an interrupt when the card goes away.
577 */
556 return;
557 }
558 goto startagain;
559}
560
561void
562ep_intr(void *arg)
563{

--- 4 unchanged lines hidden (view full) ---

568
569 x = splbio();
570
571 sc = (struct ep_softc *) arg;
572
573 /*
574 * quick fix: Try to detect an interrupt when the card goes away.
575 */
578 if (sc->gone || inw(BASE + EP_STATUS) == 0xffff) {
576 if (sc->gone || EP_READ_2(sc, EP_STATUS) == 0xffff) {
579 splx(x);
580 return;
581 }
582 ifp = &sc->arpcom.ac_if;
583
577 splx(x);
578 return;
579 }
580 ifp = &sc->arpcom.ac_if;
581
584 outw(BASE + EP_COMMAND, SET_INTR_MASK); /* disable all Ints */
582 EP_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK); /* disable all Ints */
585
586rescan:
587
583
584rescan:
585
588 while ((status = inw(BASE + EP_STATUS)) & S_5_INTS) {
586 while ((status = EP_READ_2(sc, EP_STATUS)) & S_5_INTS) {
589
590 /* first acknowledge all interrupt sources */
587
588 /* first acknowledge all interrupt sources */
591 outw(BASE + EP_COMMAND, ACK_INTR | (status & S_MASK));
589 EP_WRITE_2(sc, EP_COMMAND, ACK_INTR | (status & S_MASK));
592
593 if (status & (S_RX_COMPLETE | S_RX_EARLY))
594 epread(sc);
595 if (status & S_TX_AVAIL) {
596 /* we need ACK */
597 ifp->if_timer = 0;
598 ifp->if_flags &= ~IFF_OACTIVE;
599 GO_WINDOW(1);
590
591 if (status & (S_RX_COMPLETE | S_RX_EARLY))
592 epread(sc);
593 if (status & S_TX_AVAIL) {
594 /* we need ACK */
595 ifp->if_timer = 0;
596 ifp->if_flags &= ~IFF_OACTIVE;
597 GO_WINDOW(1);
600 inw(BASE + EP_W1_FREE_TX);
598 EP_READ_2(sc, EP_W1_FREE_TX);
601 ep_if_start(ifp);
602 }
603 if (status & S_CARD_FAILURE) {
604 ifp->if_timer = 0;
605#ifdef EP_LOCAL_STATS
606 printf("\nep%d:\n\tStatus: %x\n", sc->unit, status);
607 GO_WINDOW(4);
608 printf("\tFIFO Diagnostic: %x\n",
599 ep_if_start(ifp);
600 }
601 if (status & S_CARD_FAILURE) {
602 ifp->if_timer = 0;
603#ifdef EP_LOCAL_STATS
604 printf("\nep%d:\n\tStatus: %x\n", sc->unit, status);
605 GO_WINDOW(4);
606 printf("\tFIFO Diagnostic: %x\n",
609 inw(BASE + EP_W4_FIFO_DIAG));
607 EP_READ_2(sc, EP_W4_FIFO_DIAG));
610 printf("\tStat: %x\n", sc->stat);
611 printf("\tIpackets=%d, Opackets=%d\n",
612 ifp->if_ipackets, ifp->if_opackets);
613 printf("\tNOF=%d, NOMB=%d, RXOF=%d, RXOL=%d, TXU=%d\n",
614 sc->rx_no_first, sc->rx_no_mbuf, sc->rx_overrunf,
615 sc->rx_overrunl, sc->tx_underrun);
616#else
617

--- 12 unchanged lines hidden (view full) ---

630 if (status & S_TX_COMPLETE) {
631 ifp->if_timer = 0;
632 /*
633 * We need ACK. We do it at the end.
634 *
635 * We need to read TX_STATUS until we get a
636 * 0 status in order to turn off the interrupt flag.
637 */
608 printf("\tStat: %x\n", sc->stat);
609 printf("\tIpackets=%d, Opackets=%d\n",
610 ifp->if_ipackets, ifp->if_opackets);
611 printf("\tNOF=%d, NOMB=%d, RXOF=%d, RXOL=%d, TXU=%d\n",
612 sc->rx_no_first, sc->rx_no_mbuf, sc->rx_overrunf,
613 sc->rx_overrunl, sc->tx_underrun);
614#else
615

--- 12 unchanged lines hidden (view full) ---

628 if (status & S_TX_COMPLETE) {
629 ifp->if_timer = 0;
630 /*
631 * We need ACK. We do it at the end.
632 *
633 * We need to read TX_STATUS until we get a
634 * 0 status in order to turn off the interrupt flag.
635 */
638 while ((status = inb(BASE + EP_W1_TX_STATUS)) &
636 while ((status = EP_READ_1(sc, EP_W1_TX_STATUS)) &
639 TXS_COMPLETE) {
640 if (status & TXS_SUCCES_INTR_REQ);
641 else if (status &
642 (TXS_UNDERRUN | TXS_JABBER |
643 TXS_MAX_COLLISION)) {
637 TXS_COMPLETE) {
638 if (status & TXS_SUCCES_INTR_REQ);
639 else if (status &
640 (TXS_UNDERRUN | TXS_JABBER |
641 TXS_MAX_COLLISION)) {
644 outw(BASE + EP_COMMAND, TX_RESET);
642 EP_WRITE_2(sc, EP_COMMAND, TX_RESET);
645 if (status & TXS_UNDERRUN) {
646#ifdef EP_LOCAL_STATS
647 sc->tx_underrun++;
648#endif
649 } else {
650 if (status & TXS_JABBER);
651 else
652 ++ifp->if_collisions;
653 /* TXS_MAX_COLLISION
654 * we shouldn't get
655 * here
656 */
657 }
658 ++ifp->if_oerrors;
643 if (status & TXS_UNDERRUN) {
644#ifdef EP_LOCAL_STATS
645 sc->tx_underrun++;
646#endif
647 } else {
648 if (status & TXS_JABBER);
649 else
650 ++ifp->if_collisions;
651 /* TXS_MAX_COLLISION
652 * we shouldn't get
653 * here
654 */
655 }
656 ++ifp->if_oerrors;
659 outw(BASE + EP_COMMAND, TX_ENABLE);
657 EP_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
660 /*
661 * To have a tx_avail_int but giving
662 * the chance to the Reception
663 */
664 if (ifp->if_snd.ifq_head)
658 /*
659 * To have a tx_avail_int but giving
660 * the chance to the Reception
661 */
662 if (ifp->if_snd.ifq_head)
665 outw(BASE + EP_COMMAND,
663 EP_WRITE_2(sc, EP_COMMAND,
666 SET_TX_AVAIL_THRESH | 8);
667 }
668 /* pops up the next status */
664 SET_TX_AVAIL_THRESH | 8);
665 }
666 /* pops up the next status */
669 outb(BASE + EP_W1_TX_STATUS, 0x0);
667 EP_WRITE_1(sc, EP_W1_TX_STATUS, 0x0);
670 } /* while */
671 ifp->if_flags &= ~IFF_OACTIVE;
672 GO_WINDOW(1);
668 } /* while */
669 ifp->if_flags &= ~IFF_OACTIVE;
670 GO_WINDOW(1);
673 inw(BASE + EP_W1_FREE_TX);
671 EP_READ_2(sc, EP_W1_FREE_TX);
674 ep_if_start(ifp);
675 } /* end TX_COMPLETE */
676 }
677
672 ep_if_start(ifp);
673 } /* end TX_COMPLETE */
674 }
675
678 outw(BASE + EP_COMMAND, C_INTR_LATCH); /* ACK int Latch */
676 EP_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH); /* ACK int Latch */
679
677
680 if ((status = inw(BASE + EP_STATUS)) & S_5_INTS)
678 if ((status = EP_READ_2(sc, EP_STATUS)) & S_5_INTS)
681 goto rescan;
682
683 /* re-enable Ints */
679 goto rescan;
680
681 /* re-enable Ints */
684 outw(BASE + EP_COMMAND, SET_INTR_MASK | S_5_INTS);
682 EP_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
685
686 splx(x);
687}
688
689static void
690epread(struct ep_softc *sc)
691{
692 struct mbuf *top, *mcur, *m;
693 struct ifnet *ifp;
694 int lenthisone;
695
696 short rx_fifo2, status;
697 short rx_fifo;
698
699 ifp = &sc->arpcom.ac_if;
683
684 splx(x);
685}
686
687static void
688epread(struct ep_softc *sc)
689{
690 struct mbuf *top, *mcur, *m;
691 struct ifnet *ifp;
692 int lenthisone;
693
694 short rx_fifo2, status;
695 short rx_fifo;
696
697 ifp = &sc->arpcom.ac_if;
700 status = inw(BASE + EP_W1_RX_STATUS);
698 status = EP_READ_2(sc, EP_W1_RX_STATUS);
701
702read_again:
703
704 if (status & ERR_RX) {
705 ++ifp->if_ierrors;
706 if (status & ERR_RX_OVERRUN) {
707 /*
708 * We can think the rx latency is actually

--- 17 unchanged lines hidden (view full) ---

726 if (rx_fifo >= MINCLSIZE)
727 MCLGET(m, M_DONTWAIT);
728 sc->top = sc->mcur = top = m;
729#define EROUND ((sizeof(struct ether_header) + 3) & ~3)
730#define EOFF (EROUND - sizeof(struct ether_header))
731 top->m_data += EOFF;
732
733 /* Read what should be the header. */
699
700read_again:
701
702 if (status & ERR_RX) {
703 ++ifp->if_ierrors;
704 if (status & ERR_RX_OVERRUN) {
705 /*
706 * We can think the rx latency is actually

--- 17 unchanged lines hidden (view full) ---

724 if (rx_fifo >= MINCLSIZE)
725 MCLGET(m, M_DONTWAIT);
726 sc->top = sc->mcur = top = m;
727#define EROUND ((sizeof(struct ether_header) + 3) & ~3)
728#define EOFF (EROUND - sizeof(struct ether_header))
729 top->m_data += EOFF;
730
731 /* Read what should be the header. */
734 insw(BASE + EP_W1_RX_PIO_RD_1,
735 mtod(top, caddr_t), sizeof(struct ether_header) / 2);
732 EP_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
733 mtod(top, uint16_t *), sizeof(struct ether_header) / 2);
736 top->m_len = sizeof(struct ether_header);
737 rx_fifo -= sizeof(struct ether_header);
738 sc->cur_len = rx_fifo2;
739 } else {
740 /* come here if we didn't have a complete packet last time */
741 top = sc->top;
742 m = sc->mcur;
743 sc->cur_len += rx_fifo2;

--- 10 unchanged lines hidden (view full) ---

754 if (rx_fifo >= MINCLSIZE)
755 MCLGET(m, M_DONTWAIT);
756 m->m_len = 0;
757 mcur->m_next = m;
758 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
759 }
760 if (EP_FTST(sc, F_ACCESS_32_BITS)) {
761 /* default for EISA configured cards */
734 top->m_len = sizeof(struct ether_header);
735 rx_fifo -= sizeof(struct ether_header);
736 sc->cur_len = rx_fifo2;
737 } else {
738 /* come here if we didn't have a complete packet last time */
739 top = sc->top;
740 m = sc->mcur;
741 sc->cur_len += rx_fifo2;

--- 10 unchanged lines hidden (view full) ---

752 if (rx_fifo >= MINCLSIZE)
753 MCLGET(m, M_DONTWAIT);
754 m->m_len = 0;
755 mcur->m_next = m;
756 lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
757 }
758 if (EP_FTST(sc, F_ACCESS_32_BITS)) {
759 /* default for EISA configured cards */
762 insl(BASE + EP_W1_RX_PIO_RD_1,
763 mtod(m, caddr_t)+m->m_len,
760 EP_READ_MULTI_4(sc, EP_W1_RX_PIO_RD_1,
761 mtod(m, uint32_t *)+m->m_len,
764 lenthisone / 4);
765 m->m_len += (lenthisone & ~3);
766 if (lenthisone & 3)
762 lenthisone / 4);
763 m->m_len += (lenthisone & ~3);
764 if (lenthisone & 3)
767 insb(BASE + EP_W1_RX_PIO_RD_1,
765 EP_READ_MULTI_1(sc, EP_W1_RX_PIO_RD_1,
768 mtod(m, caddr_t)+m->m_len, lenthisone & 3);
769 m->m_len += (lenthisone & 3);
770 } else {
766 mtod(m, caddr_t)+m->m_len, lenthisone & 3);
767 m->m_len += (lenthisone & 3);
768 } else {
771 insw(BASE + EP_W1_RX_PIO_RD_1,
772 mtod(m, caddr_t)+m->m_len, lenthisone / 2);
769 EP_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
770 mtod(m, uint16_t *)+m->m_len, lenthisone / 2);
773 m->m_len += lenthisone;
774 if (lenthisone & 1)
775 *(mtod(m, caddr_t)+m->m_len - 1) =
771 m->m_len += lenthisone;
772 if (lenthisone & 1)
773 *(mtod(m, caddr_t)+m->m_len - 1) =
776 inb(BASE + EP_W1_RX_PIO_RD_1);
774 EP_READ_1(sc, EP_W1_RX_PIO_RD_1);
777 }
778 rx_fifo -= lenthisone;
779 }
780
781 if (status & ERR_RX_INCOMPLETE) {
782 /* we haven't received the complete packet */
783 sc->mcur = m;
784#ifdef EP_LOCAL_STATS
785 /* to know how often we come here */
786 sc->rx_no_first++;
787#endif
788 EP_FRST(sc, F_RX_FIRST);
775 }
776 rx_fifo -= lenthisone;
777 }
778
779 if (status & ERR_RX_INCOMPLETE) {
780 /* we haven't received the complete packet */
781 sc->mcur = m;
782#ifdef EP_LOCAL_STATS
783 /* to know how often we come here */
784 sc->rx_no_first++;
785#endif
786 EP_FRST(sc, F_RX_FIRST);
789 status = inw(BASE + EP_W1_RX_STATUS);
787 status = EP_READ_2(sc, EP_W1_RX_STATUS);
790 if (!status & ERR_RX_INCOMPLETE) {
791 /*
792 * We see if by now, the packet has completly
793 * arrived
794 */
795 goto read_again;
796 }
788 if (!status & ERR_RX_INCOMPLETE) {
789 /*
790 * We see if by now, the packet has completly
791 * arrived
792 */
793 goto read_again;
794 }
797 outw(BASE + EP_COMMAND,
795 EP_WRITE_2(sc, EP_COMMAND,
798 SET_RX_EARLY_THRESH | RX_NEXT_EARLY_THRESH);
799 return;
800 }
796 SET_RX_EARLY_THRESH | RX_NEXT_EARLY_THRESH);
797 return;
798 }
801 outw(BASE + EP_COMMAND, RX_DISCARD_TOP_PACK);
799 EP_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
802 ++ifp->if_ipackets;
803 EP_FSET(sc, F_RX_FIRST);
804 top->m_pkthdr.rcvif = &sc->arpcom.ac_if;
805 top->m_pkthdr.len = sc->cur_len;
806
807 (*ifp->if_input) (ifp, top);
808 sc->top = 0;
800 ++ifp->if_ipackets;
801 EP_FSET(sc, F_RX_FIRST);
802 top->m_pkthdr.rcvif = &sc->arpcom.ac_if;
803 top->m_pkthdr.len = sc->cur_len;
804
805 (*ifp->if_input) (ifp, top);
806 sc->top = 0;
809 while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS);
810 outw(BASE + EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
807 while (EP_READ_2(sc, EP_STATUS) & S_COMMAND_IN_PROGRESS);
808 EP_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
811 return;
812
813out:
809 return;
810
811out:
814 outw(BASE + EP_COMMAND, RX_DISCARD_TOP_PACK);
812 EP_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
815 if (sc->top) {
816 m_freem(sc->top);
817 sc->top = 0;
818#ifdef EP_LOCAL_STATS
819 sc->rx_no_mbuf++;
820#endif
821 }
822 EP_FSET(sc, F_RX_FIRST);
813 if (sc->top) {
814 m_freem(sc->top);
815 sc->top = 0;
816#ifdef EP_LOCAL_STATS
817 sc->rx_no_mbuf++;
818#endif
819 }
820 EP_FSET(sc, F_RX_FIRST);
823 while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS);
824 outw(BASE + EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
821 while (EP_READ_2(sc, EP_STATUS) & S_COMMAND_IN_PROGRESS);
822 EP_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
825}
826
827static int
828ep_ifmedia_upd(struct ifnet *ifp)
829{
830 struct ep_softc *sc = ifp->if_softc;
831 int i = 0, j;
832
833 GO_WINDOW(0);
823}
824
825static int
826ep_ifmedia_upd(struct ifnet *ifp)
827{
828 struct ep_softc *sc = ifp->if_softc;
829 int i = 0, j;
830
831 GO_WINDOW(0);
834 outw(BASE + EP_COMMAND, STOP_TRANSCEIVER);
832 EP_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
835 GO_WINDOW(4);
833 GO_WINDOW(4);
836 outw(BASE + EP_W4_MEDIA_TYPE, DISABLE_UTP);
834 EP_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
837 GO_WINDOW(0);
838
839 switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) {
840 case IFM_10_T:
841 if (sc->ep_connectors & UTP) {
842 i = ACF_CONNECTOR_UTP;
843 GO_WINDOW(4);
835 GO_WINDOW(0);
836
837 switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) {
838 case IFM_10_T:
839 if (sc->ep_connectors & UTP) {
840 i = ACF_CONNECTOR_UTP;
841 GO_WINDOW(4);
844 outw(BASE + EP_W4_MEDIA_TYPE, ENABLE_UTP);
842 EP_WRITE_2(sc, EP_W4_MEDIA_TYPE, ENABLE_UTP);
845 }
846 break;
847 case IFM_10_2:
848 if (sc->ep_connectors & BNC) {
849 i = ACF_CONNECTOR_BNC;
843 }
844 break;
845 case IFM_10_2:
846 if (sc->ep_connectors & BNC) {
847 i = ACF_CONNECTOR_BNC;
850 outw(BASE + EP_COMMAND, START_TRANSCEIVER);
848 EP_WRITE_2(sc, EP_COMMAND, START_TRANSCEIVER);
851 DELAY(DELAY_MULTIPLE * 1000);
852 }
853 break;
854 case IFM_10_5:
855 if (sc->ep_connectors & AUI)
856 i = ACF_CONNECTOR_AUI;
857 break;
858 default:
859 i = sc->ep_connector;
860 device_printf(sc->dev,
861 "strange connector type in EEPROM: assuming AUI\n");
862 }
863
864 GO_WINDOW(0);
849 DELAY(DELAY_MULTIPLE * 1000);
850 }
851 break;
852 case IFM_10_5:
853 if (sc->ep_connectors & AUI)
854 i = ACF_CONNECTOR_AUI;
855 break;
856 default:
857 i = sc->ep_connector;
858 device_printf(sc->dev,
859 "strange connector type in EEPROM: assuming AUI\n");
860 }
861
862 GO_WINDOW(0);
865 j = inw(BASE + EP_W0_ADDRESS_CFG) & 0x3fff;
866 outw(BASE + EP_W0_ADDRESS_CFG, j | (i << ACF_CONNECTOR_BITS));
863 j = EP_READ_2(sc, EP_W0_ADDRESS_CFG) & 0x3fff;
864 EP_WRITE_2(sc, EP_W0_ADDRESS_CFG, j | (i << ACF_CONNECTOR_BITS));
867
868 return (0);
869}
870
871static void
872ep_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
873{
874 struct ep_softc *sc = ifp->if_softc;

--- 73 unchanged lines hidden (view full) ---

948 ep_intr(ifp->if_softc);
949}
950
951static void
952epstop(struct ep_softc *sc)
953{
954 if (sc->gone)
955 return;
865
866 return (0);
867}
868
869static void
870ep_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
871{
872 struct ep_softc *sc = ifp->if_softc;

--- 73 unchanged lines hidden (view full) ---

946 ep_intr(ifp->if_softc);
947}
948
949static void
950epstop(struct ep_softc *sc)
951{
952 if (sc->gone)
953 return;
956 outw(BASE + EP_COMMAND, RX_DISABLE);
957 outw(BASE + EP_COMMAND, RX_DISCARD_TOP_PACK);
958 while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS);
954 EP_WRITE_2(sc, EP_COMMAND, RX_DISABLE);
955 EP_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
956 while (EP_READ_2(sc, EP_STATUS) & S_COMMAND_IN_PROGRESS);
959
957
960 outw(BASE + EP_COMMAND, TX_DISABLE);
961 outw(BASE + EP_COMMAND, STOP_TRANSCEIVER);
958 EP_WRITE_2(sc, EP_COMMAND, TX_DISABLE);
959 EP_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
962 DELAY(800);
963
960 DELAY(800);
961
964 outw(BASE + EP_COMMAND, RX_RESET);
965 while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS);
966 outw(BASE + EP_COMMAND, TX_RESET);
967 while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS);
962 EP_WRITE_2(sc, EP_COMMAND, RX_RESET);
963 while (EP_READ_2(sc, EP_STATUS) & S_COMMAND_IN_PROGRESS);
964 EP_WRITE_2(sc, EP_COMMAND, TX_RESET);
965 while (EP_READ_2(sc, EP_STATUS) & S_COMMAND_IN_PROGRESS);
968
966
969 outw(BASE + EP_COMMAND, C_INTR_LATCH);
970 outw(BASE + EP_COMMAND, SET_RD_0_MASK);
971 outw(BASE + EP_COMMAND, SET_INTR_MASK);
972 outw(BASE + EP_COMMAND, SET_RX_FILTER);
967 EP_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH);
968 EP_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK);
969 EP_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK);
970 EP_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER);
973}
971}