1/* $NetBSD: midwayvar.h,v 1.10 1997/03/20 21:34:46 chuck Exp $ */
2
3/*
4 *
5 * Copyright (c) 1996 Charles D. Cranor and Washington University.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Charles D. Cranor and
19 * Washington University.
20 * 4. The name of the author may not be used to endorse or promote products
21 * derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
| 1/* $NetBSD: midwayvar.h,v 1.10 1997/03/20 21:34:46 chuck Exp $ */
2
3/*
4 *
5 * Copyright (c) 1996 Charles D. Cranor and Washington University.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Charles D. Cranor and
19 * Washington University.
20 * 4. The name of the author may not be used to endorse or promote products
21 * derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
|
35 */
36
37/*
38 * m i d w a y v a r . h
39 *
40 * we define the en_softc here so that bus specific modules can allocate
41 * it as the first item in their softc.
42 *
43 * author: Chuck Cranor <chuck@ccrc.wustl.edu>
44 */
45
46/*
47 * params needed to determine softc size
48 */
49#ifndef EN_NTX
50#define EN_NTX 8 /* number of tx bufs to use */
51#endif
52#ifndef EN_TXSZ
53#define EN_TXSZ 32 /* trasmit buf size in KB */
54#endif
55#ifndef EN_RXSZ
56#define EN_RXSZ 32 /* recv buf size in KB */
57#endif
58
59/* largest possible NRX (depends on RAM size) */
60#define EN_MAXNRX ((2048 - (EN_NTX * EN_TXSZ)) / EN_RXSZ)
61
62#ifndef EN_MAX_DMASEG
63#define EN_MAX_DMASEG 32
64#endif
65
66/* number of bytes to use in the first receive buffer. This must not be larger
67 * than MHLEN, should be a multiple of 64 and must be a multiple of 4. */
68#define EN_RX1BUF 128
69
70/*
71 * Structure to hold DMA maps. These are handle via a typestable uma zone.
72 */
73struct en_map {
74 uintptr_t flags; /* map flags */
75 struct en_map *rsvd2; /* see uma_zalloc(9) */
76 struct en_softc *sc; /* back pointer */
77 bus_dmamap_t map; /* the map */
78};
79#define ENMAP_LOADED 0x02
80#define ENMAP_ALLOC 0x01
81
82#define EN_MAX_MAPS 400
83
84/*
85 * Statistics
86 */
87struct en_stats {
88 uint32_t vtrash; /* sw copy of counter */
89 uint32_t otrash; /* sw copy of counter */
90 uint32_t ttrash; /* # of RBD's with T bit set */
91 uint32_t mfixaddr; /* # of times we had to mfix an address */
92 uint32_t mfixlen; /* # of times we had to mfix a lenght*/
93 uint32_t mfixfail; /* # of times mfix failed */
94 uint32_t txmbovr; /* # of times we dropped due to mbsize */
95 uint32_t dmaovr; /* tx dma overflow count */
96 uint32_t txoutspace; /* out of space in xmit buffer */
97 uint32_t txdtqout; /* out of DTQs */
98 uint32_t launch; /* total # of launches */
99 uint32_t hwpull; /* # of pulls off hardware service list */
100 uint32_t swadd; /* # of pushes on sw service list */
101 uint32_t rxqnotus; /* # of times we pull from rx q, but fail */
102 uint32_t rxqus; /* # of good pulls from rx q */
103 uint32_t rxdrqout; /* # of times out of DRQs */
104 uint32_t rxmbufout; /* # of time out of mbufs */
105 uint32_t txnomap; /* out of DMA maps in TX */
106};
107
108/*
109 * Each of these structures describes one of the eight transmit channels
110 */
111struct en_txslot {
112 uint32_t mbsize; /* # mbuf bytes in use (max=TXHIWAT) */
113 uint32_t bfree; /* # free bytes in buffer */
114 uint32_t start; /* start of buffer area (byte offset) */
115 uint32_t stop; /* ends of buffer area (byte offset) */
116 uint32_t cur; /* next free area (byte offset) */
117 uint32_t nref; /* # of VCs using this channel */
118 struct ifqueue q; /* mbufs waiting for DMA now */
119 struct ifqueue indma; /* mbufs waiting for DMA now */
120};
121
122/*
123 * Each of these structures is used for each of the receive buffers on the
124 * card.
125 */
126struct en_rxslot {
127 uint32_t mode; /* saved copy of mode info */
128 uint32_t start; /* begin of my buffer area */
129 uint32_t stop; /* end of my buffer area */
130 uint32_t cur; /* where I am at in the buffer */
131 struct en_vcc *vcc; /* backpointer to VCI */
132 struct ifqueue q; /* mbufs waiting for dma now */
133 struct ifqueue indma; /* mbufs being dma'd now */
134};
135
136struct en_vcc {
137 struct atmio_vcc vcc; /* required by common code */
138 void *rxhand;
| 35 */
36
37/*
38 * m i d w a y v a r . h
39 *
40 * we define the en_softc here so that bus specific modules can allocate
41 * it as the first item in their softc.
42 *
43 * author: Chuck Cranor <chuck@ccrc.wustl.edu>
44 */
45
46/*
47 * params needed to determine softc size
48 */
49#ifndef EN_NTX
50#define EN_NTX 8 /* number of tx bufs to use */
51#endif
52#ifndef EN_TXSZ
53#define EN_TXSZ 32 /* trasmit buf size in KB */
54#endif
55#ifndef EN_RXSZ
56#define EN_RXSZ 32 /* recv buf size in KB */
57#endif
58
59/* largest possible NRX (depends on RAM size) */
60#define EN_MAXNRX ((2048 - (EN_NTX * EN_TXSZ)) / EN_RXSZ)
61
62#ifndef EN_MAX_DMASEG
63#define EN_MAX_DMASEG 32
64#endif
65
66/* number of bytes to use in the first receive buffer. This must not be larger
67 * than MHLEN, should be a multiple of 64 and must be a multiple of 4. */
68#define EN_RX1BUF 128
69
70/*
71 * Structure to hold DMA maps. These are handle via a typestable uma zone.
72 */
73struct en_map {
74 uintptr_t flags; /* map flags */
75 struct en_map *rsvd2; /* see uma_zalloc(9) */
76 struct en_softc *sc; /* back pointer */
77 bus_dmamap_t map; /* the map */
78};
79#define ENMAP_LOADED 0x02
80#define ENMAP_ALLOC 0x01
81
82#define EN_MAX_MAPS 400
83
84/*
85 * Statistics
86 */
87struct en_stats {
88 uint32_t vtrash; /* sw copy of counter */
89 uint32_t otrash; /* sw copy of counter */
90 uint32_t ttrash; /* # of RBD's with T bit set */
91 uint32_t mfixaddr; /* # of times we had to mfix an address */
92 uint32_t mfixlen; /* # of times we had to mfix a lenght*/
93 uint32_t mfixfail; /* # of times mfix failed */
94 uint32_t txmbovr; /* # of times we dropped due to mbsize */
95 uint32_t dmaovr; /* tx dma overflow count */
96 uint32_t txoutspace; /* out of space in xmit buffer */
97 uint32_t txdtqout; /* out of DTQs */
98 uint32_t launch; /* total # of launches */
99 uint32_t hwpull; /* # of pulls off hardware service list */
100 uint32_t swadd; /* # of pushes on sw service list */
101 uint32_t rxqnotus; /* # of times we pull from rx q, but fail */
102 uint32_t rxqus; /* # of good pulls from rx q */
103 uint32_t rxdrqout; /* # of times out of DRQs */
104 uint32_t rxmbufout; /* # of time out of mbufs */
105 uint32_t txnomap; /* out of DMA maps in TX */
106};
107
108/*
109 * Each of these structures describes one of the eight transmit channels
110 */
111struct en_txslot {
112 uint32_t mbsize; /* # mbuf bytes in use (max=TXHIWAT) */
113 uint32_t bfree; /* # free bytes in buffer */
114 uint32_t start; /* start of buffer area (byte offset) */
115 uint32_t stop; /* ends of buffer area (byte offset) */
116 uint32_t cur; /* next free area (byte offset) */
117 uint32_t nref; /* # of VCs using this channel */
118 struct ifqueue q; /* mbufs waiting for DMA now */
119 struct ifqueue indma; /* mbufs waiting for DMA now */
120};
121
122/*
123 * Each of these structures is used for each of the receive buffers on the
124 * card.
125 */
126struct en_rxslot {
127 uint32_t mode; /* saved copy of mode info */
128 uint32_t start; /* begin of my buffer area */
129 uint32_t stop; /* end of my buffer area */
130 uint32_t cur; /* where I am at in the buffer */
131 struct en_vcc *vcc; /* backpointer to VCI */
132 struct ifqueue q; /* mbufs waiting for dma now */
133 struct ifqueue indma; /* mbufs being dma'd now */
134};
135
136struct en_vcc {
137 struct atmio_vcc vcc; /* required by common code */
138 void *rxhand;
|
140 uint32_t ipackets;
141 uint32_t opackets;
142 uint32_t ibytes;
143 uint32_t obytes;
144
145 uint8_t txspeed;
146 struct en_txslot *txslot; /* transmit slot */
147 struct en_rxslot *rxslot; /* receive slot */
148};
149#define VCC_DRAIN 0x0001 /* closed, but draining rx */
150#define VCC_SWSL 0x0002 /* on rx software service list */
151#define VCC_CLOSE_RX 0x0004 /* currently closing */
152
153/*
154 * softc
155 */
156struct en_softc {
157 /* bsd glue */
158 struct ifatm ifatm; /* ATM network ifnet handle */
159 device_t dev;
160
161 /* bus glue */
162 bus_space_tag_t en_memt; /* for EN_READ/EN_WRITE */
163 bus_space_handle_t en_base; /* base of en card */
164 bus_size_t en_obmemsz; /* size of en card (bytes) */
165 void (*en_busreset)(void *); /* bus specific reset function */
166 bus_dma_tag_t txtag; /* TX DMA tag */
167
168 /* serv list */
169 uint32_t hwslistp; /* hw pointer to service list (byte offset) */
170 uint16_t swslist[MID_SL_N]; /* software svc list (see en_service()) */
171 uint16_t swsl_head; /* ends of swslist (index into swslist) */
172 uint16_t swsl_tail;
173 uint32_t swsl_size; /* # of items in swsl */
174
175 /* xmit dma */
176 uint32_t dtq[MID_DTQ_N];/* sw copy of dma q (see EN_DQ_MK macros) */
177 uint32_t dtq_free; /* # of dtq's free */
178 uint32_t dtq_us; /* software copy of our pointer (byte offset) */
179 uint32_t dtq_chip; /* chip's pointer (byte offset) */
180 uint32_t need_dtqs; /* true if we ran out of DTQs */
181
182 /* recv dma */
183 uint32_t drq[MID_DRQ_N];/* sw copy of dma q (see ENIDQ macros) */
184 uint32_t drq_free; /* # of drq's free */
185 uint32_t drq_us; /* software copy of our pointer (byte offset) */
186 uint32_t drq_chip; /* chip's pointer (byte offset) */
187 uint32_t need_drqs; /* true if we ran out of DRQs */
188
189 /* xmit buf ctrl. (per channel) */
190 struct en_txslot txslot[MID_NTX_CH];
191
192 /* recv buf ctrl. (per recv slot) */
193 struct en_rxslot rxslot[EN_MAXNRX];
194 int en_nrx; /* # of active rx slots */
195
196 /* vccs */
197 struct en_vcc **vccs;
198 u_int vccs_open;
199 struct cv cv_close; /* close CV */
200
201 /* stats */
202 struct en_stats stats;
203
204 /* random stuff */
205 uint32_t ipl; /* sbus interrupt lvl (1 on pci?) */
206 uint8_t bestburstcode; /* code of best burst we can use */
207 uint8_t bestburstlen; /* length of best burst (bytes) */
208 uint8_t bestburstshift; /* (x >> shift) == (x / bestburstlen) */
209 uint8_t bestburstmask; /* bits to check if not multiple of burst */
210 uint8_t alburst; /* align dma bursts? */
211 uint8_t noalbursts; /* don't use unaligned > 4 byte bursts */
212 uint8_t is_adaptec; /* adaptec version of midway? */
213 struct mbuf *padbuf; /* buffer of zeros for TX padding */
214
215 /* mutex to protect this structure and the associated hardware */
216 struct mtx en_mtx;
217
218 /* sysctl support */
219 struct sysctl_ctx_list sysctl_ctx;
220 struct sysctl_oid *sysctl_tree;
221
222 /* memory zones */
223 uma_zone_t map_zone;
224
225 /* media and phy */
226 struct ifmedia media;
227 struct utopia utopia;
228
229#ifdef EN_DEBUG
230 /* debugging */
231 u_int debug;
232#endif
233};
234
235/*
236 * exported functions
237 */
238int en_attach(struct en_softc *);
239void en_destroy(struct en_softc *);
240void en_intr(void *);
241void en_reset(struct en_softc *);
242int en_modevent(module_t, int, void *arg);
| 140 uint32_t ipackets;
141 uint32_t opackets;
142 uint32_t ibytes;
143 uint32_t obytes;
144
145 uint8_t txspeed;
146 struct en_txslot *txslot; /* transmit slot */
147 struct en_rxslot *rxslot; /* receive slot */
148};
149#define VCC_DRAIN 0x0001 /* closed, but draining rx */
150#define VCC_SWSL 0x0002 /* on rx software service list */
151#define VCC_CLOSE_RX 0x0004 /* currently closing */
152
153/*
154 * softc
155 */
156struct en_softc {
157 /* bsd glue */
158 struct ifatm ifatm; /* ATM network ifnet handle */
159 device_t dev;
160
161 /* bus glue */
162 bus_space_tag_t en_memt; /* for EN_READ/EN_WRITE */
163 bus_space_handle_t en_base; /* base of en card */
164 bus_size_t en_obmemsz; /* size of en card (bytes) */
165 void (*en_busreset)(void *); /* bus specific reset function */
166 bus_dma_tag_t txtag; /* TX DMA tag */
167
168 /* serv list */
169 uint32_t hwslistp; /* hw pointer to service list (byte offset) */
170 uint16_t swslist[MID_SL_N]; /* software svc list (see en_service()) */
171 uint16_t swsl_head; /* ends of swslist (index into swslist) */
172 uint16_t swsl_tail;
173 uint32_t swsl_size; /* # of items in swsl */
174
175 /* xmit dma */
176 uint32_t dtq[MID_DTQ_N];/* sw copy of dma q (see EN_DQ_MK macros) */
177 uint32_t dtq_free; /* # of dtq's free */
178 uint32_t dtq_us; /* software copy of our pointer (byte offset) */
179 uint32_t dtq_chip; /* chip's pointer (byte offset) */
180 uint32_t need_dtqs; /* true if we ran out of DTQs */
181
182 /* recv dma */
183 uint32_t drq[MID_DRQ_N];/* sw copy of dma q (see ENIDQ macros) */
184 uint32_t drq_free; /* # of drq's free */
185 uint32_t drq_us; /* software copy of our pointer (byte offset) */
186 uint32_t drq_chip; /* chip's pointer (byte offset) */
187 uint32_t need_drqs; /* true if we ran out of DRQs */
188
189 /* xmit buf ctrl. (per channel) */
190 struct en_txslot txslot[MID_NTX_CH];
191
192 /* recv buf ctrl. (per recv slot) */
193 struct en_rxslot rxslot[EN_MAXNRX];
194 int en_nrx; /* # of active rx slots */
195
196 /* vccs */
197 struct en_vcc **vccs;
198 u_int vccs_open;
199 struct cv cv_close; /* close CV */
200
201 /* stats */
202 struct en_stats stats;
203
204 /* random stuff */
205 uint32_t ipl; /* sbus interrupt lvl (1 on pci?) */
206 uint8_t bestburstcode; /* code of best burst we can use */
207 uint8_t bestburstlen; /* length of best burst (bytes) */
208 uint8_t bestburstshift; /* (x >> shift) == (x / bestburstlen) */
209 uint8_t bestburstmask; /* bits to check if not multiple of burst */
210 uint8_t alburst; /* align dma bursts? */
211 uint8_t noalbursts; /* don't use unaligned > 4 byte bursts */
212 uint8_t is_adaptec; /* adaptec version of midway? */
213 struct mbuf *padbuf; /* buffer of zeros for TX padding */
214
215 /* mutex to protect this structure and the associated hardware */
216 struct mtx en_mtx;
217
218 /* sysctl support */
219 struct sysctl_ctx_list sysctl_ctx;
220 struct sysctl_oid *sysctl_tree;
221
222 /* memory zones */
223 uma_zone_t map_zone;
224
225 /* media and phy */
226 struct ifmedia media;
227 struct utopia utopia;
228
229#ifdef EN_DEBUG
230 /* debugging */
231 u_int debug;
232#endif
233};
234
235/*
236 * exported functions
237 */
238int en_attach(struct en_softc *);
239void en_destroy(struct en_softc *);
240void en_intr(void *);
241void en_reset(struct en_softc *);
242int en_modevent(module_t, int, void *arg);
|