1/*-
2 * Copyright (c) 2005, M. Warner Losh
3 * Copyright (c) 1995, David Greenman
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
11 * disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
| 1/*-
2 * Copyright (c) 2005, M. Warner Losh
3 * Copyright (c) 1995, David Greenman
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
11 * disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
|
28 * $FreeBSD: head/sys/dev/ed/if_ed_pccard.c 191469 2009-04-24 17:28:12Z imp $
| 28 * $FreeBSD: head/sys/dev/ed/if_ed_pccard.c 199380 2009-11-17 14:23:09Z jhb $
|
29 */
30
31/*
32 * Notes for adding media support. Each chipset is somewhat different
33 * from the others. Linux has a table of OIDs that it uses to see what
34 * supports the misc register of the NS83903. But a sampling of datasheets
35 * I could dig up on cards I own paints a different picture.
36 *
37 * Chipset specific details:
38 * NS 83903/902A paired
39 * ccr base 0x1020
40 * id register at 0x1000: 7-3 = 0, 2-0 = 1.
41 * (maybe this test is too week)
42 * misc register at 0x018:
43 * 6 WAIT_TOUTENABLE enable watchdog timeout
44 * 3 AUI/TPI 1 AUX, 0 TPI
45 * 2 loopback
46 * 1 gdlink (tpi mode only) 1 tp good, 0 tp bad
47 * 0 0-no mam, 1 mam connected
48 *
49 * NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II
50 * and the NEC PC9801N-J12 ccr base 0x2000!
51 *
52 * winbond 289c926
53 * ccr base 0xfd0
54 * cfb (am 0xff2):
55 * 0-1 PHY01 00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ)
56 * 2 LNKEN 0 - enable link and auto switch, 1 disable
57 * 3 LNKSTS TPI + LNKEN=0 + link good == 1, else 0
58 * sr (am 0xff4)
59 * 88 00 88 00 88 00, etc
60 *
61 * TMI tc3299a (cr PHY01 == 0)
62 * ccr base 0x3f8
63 * cra (io 0xa)
64 * crb (io 0xb)
65 * 0-1 PHY01 00 auto, 01 res, 10 10B5, 11 TPI
66 * 2 GDLINK 1 disable checking of link
67 * 6 LINK 0 bad link, 1 good link
68 *
69 * EN5017A, EN5020 no data, but very popular
70 * Other chips?
71 * NetBSD supports RTL8019, but none have surfaced that I can see
72 */
73
74#include <sys/param.h>
75#include <sys/systm.h>
76#include <sys/socket.h>
77#include <sys/kernel.h>
78#include <sys/conf.h>
79#include <sys/uio.h>
80
81#include <sys/module.h>
82#include <sys/bus.h>
83#include <machine/bus.h>
84#include <sys/rman.h>
85#include <machine/resource.h>
86
87#include <net/ethernet.h>
88#include <net/if.h>
89#include <net/if_arp.h>
90#include <net/if_mib.h>
91#include <net/if_media.h>
92
93#include <dev/ed/if_edreg.h>
94#include <dev/ed/if_edvar.h>
95#include <dev/ed/ax88x90reg.h>
96#include <dev/ed/dl100xxreg.h>
97#include <dev/ed/tc5299jreg.h>
98#include <dev/pccard/pccardvar.h>
99#include <dev/pccard/pccardreg.h>
100#include <dev/pccard/pccard_cis.h>
101#include <dev/mii/mii.h>
102#include <dev/mii/miivar.h>
103
104#include "card_if.h"
105/* "device miibus" required. See GENERIC if you get errors here. */
106#include "miibus_if.h"
107#include "pccarddevs.h"
108
109/*
110 * NE-2000 based PC Cards have a number of ways to get the MAC address.
111 * Some cards encode this as a FUNCE. Others have this in the ROMs the
112 * same way that ISA cards do. Some have it encoded in the attribute
113 * memory somewhere that isn't in the CIS. Some new chipsets have it
114 * in special registers in the ASIC part of the chip.
115 *
116 * For those cards that have the MAC adress stored in attribute memory
117 * outside of a FUNCE entry in the CIS, nearly all of them have it at
118 * a fixed offset (0xff0). We use that offset as a source of last
119 * resource if other offsets have failed. This is the address of the
120 * National Semiconductor DP83903A, which is the only chip's datasheet
121 * I've found.
122 */
123#define ED_DEFAULT_MAC_OFFSET 0xff0
124
125static const struct ed_product {
126 struct pccard_product prod;
127 int flags;
128#define NE2000DVF_DL100XX 0x0001 /* chip is D-Link DL10019/22 */
129#define NE2000DVF_AX88X90 0x0002 /* chip is ASIX AX88[17]90 */
130#define NE2000DVF_TC5299J 0x0004 /* chip is Tamarack TC5299J */
131#define NE2000DVF_TOSHIBA 0x0008 /* Toshiba DP83902A */
132#define NE2000DVF_ENADDR 0x0100 /* Get MAC from attr mem */
133#define NE2000DVF_ANYFUNC 0x0200 /* Allow any function type */
134#define NE2000DVF_MODEM 0x0400 /* Has a modem/serial */
135 int enoff;
136} ed_pccard_products[] = {
137 { PCMCIA_CARD(ACCTON, EN2212), 0},
138 { PCMCIA_CARD(ACCTON, EN2216), 0},
139 { PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0},
140 { PCMCIA_CARD(AMBICOM, AMB8002), 0},
141 { PCMCIA_CARD(AMBICOM, AMB8002T), 0},
142 { PCMCIA_CARD(AMBICOM, AMB8010), 0},
143 { PCMCIA_CARD(AMBICOM, AMB8010_ALT), 0},
144 { PCMCIA_CARD(AMBICOM, AMB8610), 0},
145 { PCMCIA_CARD(BILLIONTON, CFLT10N), 0},
146 { PCMCIA_CARD(BILLIONTON, LNA100B), NE2000DVF_AX88X90},
147 { PCMCIA_CARD(BILLIONTON, LNT10TB), 0},
148 { PCMCIA_CARD(BILLIONTON, LNT10TN), 0},
149 { PCMCIA_CARD(BROMAX, AXNET), NE2000DVF_AX88X90},
150 { PCMCIA_CARD(BROMAX, IPORT), 0},
151 { PCMCIA_CARD(BROMAX, IPORT2), 0},
152 { PCMCIA_CARD(BUFFALO, LPC2_CLT), 0},
153 { PCMCIA_CARD(BUFFALO, LPC3_CLT), 0},
154 { PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90},
155 { PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90},
156 { PCMCIA_CARD(BUFFALO, LPC4_CLX), NE2000DVF_AX88X90},
157 { PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0},
158 { PCMCIA_CARD(CNET, NE2000), 0},
159 { PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90},
160 { PCMCIA_CARD(COMPEX, LANMODEM), 0},
161 { PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0},
162 { PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0},
163 { PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0},
164 { PCMCIA_CARD(COREGA, ETHER_PCC_T), 0},
165 { PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0},
166 { PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX},
167 { PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90},
168 { PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX},
169 { PCMCIA_CARD(COREGA, FETHER_II_PCC_TXD), NE2000DVF_AX88X90},
170 { PCMCIA_CARD(COREGA, LAPCCTXD), 0},
171 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0},
172 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0},
173 { PCMCIA_CARD(DLINK, DE650), NE2000DVF_ANYFUNC },
174 { PCMCIA_CARD(DLINK, DE660), 0 },
175 { PCMCIA_CARD(DLINK, DE660PLUS), 0},
176 { PCMCIA_CARD(DYNALINK, L10C), 0},
177 { PCMCIA_CARD(EDIMAX, EP4000A), 0},
178 { PCMCIA_CARD(EPSON, EEN10B), 0},
179 { PCMCIA_CARD(EXP, THINLANCOMBO), 0},
180 { PCMCIA_CARD(GLOBALVILLAGE, LANMODEM), 0},
181 { PCMCIA_CARD(GREY_CELL, TDK3000), 0},
182 { PCMCIA_CARD(GREY_CELL, DMF650TX),
183 NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM},
184 { PCMCIA_CARD(GVC, NIC_2000P), 0},
185 { PCMCIA_CARD(IBM, HOME_AND_AWAY), 0},
186 { PCMCIA_CARD(IBM, INFOMOVER), 0},
187 { PCMCIA_CARD(IODATA3, PCLAT), 0},
188 { PCMCIA_CARD(KINGSTON, CIO10T), 0},
189 { PCMCIA_CARD(KINGSTON, KNE2), 0},
190 { PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90},
191 /* Same ID for many different cards, including generic NE2000 */
192 { PCMCIA_CARD(LINKSYS, COMBO_ECARD),
193 NE2000DVF_DL100XX | NE2000DVF_AX88X90},
194 { PCMCIA_CARD(LINKSYS, ECARD_1), 0},
195 { PCMCIA_CARD(LINKSYS, ECARD_2), 0},
196 { PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX},
197 { PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0},
198 { PCMCIA_CARD(MACNICA, ME1_JEIDA), 0},
199 { PCMCIA_CARD(MAGICRAM, ETHER), 0},
200 { PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90},
201 { PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90},
202 { PCMCIA_CARD(MELCO2, LPC2_T), 0},
203 { PCMCIA_CARD(MELCO2, LPC2_TX), 0},
204 { PCMCIA_CARD(MITSUBISHI, B8895), NE2000DVF_ANYFUNC}, /* NG */
205 { PCMCIA_CARD(MICRORESEARCH, MR10TPC), 0},
206 { PCMCIA_CARD(NDC, ND5100_E), 0},
207 { PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX},
208 /* Same ID as DLINK DFE-670TXD. 670 has DL10022, fa411 has ax88790 */
209 { PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX},
210 { PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0},
211 { PCMCIA_CARD(NEWMEDIA, LANSURFER), NE2000DVF_ANYFUNC},
212 { PCMCIA_CARD(NEWMEDIA, LIVEWIRE), 0},
213 { PCMCIA_CARD(OEM2, 100BASE), NE2000DVF_AX88X90},
214 { PCMCIA_CARD(OEM2, ETHERNET), 0},
215 { PCMCIA_CARD(OEM2, FAST_ETHERNET), NE2000DVF_AX88X90},
216 { PCMCIA_CARD(OEM2, NE2000), 0},
217 { PCMCIA_CARD(PLANET, SMARTCOM2000), 0 },
218 { PCMCIA_CARD(PREMAX, PE200), 0},
219 { PCMCIA_CARD(PSION, LANGLOBAL),
220 NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM},
221 { PCMCIA_CARD(RACORE, ETHERNET), 0},
222 { PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90},
223 { PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90 | NE2000DVF_TC5299J},
224 { PCMCIA_CARD(RELIA, COMBO), 0},
225 { PCMCIA_CARD(RIOS, PCCARD3), 0},
226 { PCMCIA_CARD(RPTI, EP400), 0},
227 { PCMCIA_CARD(RPTI, EP401), 0},
228 { PCMCIA_CARD(SMC, EZCARD), 0},
229 { PCMCIA_CARD(SOCKET, EA_ETHER), 0},
230 { PCMCIA_CARD(SOCKET, ES_1000), 0},
231 { PCMCIA_CARD(SOCKET, LP_ETHER), 0},
232 { PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0},
233 { PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX},
234 { PCMCIA_CARD(SVEC, COMBOCARD), 0},
235 { PCMCIA_CARD(SVEC, LANCARD), 0},
236 { PCMCIA_CARD(TAMARACK, ETHERNET), 0},
237 { PCMCIA_CARD(TDK, CFE_10), 0},
238 { PCMCIA_CARD(TDK, LAK_CD031), 0},
239 { PCMCIA_CARD(TDK, DFL5610WS), 0},
240 { PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 },
241 { PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90},
242 { PCMCIA_CARD(TJ, PTJ_LAN_T), 0 },
243 { PCMCIA_CARD(TOSHIBA2, LANCT00A), NE2000DVF_ANYFUNC | NE2000DVF_TOSHIBA},
244 { PCMCIA_CARD(ZONET, ZEN), 0},
245 { { NULL } }
246};
247
248/*
249 * PC Card (PCMCIA) specific code.
250 */
251static int ed_pccard_probe(device_t);
252static int ed_pccard_attach(device_t);
| 29 */
30
31/*
32 * Notes for adding media support. Each chipset is somewhat different
33 * from the others. Linux has a table of OIDs that it uses to see what
34 * supports the misc register of the NS83903. But a sampling of datasheets
35 * I could dig up on cards I own paints a different picture.
36 *
37 * Chipset specific details:
38 * NS 83903/902A paired
39 * ccr base 0x1020
40 * id register at 0x1000: 7-3 = 0, 2-0 = 1.
41 * (maybe this test is too week)
42 * misc register at 0x018:
43 * 6 WAIT_TOUTENABLE enable watchdog timeout
44 * 3 AUI/TPI 1 AUX, 0 TPI
45 * 2 loopback
46 * 1 gdlink (tpi mode only) 1 tp good, 0 tp bad
47 * 0 0-no mam, 1 mam connected
48 *
49 * NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II
50 * and the NEC PC9801N-J12 ccr base 0x2000!
51 *
52 * winbond 289c926
53 * ccr base 0xfd0
54 * cfb (am 0xff2):
55 * 0-1 PHY01 00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ)
56 * 2 LNKEN 0 - enable link and auto switch, 1 disable
57 * 3 LNKSTS TPI + LNKEN=0 + link good == 1, else 0
58 * sr (am 0xff4)
59 * 88 00 88 00 88 00, etc
60 *
61 * TMI tc3299a (cr PHY01 == 0)
62 * ccr base 0x3f8
63 * cra (io 0xa)
64 * crb (io 0xb)
65 * 0-1 PHY01 00 auto, 01 res, 10 10B5, 11 TPI
66 * 2 GDLINK 1 disable checking of link
67 * 6 LINK 0 bad link, 1 good link
68 *
69 * EN5017A, EN5020 no data, but very popular
70 * Other chips?
71 * NetBSD supports RTL8019, but none have surfaced that I can see
72 */
73
74#include <sys/param.h>
75#include <sys/systm.h>
76#include <sys/socket.h>
77#include <sys/kernel.h>
78#include <sys/conf.h>
79#include <sys/uio.h>
80
81#include <sys/module.h>
82#include <sys/bus.h>
83#include <machine/bus.h>
84#include <sys/rman.h>
85#include <machine/resource.h>
86
87#include <net/ethernet.h>
88#include <net/if.h>
89#include <net/if_arp.h>
90#include <net/if_mib.h>
91#include <net/if_media.h>
92
93#include <dev/ed/if_edreg.h>
94#include <dev/ed/if_edvar.h>
95#include <dev/ed/ax88x90reg.h>
96#include <dev/ed/dl100xxreg.h>
97#include <dev/ed/tc5299jreg.h>
98#include <dev/pccard/pccardvar.h>
99#include <dev/pccard/pccardreg.h>
100#include <dev/pccard/pccard_cis.h>
101#include <dev/mii/mii.h>
102#include <dev/mii/miivar.h>
103
104#include "card_if.h"
105/* "device miibus" required. See GENERIC if you get errors here. */
106#include "miibus_if.h"
107#include "pccarddevs.h"
108
109/*
110 * NE-2000 based PC Cards have a number of ways to get the MAC address.
111 * Some cards encode this as a FUNCE. Others have this in the ROMs the
112 * same way that ISA cards do. Some have it encoded in the attribute
113 * memory somewhere that isn't in the CIS. Some new chipsets have it
114 * in special registers in the ASIC part of the chip.
115 *
116 * For those cards that have the MAC adress stored in attribute memory
117 * outside of a FUNCE entry in the CIS, nearly all of them have it at
118 * a fixed offset (0xff0). We use that offset as a source of last
119 * resource if other offsets have failed. This is the address of the
120 * National Semiconductor DP83903A, which is the only chip's datasheet
121 * I've found.
122 */
123#define ED_DEFAULT_MAC_OFFSET 0xff0
124
125static const struct ed_product {
126 struct pccard_product prod;
127 int flags;
128#define NE2000DVF_DL100XX 0x0001 /* chip is D-Link DL10019/22 */
129#define NE2000DVF_AX88X90 0x0002 /* chip is ASIX AX88[17]90 */
130#define NE2000DVF_TC5299J 0x0004 /* chip is Tamarack TC5299J */
131#define NE2000DVF_TOSHIBA 0x0008 /* Toshiba DP83902A */
132#define NE2000DVF_ENADDR 0x0100 /* Get MAC from attr mem */
133#define NE2000DVF_ANYFUNC 0x0200 /* Allow any function type */
134#define NE2000DVF_MODEM 0x0400 /* Has a modem/serial */
135 int enoff;
136} ed_pccard_products[] = {
137 { PCMCIA_CARD(ACCTON, EN2212), 0},
138 { PCMCIA_CARD(ACCTON, EN2216), 0},
139 { PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0},
140 { PCMCIA_CARD(AMBICOM, AMB8002), 0},
141 { PCMCIA_CARD(AMBICOM, AMB8002T), 0},
142 { PCMCIA_CARD(AMBICOM, AMB8010), 0},
143 { PCMCIA_CARD(AMBICOM, AMB8010_ALT), 0},
144 { PCMCIA_CARD(AMBICOM, AMB8610), 0},
145 { PCMCIA_CARD(BILLIONTON, CFLT10N), 0},
146 { PCMCIA_CARD(BILLIONTON, LNA100B), NE2000DVF_AX88X90},
147 { PCMCIA_CARD(BILLIONTON, LNT10TB), 0},
148 { PCMCIA_CARD(BILLIONTON, LNT10TN), 0},
149 { PCMCIA_CARD(BROMAX, AXNET), NE2000DVF_AX88X90},
150 { PCMCIA_CARD(BROMAX, IPORT), 0},
151 { PCMCIA_CARD(BROMAX, IPORT2), 0},
152 { PCMCIA_CARD(BUFFALO, LPC2_CLT), 0},
153 { PCMCIA_CARD(BUFFALO, LPC3_CLT), 0},
154 { PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90},
155 { PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90},
156 { PCMCIA_CARD(BUFFALO, LPC4_CLX), NE2000DVF_AX88X90},
157 { PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0},
158 { PCMCIA_CARD(CNET, NE2000), 0},
159 { PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90},
160 { PCMCIA_CARD(COMPEX, LANMODEM), 0},
161 { PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0},
162 { PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0},
163 { PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0},
164 { PCMCIA_CARD(COREGA, ETHER_PCC_T), 0},
165 { PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0},
166 { PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX},
167 { PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90},
168 { PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX},
169 { PCMCIA_CARD(COREGA, FETHER_II_PCC_TXD), NE2000DVF_AX88X90},
170 { PCMCIA_CARD(COREGA, LAPCCTXD), 0},
171 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0},
172 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0},
173 { PCMCIA_CARD(DLINK, DE650), NE2000DVF_ANYFUNC },
174 { PCMCIA_CARD(DLINK, DE660), 0 },
175 { PCMCIA_CARD(DLINK, DE660PLUS), 0},
176 { PCMCIA_CARD(DYNALINK, L10C), 0},
177 { PCMCIA_CARD(EDIMAX, EP4000A), 0},
178 { PCMCIA_CARD(EPSON, EEN10B), 0},
179 { PCMCIA_CARD(EXP, THINLANCOMBO), 0},
180 { PCMCIA_CARD(GLOBALVILLAGE, LANMODEM), 0},
181 { PCMCIA_CARD(GREY_CELL, TDK3000), 0},
182 { PCMCIA_CARD(GREY_CELL, DMF650TX),
183 NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM},
184 { PCMCIA_CARD(GVC, NIC_2000P), 0},
185 { PCMCIA_CARD(IBM, HOME_AND_AWAY), 0},
186 { PCMCIA_CARD(IBM, INFOMOVER), 0},
187 { PCMCIA_CARD(IODATA3, PCLAT), 0},
188 { PCMCIA_CARD(KINGSTON, CIO10T), 0},
189 { PCMCIA_CARD(KINGSTON, KNE2), 0},
190 { PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90},
191 /* Same ID for many different cards, including generic NE2000 */
192 { PCMCIA_CARD(LINKSYS, COMBO_ECARD),
193 NE2000DVF_DL100XX | NE2000DVF_AX88X90},
194 { PCMCIA_CARD(LINKSYS, ECARD_1), 0},
195 { PCMCIA_CARD(LINKSYS, ECARD_2), 0},
196 { PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX},
197 { PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0},
198 { PCMCIA_CARD(MACNICA, ME1_JEIDA), 0},
199 { PCMCIA_CARD(MAGICRAM, ETHER), 0},
200 { PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90},
201 { PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90},
202 { PCMCIA_CARD(MELCO2, LPC2_T), 0},
203 { PCMCIA_CARD(MELCO2, LPC2_TX), 0},
204 { PCMCIA_CARD(MITSUBISHI, B8895), NE2000DVF_ANYFUNC}, /* NG */
205 { PCMCIA_CARD(MICRORESEARCH, MR10TPC), 0},
206 { PCMCIA_CARD(NDC, ND5100_E), 0},
207 { PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX},
208 /* Same ID as DLINK DFE-670TXD. 670 has DL10022, fa411 has ax88790 */
209 { PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX},
210 { PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0},
211 { PCMCIA_CARD(NEWMEDIA, LANSURFER), NE2000DVF_ANYFUNC},
212 { PCMCIA_CARD(NEWMEDIA, LIVEWIRE), 0},
213 { PCMCIA_CARD(OEM2, 100BASE), NE2000DVF_AX88X90},
214 { PCMCIA_CARD(OEM2, ETHERNET), 0},
215 { PCMCIA_CARD(OEM2, FAST_ETHERNET), NE2000DVF_AX88X90},
216 { PCMCIA_CARD(OEM2, NE2000), 0},
217 { PCMCIA_CARD(PLANET, SMARTCOM2000), 0 },
218 { PCMCIA_CARD(PREMAX, PE200), 0},
219 { PCMCIA_CARD(PSION, LANGLOBAL),
220 NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM},
221 { PCMCIA_CARD(RACORE, ETHERNET), 0},
222 { PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90},
223 { PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90 | NE2000DVF_TC5299J},
224 { PCMCIA_CARD(RELIA, COMBO), 0},
225 { PCMCIA_CARD(RIOS, PCCARD3), 0},
226 { PCMCIA_CARD(RPTI, EP400), 0},
227 { PCMCIA_CARD(RPTI, EP401), 0},
228 { PCMCIA_CARD(SMC, EZCARD), 0},
229 { PCMCIA_CARD(SOCKET, EA_ETHER), 0},
230 { PCMCIA_CARD(SOCKET, ES_1000), 0},
231 { PCMCIA_CARD(SOCKET, LP_ETHER), 0},
232 { PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0},
233 { PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX},
234 { PCMCIA_CARD(SVEC, COMBOCARD), 0},
235 { PCMCIA_CARD(SVEC, LANCARD), 0},
236 { PCMCIA_CARD(TAMARACK, ETHERNET), 0},
237 { PCMCIA_CARD(TDK, CFE_10), 0},
238 { PCMCIA_CARD(TDK, LAK_CD031), 0},
239 { PCMCIA_CARD(TDK, DFL5610WS), 0},
240 { PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 },
241 { PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90},
242 { PCMCIA_CARD(TJ, PTJ_LAN_T), 0 },
243 { PCMCIA_CARD(TOSHIBA2, LANCT00A), NE2000DVF_ANYFUNC | NE2000DVF_TOSHIBA},
244 { PCMCIA_CARD(ZONET, ZEN), 0},
245 { { NULL } }
246};
247
248/*
249 * PC Card (PCMCIA) specific code.
250 */
251static int ed_pccard_probe(device_t);
252static int ed_pccard_attach(device_t);
|
253static void ed_pccard_tick(void *);
| 253static void ed_pccard_tick(struct ed_softc *);
|
254
255static int ed_pccard_dl100xx(device_t dev, const struct ed_product *);
256static void ed_pccard_dl100xx_mii_reset(struct ed_softc *sc);
257static u_int ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits);
258static void ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val,
259 int nbits);
260
261static int ed_pccard_ax88x90(device_t dev, const struct ed_product *);
262static u_int ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits);
263static void ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val,
264 int nbits);
265
266static int ed_miibus_readreg(device_t dev, int phy, int reg);
267static int ed_ifmedia_upd(struct ifnet *);
268static void ed_ifmedia_sts(struct ifnet *, struct ifmediareq *);
269
270static int ed_pccard_tc5299j(device_t dev, const struct ed_product *);
271static u_int ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits);
272static void ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val,
273 int nbits);
274
275static void
276ed_pccard_print_entry(const struct ed_product *pp)
277{
278 int i;
279
280 printf("Product entry: ");
281 if (pp->prod.pp_name)
282 printf("name='%s',", pp->prod.pp_name);
283 printf("vendor=%#x,product=%#x", pp->prod.pp_vendor,
284 pp->prod.pp_product);
285 for (i = 0; i < 4; i++)
286 if (pp->prod.pp_cis[i])
287 printf(",CIS%d='%s'", i, pp->prod.pp_cis[i]);
288 printf("\n");
289}
290
291static int
292ed_pccard_probe(device_t dev)
293{
294 const struct ed_product *pp, *pp2;
295 int error, first = 1;
296 uint32_t fcn = PCCARD_FUNCTION_UNSPEC;
297
298 /* Make sure we're a network function */
299 error = pccard_get_function(dev, &fcn);
300 if (error != 0)
301 return (error);
302
303 if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
304 (const struct pccard_product *) ed_pccard_products,
305 sizeof(ed_pccard_products[0]), NULL)) != NULL) {
306 if (pp->prod.pp_name != NULL)
307 device_set_desc(dev, pp->prod.pp_name);
308 /*
309 * Some devices don't ID themselves as network, but
310 * that's OK if the flags say so.
311 */
312 if (!(pp->flags & NE2000DVF_ANYFUNC) &&
313 fcn != PCCARD_FUNCTION_NETWORK)
314 return (ENXIO);
315 /*
316 * Some devices match multiple entries. Report that
317 * as a warning to help cull the table
318 */
319 pp2 = pp;
320 while ((pp2 = (const struct ed_product *)pccard_product_lookup(
321 dev, (const struct pccard_product *)(pp2 + 1),
322 sizeof(ed_pccard_products[0]), NULL)) != NULL) {
323 if (first) {
324 device_printf(dev,
325 "Warning: card matches multiple entries. Report to imp@freebsd.org\n");
326 ed_pccard_print_entry(pp);
327 first = 0;
328 }
329 ed_pccard_print_entry(pp2);
330 }
331
332 return (0);
333 }
334 return (ENXIO);
335}
336
337static int
338ed_pccard_rom_mac(device_t dev, uint8_t *enaddr)
339{
340 struct ed_softc *sc = device_get_softc(dev);
341 uint8_t romdata[32], sum;
342 int i;
343
344 /*
345 * Read in the rom data at location 0. Since there are no
346 * NE-1000 based PC Card devices, we'll assume we're 16-bit.
347 *
348 * In researching what format this takes, I've found that the
349 * following appears to be true for multiple cards based on
350 * observation as well as datasheet digging.
351 *
352 * Data is stored in some ROM and is copied out 8 bits at a time
353 * into 16-bit wide locations. This means that the odd locations
354 * of the ROM are not used (and can be either 0 or ff).
355 *
356 * The contents appears to be as follows:
357 * PROM RAM
358 * Offset Offset What
359 * 0 0 ENETADDR 0
360 * 1 2 ENETADDR 1
361 * 2 4 ENETADDR 2
362 * 3 6 ENETADDR 3
363 * 4 8 ENETADDR 4
364 * 5 10 ENETADDR 5
365 * 6-13 12-26 Reserved (varies by manufacturer)
366 * 14 28 0x57
367 * 15 30 0x57
368 *
369 * Some manufacturers have another image of enetaddr from
370 * PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but
371 * this doesn't appear to be universally documented in the
372 * datasheets. Some manufactuers have a card type, card config
373 * checksums, etc encoded into PROM offset 6-13, but deciphering it
374 * requires more knowledge about the exact underlying chipset than
375 * we possess (and maybe can possess).
376 */
377 ed_pio_readmem(sc, 0, romdata, 32);
378 if (bootverbose)
379 device_printf(dev, "ROM DATA: %32D\n", romdata, " ");
380 if (romdata[28] != 0x57 || romdata[30] != 0x57)
381 return (0);
382 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
383 sum |= romdata[i * 2];
384 if (sum == 0)
385 return (0);
386 for (i = 0; i < ETHER_ADDR_LEN; i++)
387 enaddr[i] = romdata[i * 2];
388 return (1);
389}
390
391static int
392ed_pccard_add_modem(device_t dev)
393{
394 device_printf(dev, "Need to write this code\n");
395 return 0;
396}
397
398static int
399ed_pccard_kick_phy(struct ed_softc *sc)
400{
401 struct mii_softc *miisc;
402 struct mii_data *mii;
403
404 /*
405 * Many of the PHYs that wind up on PC Cards are weird in
406 * this way. Generally, we don't need to worry so much about
407 * the Isolation protocol since there's only one PHY in
408 * these designs, so this workaround is reasonable.
409 */
410 mii = device_get_softc(sc->miibus);
411 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
412 miisc->mii_flags |= MIIF_FORCEANEG;
413 mii_phy_reset(miisc);
414 }
415 return (mii_mediachg(mii));
416}
417
418static int
419ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
420{
421 struct mii_data *mii;
422
423 if (sc->miibus == NULL)
424 return (EINVAL);
425 mii = device_get_softc(sc->miibus);
426 return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command));
427}
428
429
430static void
431ed_pccard_mediachg(struct ed_softc *sc)
432{
433 struct mii_data *mii;
434
435 if (sc->miibus == NULL)
436 return;
437 mii = device_get_softc(sc->miibus);
438 mii_mediachg(mii);
439}
440
441static int
442ed_pccard_attach(device_t dev)
443{
444 u_char sum;
445 u_char enaddr[ETHER_ADDR_LEN];
446 const struct ed_product *pp;
447 int error, i, flags, port_rid, modem_rid;
448 struct ed_softc *sc = device_get_softc(dev);
449 u_long size;
450 static uint16_t *intr_vals[] = {NULL, NULL};
451
452 sc->dev = dev;
453 if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
454 (const struct pccard_product *) ed_pccard_products,
455 sizeof(ed_pccard_products[0]), NULL)) == NULL) {
456 printf("Can't find\n");
457 return (ENXIO);
458 }
459 modem_rid = port_rid = -1;
460 if (pp->flags & NE2000DVF_MODEM) {
461 for (i = 0; i < 4; i++) {
462 size = bus_get_resource_count(dev, SYS_RES_IOPORT, i);
463 if (size == ED_NOVELL_IO_PORTS)
464 port_rid = i;
465 else if (size == 8)
466 modem_rid = i;
467 }
468 if (port_rid == -1) {
469 device_printf(dev, "Cannot locate my ports!\n");
470 return (ENXIO);
471 }
472 } else {
473 port_rid = 0;
474 }
475 /* Allocate the port resource during setup. */
476 error = ed_alloc_port(dev, port_rid, ED_NOVELL_IO_PORTS);
477 if (error) {
478 printf("alloc_port failed\n");
479 return (error);
480 }
481 if (rman_get_size(sc->port_res) == ED_NOVELL_IO_PORTS / 2) {
482 port_rid++;
483 sc->port_res2 = bus_alloc_resource(dev, SYS_RES_IOPORT,
484 &port_rid, 0ul, ~0ul, 1, RF_ACTIVE);
485 if (sc->port_res2 == NULL ||
486 rman_get_size(sc->port_res2) != ED_NOVELL_IO_PORTS / 2) {
487 error = ENXIO;
488 goto bad;
489 }
490 }
491 error = ed_alloc_irq(dev, 0, 0);
492 if (error)
493 goto bad;
494
495 /*
496 * Determine which chipset we are. Almost all the PC Card chipsets
497 * have the Novel ASIC and NIC offsets. There's 2 known cards that
498 * follow the WD80x3 conventions, which are handled as a special case.
499 */
500 sc->asic_offset = ED_NOVELL_ASIC_OFFSET;
501 sc->nic_offset = ED_NOVELL_NIC_OFFSET;
502 error = ENXIO;
503 flags = device_get_flags(dev);
504 if (error != 0)
505 error = ed_pccard_dl100xx(dev, pp);
506 if (error != 0)
507 error = ed_pccard_ax88x90(dev, pp);
508 if (error != 0)
509 error = ed_pccard_tc5299j(dev, pp);
510 if (error != 0) {
511 error = ed_probe_Novell_generic(dev, flags);
512 printf("Novell probe generic %d\n", error);
513 }
514 if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) {
515 flags |= ED_FLAGS_TOSH_ETHER;
516 flags |= ED_FLAGS_PCCARD;
517 sc->asic_offset = ED_WD_ASIC_OFFSET;
518 sc->nic_offset = ED_WD_NIC_OFFSET;
519 error = ed_probe_WD80x3_generic(dev, flags, intr_vals);
520 }
521 if (error)
522 goto bad;
523
524 /*
525 * There are several ways to get the MAC address for the card.
526 * Some of the above probe routines can fill in the enaddr. If
527 * not, we run through a number of 'well known' locations:
528 * (1) From the PC Card FUNCE
529 * (2) From offset 0 in the shared memory
530 * (3) From a hinted offset in attribute memory
531 * (4) From 0xff0 in attribute memory
532 * If we can't get a non-zero MAC address from this list, we fail.
533 */
534 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
535 sum |= sc->enaddr[i];
536 if (sum == 0) {
537 pccard_get_ether(dev, enaddr);
538 if (bootverbose)
539 device_printf(dev, "CIS MAC %6D\n", enaddr, ":");
540 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
541 sum |= enaddr[i];
542 if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) {
543 if (bootverbose)
544 device_printf(dev, "ROM mac %6D\n", enaddr,
545 ":");
546 sum++;
547 }
548 if (sum == 0 && pp->flags & NE2000DVF_ENADDR) {
549 for (i = 0; i < ETHER_ADDR_LEN; i++) {
550 pccard_attr_read_1(dev, pp->enoff + i * 2,
551 enaddr + i);
552 sum |= enaddr[i];
553 }
554 if (bootverbose)
555 device_printf(dev, "Hint %x MAC %6D\n",
556 pp->enoff, enaddr, ":");
557 }
558 if (sum == 0) {
559 for (i = 0; i < ETHER_ADDR_LEN; i++) {
560 pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET +
561 i * 2, enaddr + i);
562 sum |= enaddr[i];
563 }
564 if (bootverbose)
565 device_printf(dev, "Fallback MAC %6D\n",
566 enaddr, ":");
567 }
568 if (sum == 0) {
569 device_printf(dev, "Cannot extract MAC address.\n");
570 ed_release_resources(dev);
571 return (ENXIO);
572 }
573 bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN);
574 }
575
576 error = ed_attach(dev);
577 if (error)
578 goto bad;
579 if (sc->chip_type == ED_CHIP_TYPE_DL10019 ||
580 sc->chip_type == ED_CHIP_TYPE_DL10022) {
581 /* Probe for an MII bus, but ignore errors. */
582 ed_pccard_dl100xx_mii_reset(sc);
583 (void)mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
584 ed_ifmedia_sts);
585 } else if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
586 sc->chip_type == ED_CHIP_TYPE_AX88790) {
587 if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
588 ed_ifmedia_sts)) != 0) {
589 device_printf(dev, "Missing mii %d!\n", error);
590 goto bad;
591 }
592
593 } else if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
594 if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
595 ed_ifmedia_sts)) != 0) {
596 device_printf(dev, "Missing mii!\n");
597 goto bad;
598 }
599
600 }
601 if (sc->miibus != NULL) {
602 sc->sc_tick = ed_pccard_tick;
603 sc->sc_mediachg = ed_pccard_mediachg;
604 sc->sc_media_ioctl = ed_pccard_media_ioctl;
605 ed_pccard_kick_phy(sc);
606 } else {
607 ed_gen_ifmedia_init(sc);
608 }
609 if (modem_rid != -1)
610 ed_pccard_add_modem(dev);
611
612 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
613 NULL, edintr, sc, &sc->irq_handle);
614 if (error) {
615 device_printf(dev, "setup intr failed %d \n", error);
616 goto bad;
617 }
618
619 return (0);
620bad:
621 ed_detach(dev);
622 return (error);
623}
624
625/*
626 * Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100
627 * and compatible cards (DL10019C Ethernet controller).
628 */
629static int
630ed_pccard_dl100xx(device_t dev, const struct ed_product *pp)
631{
632 struct ed_softc *sc = device_get_softc(dev);
633 u_char sum;
634 uint8_t id;
635 u_int memsize;
636 int i, error;
637
638 if (!(pp->flags & NE2000DVF_DL100XX))
639 return (ENXIO);
640 if (bootverbose)
641 device_printf(dev, "Trying DL100xx probing\n");
642 error = ed_probe_Novell_generic(dev, device_get_flags(dev));
643 if (bootverbose && error)
644 device_printf(dev, "Novell generic probe failed: %d\n", error);
645 if (error != 0)
646 return (error);
647
648 /*
649 * Linksys registers(offset from ASIC base)
650 *
651 * 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5)
652 * 0x0A : Card ID Register (CIR)
653 * 0x0B : Check Sum Register (SR)
654 */
655 for (sum = 0, i = 0x04; i < 0x0c; i++)
656 sum += ed_asic_inb(sc, i);
657 if (sum != 0xff) {
658 if (bootverbose)
659 device_printf(dev, "Bad checksum %#x\n", sum);
660 return (ENXIO); /* invalid DL10019C */
661 }
662 if (bootverbose)
663 device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa));
664 for (i = 0; i < ETHER_ADDR_LEN; i++)
665 sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i);
666 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
667 id = ed_asic_inb(sc, 0xf);
668 sc->isa16bit = 1;
669 /*
670 * Hard code values based on the datasheet. We're NE-2000 compatible
671 * NIC with 24kb of packet memory starting at 24k offset. These
672 * cards also work with 16k at 16k, but don't work with 24k at 16k
673 * or 32k at 16k.
674 */
675 sc->type = ED_TYPE_NE2000;
676 sc->mem_start = 24 * 1024;
677 memsize = sc->mem_size = 24 * 1024;
678 sc->mem_end = sc->mem_start + memsize;
679 sc->tx_page_start = memsize / ED_PAGE_SIZE;
680 sc->txb_cnt = 3;
681 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
682 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
683
684 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
685
686 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE);
687 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE);
688 sc->vendor = ED_VENDOR_NOVELL;
689 sc->chip_type = (id & 0x90) == 0x90 ?
690 ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019;
691 sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019";
692 sc->mii_readbits = ed_pccard_dl100xx_mii_readbits;
693 sc->mii_writebits = ed_pccard_dl100xx_mii_writebits;
694 return (0);
695}
696
697/* MII bit-twiddling routines for cards using Dlink chipset */
698#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
699 ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x))
700#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
701 ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x))
702
703static void
704ed_pccard_dl100xx_mii_reset(struct ed_softc *sc)
705{
706 if (sc->chip_type != ED_CHIP_TYPE_DL10022)
707 return;
708
709 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2);
710 DELAY(10);
711 ed_asic_outb(sc, ED_DL100XX_MIIBUS,
712 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1);
713 DELAY(10);
714 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2);
715 DELAY(10);
716 ed_asic_outb(sc, ED_DL100XX_MIIBUS,
717 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1);
718 DELAY(10);
719 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0);
720}
721
722static void
723ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
724{
725 int i;
726
727 DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT);
728 for (i = nbits - 1; i >= 0; i--) {
729 if ((val >> i) & 1)
730 DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT);
731 else
732 DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT);
733 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
734 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
735 }
736}
737
738static u_int
739ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits)
740{
741 int i;
742 u_int val = 0;
743
744 DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT);
745 for (i = nbits - 1; i >= 0; i--) {
746 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
747 val <<= 1;
748 if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATAIN)
749 val++;
750 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
751 }
752 return val;
753}
754
755static void
756ed_pccard_ax88x90_reset(struct ed_softc *sc)
757{
758 int i;
759
760 /* Reset Card */
761 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
762 ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET));
763
764 /* Wait for the RST bit to assert, but cap it at 10ms */
765 for (i = 10000; !(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) && i > 0;
766 i--)
767 continue;
768 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST); /* ACK INTR */
769 if (i == 0)
770 device_printf(sc->dev, "Reset didn't finish\n");
771}
772
773/*
774 * Probe and vendor-specific initialization routine for ax88x90 boards
775 */
776static int
777ed_probe_ax88x90_generic(device_t dev, int flags)
778{
779 struct ed_softc *sc = device_get_softc(dev);
780 u_int memsize;
781 static char test_pattern[32] = "THIS is A memory TEST pattern";
782 char test_buffer[32];
783
784 ed_pccard_ax88x90_reset(sc);
785 DELAY(10*1000);
786
787 /* Make sure that we really have an 8390 based board */
788 if (!ed_probe_generic8390(sc))
789 return (ENXIO);
790
791 sc->vendor = ED_VENDOR_NOVELL;
792 sc->mem_shared = 0;
793 sc->cr_proto = ED_CR_RD2;
794
795 /*
796 * This prevents packets from being stored in the NIC memory when the
797 * readmem routine turns on the start bit in the CR. We write some
798 * bytes in word mode and verify we can read them back. If we can't
799 * then we don't have an AX88x90 chip here.
800 */
801 sc->isa16bit = 1;
802 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
803 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
804 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
805 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
806 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0)
807 return (ENXIO);
808
809 /*
810 * Hard code values based on the datasheet. We're NE-2000 compatible
811 * NIC with 16kb of packet memory starting at 16k offset.
812 */
813 sc->type = ED_TYPE_NE2000;
814 memsize = sc->mem_size = 16*1024;
815 sc->mem_start = 16 * 1024;
816 if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0)
817 sc->chip_type = ED_CHIP_TYPE_AX88790;
818 else {
819 sc->chip_type = ED_CHIP_TYPE_AX88190;
820 /*
821 * The AX88190 (not A) has external 64k SRAM. Probe for this
822 * here. Most of the cards I have either use the AX88190A
823 * part, or have only 32k SRAM for some reason, so I don't
824 * know if this works or not.
825 */
826 ed_pio_writemem(sc, test_pattern, 32768, sizeof(test_pattern));
827 ed_pio_readmem(sc, 32768, test_buffer, sizeof(test_pattern));
828 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) {
829 sc->mem_start = 2*1024;
830 memsize = sc->mem_size = 62 * 1024;
831 }
832 }
833 sc->mem_end = sc->mem_start + memsize;
834 sc->tx_page_start = memsize / ED_PAGE_SIZE;
835 if (sc->mem_size > 16 * 1024)
836 sc->txb_cnt = 3;
837 else
838 sc->txb_cnt = 2;
839 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
840 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
841
842 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
843
844 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE);
845 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE);
846
847 /* Get the mac before we go -- It's just at 0x400 in "SRAM" */
848 ed_pio_readmem(sc, 0x400, sc->enaddr, ETHER_ADDR_LEN);
849
850 /* clear any pending interrupts that might have occurred above */
851 ed_nic_outb(sc, ED_P0_ISR, 0xff);
852 sc->sc_write_mbufs = ed_pio_write_mbufs;
853 return (0);
854}
855
856static int
857ed_pccard_ax88x90_check_mii(device_t dev, struct ed_softc *sc)
858{
859 int i, id;
860
861 /*
862 * All AX88x90 devices have MII and a PHY, so we use this to weed out
863 * chips that would otherwise make it through the tests we have after
864 * this point.
865 */
866 for (i = 0; i < 32; i++) {
867 id = ed_miibus_readreg(dev, i, MII_BMSR);
868 if (id != 0 && id != 0xffff)
869 break;
870 }
871 /*
872 * Found one, we're good.
873 */
874 if (i != 32)
875 return (0);
876 /*
877 * Didn't find anything, so try to power up and try again. The PHY
878 * may be not responding because we're in power down mode.
879 */
880 if (sc->chip_type == ED_CHIP_TYPE_AX88190)
881 return (ENXIO);
882 pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, PCCARD_CCR_STATUS_PWRDWN);
883 for (i = 0; i < 32; i++) {
884 id = ed_miibus_readreg(dev, i, MII_BMSR);
885 if (id != 0 && id != 0xffff)
886 break;
887 }
888 /*
889 * Still no joy? We're AFU, punt.
890 */
891 if (i == 32)
892 return (ENXIO);
893 return (0);
894
895}
896
897/*
898 * Special setup for AX88[17]90
899 */
900static int
901ed_pccard_ax88x90(device_t dev, const struct ed_product *pp)
902{
903 int error;
904 int iobase;
905 struct ed_softc *sc = device_get_softc(dev);
906
907 if (!(pp->flags & NE2000DVF_AX88X90))
908 return (ENXIO);
909
910 if (bootverbose)
911 device_printf(dev, "Checking AX88x90\n");
912
913 /*
914 * Set the IOBASE Register. The AX88x90 cards are potentially
915 * multifunction cards, and thus requires a slight workaround.
916 * We write the address the card is at, on the off chance that this
917 * card is not MFC.
918 * XXX I'm not sure that this is still needed...
919 */
920 iobase = rman_get_start(sc->port_res);
921 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff);
922 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff);
923
924 sc->mii_readbits = ed_pccard_ax88x90_mii_readbits;
925 sc->mii_writebits = ed_pccard_ax88x90_mii_writebits;
926 error = ed_probe_ax88x90_generic(dev, device_get_flags(dev));
927 if (error) {
928 if (bootverbose)
929 device_printf(dev, "probe ax88x90 failed %d\n",
930 error);
931 goto fail;
932 }
933 error = ed_pccard_ax88x90_check_mii(dev, sc);
934 if (error)
935 goto fail;
936 sc->vendor = ED_VENDOR_NOVELL;
937 sc->type = ED_TYPE_NE2000;
938 if (sc->chip_type == ED_CHIP_TYPE_AX88190)
939 sc->type_str = "AX88190";
940 else
941 sc->type_str = "AX88790";
942 return (0);
943fail:;
944 sc->mii_readbits = 0;
945 sc->mii_writebits = 0;
946 return (error);
947}
948
949static void
950ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
951{
952 int i, data;
953
954 for (i = nbits - 1; i >= 0; i--) {
955 data = (val >> i) & 1 ? ED_AX88X90_MII_DATAOUT : 0;
956 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data);
957 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data | ED_AX88X90_MII_CLK);
958 }
959}
960
961static u_int
962ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits)
963{
964 int i;
965 u_int val = 0;
966 uint8_t mdio;
967
968 mdio = ED_AX88X90_MII_DIRIN;
969 for (i = nbits - 1; i >= 0; i--) {
970 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio);
971 val <<= 1;
972 if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATAIN)
973 val++;
974 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio | ED_AX88X90_MII_CLK);
975 }
976 return val;
977}
978
979/*
980 * Special setup for TC5299J
981 */
982static int
983ed_pccard_tc5299j(device_t dev, const struct ed_product *pp)
984{
985 int error, i, id;
986 char *ts;
987 struct ed_softc *sc = device_get_softc(dev);
988
989 if (!(pp->flags & NE2000DVF_TC5299J))
990 return (ENXIO);
991
992 if (bootverbose)
993 device_printf(dev, "Checking Tc5299j\n");
994
995 error = ed_probe_Novell_generic(dev, device_get_flags(dev));
996 if (bootverbose)
997 device_printf(dev, "probe novel returns %d\n", error);
998 if (error != 0)
999 return (error);
1000
1001 /*
1002 * Check to see if we have a MII PHY ID at any address. All TC5299J
1003 * devices have MII and a PHY, so we use this to weed out chips that
1004 * would otherwise make it through the tests we have after this point.
1005 */
1006 sc->mii_readbits = ed_pccard_tc5299j_mii_readbits;
1007 sc->mii_writebits = ed_pccard_tc5299j_mii_writebits;
1008 for (i = 0; i < 32; i++) {
1009 id = ed_miibus_readreg(dev, i, MII_PHYIDR1);
1010 if (id != 0 && id != 0xffff)
1011 break;
1012 }
1013 if (i == 32) {
1014 sc->mii_readbits = 0;
1015 sc->mii_writebits = 0;
1016 return (ENXIO);
1017 }
1018 ts = "TC5299J";
1019 if (ed_pccard_rom_mac(dev, sc->enaddr) == 0) {
1020 sc->mii_readbits = 0;
1021 sc->mii_writebits = 0;
1022 return (ENXIO);
1023 }
1024 sc->vendor = ED_VENDOR_NOVELL;
1025 sc->type = ED_TYPE_NE2000;
1026 sc->chip_type = ED_CHIP_TYPE_TC5299J;
1027 sc->type_str = ts;
1028 return (0);
1029}
1030
1031static void
1032ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
1033{
1034 int i;
1035 uint8_t cr, data;
1036
1037 /* Select page 3 */
1038 cr = ed_nic_inb(sc, ED_P0_CR);
1039 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
1040
1041 for (i = nbits - 1; i >= 0; i--) {
1042 data = (val >> i) & 1 ? ED_TC5299J_MII_DATAOUT : 0;
1043 ed_nic_outb(sc, ED_TC5299J_MIIBUS, data);
1044 ed_nic_outb(sc, ED_TC5299J_MIIBUS, data | ED_TC5299J_MII_CLK);
1045 }
1046 ed_nic_outb(sc, ED_TC5299J_MIIBUS, 0);
1047
1048 /* Restore prior page */
1049 ed_nic_outb(sc, ED_P0_CR, cr);
1050}
1051
1052static u_int
1053ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits)
1054{
1055 int i;
1056 u_int val = 0;
1057 uint8_t cr;
1058
1059 /* Select page 3 */
1060 cr = ed_nic_inb(sc, ED_P0_CR);
1061 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
1062
1063 ed_asic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT);
1064 for (i = nbits - 1; i >= 0; i--) {
1065 ed_nic_outb(sc, ED_TC5299J_MIIBUS,
1066 ED_TC5299J_MII_CLK | ED_TC5299J_MII_DIROUT);
1067 val <<= 1;
1068 if (ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ED_TC5299J_MII_DATAIN)
1069 val++;
1070 ed_nic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT);
1071 }
1072
1073 /* Restore prior page */
1074 ed_nic_outb(sc, ED_P0_CR, cr);
1075 return val;
1076}
1077
1078/*
1079 * MII bus support routines.
1080 */
1081static int
1082ed_miibus_readreg(device_t dev, int phy, int reg)
1083{
1084 struct ed_softc *sc;
1085 int failed, val;
1086
1087 sc = device_get_softc(dev);
1088 /*
1089 * The AX88790 has an interesting quirk. It has an internal phy that
1090 * needs a special bit set to access, but can also have additional
1091 * external PHYs set for things like HomeNET media. When accessing
1092 * the internal PHY, a bit has to be set, when accessing the external
1093 * PHYs, it must be clear. See Errata 1, page 51, in the AX88790
1094 * datasheet for more details.
1095 *
1096 * Also, PHYs above 16 appear to be phantoms on some cards, but not
1097 * others. Registers read for this are often the same as prior values
1098 * read. Filter all register requests to 17-31.
1099 *
1100 * I can't explain it, since I don't have the DL100xx data sheets, but
1101 * the DL100xx chips do 13-bits before the 'ACK' but, but the AX88x90
1102 * chips have 14. The linux pcnet and axnet drivers confirm this.
1103 */
1104 if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
1105 if (phy > 0x10)
1106 return (0);
1107 if (phy == 0x10)
1108 ed_asic_outb(sc, ED_AX88X90_GPIO,
1109 ED_AX88X90_GPIO_INT_PHY);
1110 else
1111 ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
1112 }
1113
1114 (*sc->mii_writebits)(sc, 0xffffffff, 32);
1115 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
1116 (*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS);
1117 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
1118 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
1119 if (sc->chip_type == ED_CHIP_TYPE_AX88790 ||
1120 sc->chip_type == ED_CHIP_TYPE_AX88190)
1121 (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
1122 failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
1123 val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS);
1124 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
1125/* printf("Reading phy %d reg %#x returning %#x (valid %d)\n", phy, reg, val, !failed); */
1126 return (failed ? 0 : val);
1127}
1128
1129static int
1130ed_miibus_writereg(device_t dev, int phy, int reg, int data)
1131{
1132 struct ed_softc *sc;
1133
1134/* printf("Writing phy %d reg %#x data %#x\n", phy, reg, data); */
1135 sc = device_get_softc(dev);
1136 /* See ed_miibus_readreg for details */
1137 if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
1138 if (phy > 0x10)
1139 return (0);
1140 if (phy == 0x10)
1141 ed_asic_outb(sc, ED_AX88X90_GPIO,
1142 ED_AX88X90_GPIO_INT_PHY);
1143 else
1144 ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
1145 }
1146 (*sc->mii_writebits)(sc, 0xffffffff, 32);
1147 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
1148 (*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS);
1149 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
1150 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
1151 (*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS);
1152 (*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS);
1153 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
1154 return (0);
1155}
1156
1157static int
1158ed_ifmedia_upd(struct ifnet *ifp)
1159{
1160 struct ed_softc *sc;
1161 int error;
1162
1163 sc = ifp->if_softc;
1164 if (sc->miibus == NULL)
1165 return (ENXIO);
1166 ED_LOCK(sc);
1167 error = ed_pccard_kick_phy(sc);
1168 ED_UNLOCK(sc);
1169 return (error);
1170}
1171
1172static void
1173ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1174{
1175 struct ed_softc *sc;
1176 struct mii_data *mii;
1177
1178 sc = ifp->if_softc;
1179 if (sc->miibus == NULL)
1180 return;
1181
1182 mii = device_get_softc(sc->miibus);
1183 mii_pollstat(mii);
1184 ifmr->ifm_active = mii->mii_media_active;
1185 ifmr->ifm_status = mii->mii_media_status;
1186}
1187
1188static void
1189ed_child_detached(device_t dev, device_t child)
1190{
1191 struct ed_softc *sc;
1192
1193 sc = device_get_softc(dev);
1194 if (child == sc->miibus)
1195 sc->miibus = NULL;
1196}
1197
1198static void
| 254
255static int ed_pccard_dl100xx(device_t dev, const struct ed_product *);
256static void ed_pccard_dl100xx_mii_reset(struct ed_softc *sc);
257static u_int ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits);
258static void ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val,
259 int nbits);
260
261static int ed_pccard_ax88x90(device_t dev, const struct ed_product *);
262static u_int ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits);
263static void ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val,
264 int nbits);
265
266static int ed_miibus_readreg(device_t dev, int phy, int reg);
267static int ed_ifmedia_upd(struct ifnet *);
268static void ed_ifmedia_sts(struct ifnet *, struct ifmediareq *);
269
270static int ed_pccard_tc5299j(device_t dev, const struct ed_product *);
271static u_int ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits);
272static void ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val,
273 int nbits);
274
275static void
276ed_pccard_print_entry(const struct ed_product *pp)
277{
278 int i;
279
280 printf("Product entry: ");
281 if (pp->prod.pp_name)
282 printf("name='%s',", pp->prod.pp_name);
283 printf("vendor=%#x,product=%#x", pp->prod.pp_vendor,
284 pp->prod.pp_product);
285 for (i = 0; i < 4; i++)
286 if (pp->prod.pp_cis[i])
287 printf(",CIS%d='%s'", i, pp->prod.pp_cis[i]);
288 printf("\n");
289}
290
291static int
292ed_pccard_probe(device_t dev)
293{
294 const struct ed_product *pp, *pp2;
295 int error, first = 1;
296 uint32_t fcn = PCCARD_FUNCTION_UNSPEC;
297
298 /* Make sure we're a network function */
299 error = pccard_get_function(dev, &fcn);
300 if (error != 0)
301 return (error);
302
303 if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
304 (const struct pccard_product *) ed_pccard_products,
305 sizeof(ed_pccard_products[0]), NULL)) != NULL) {
306 if (pp->prod.pp_name != NULL)
307 device_set_desc(dev, pp->prod.pp_name);
308 /*
309 * Some devices don't ID themselves as network, but
310 * that's OK if the flags say so.
311 */
312 if (!(pp->flags & NE2000DVF_ANYFUNC) &&
313 fcn != PCCARD_FUNCTION_NETWORK)
314 return (ENXIO);
315 /*
316 * Some devices match multiple entries. Report that
317 * as a warning to help cull the table
318 */
319 pp2 = pp;
320 while ((pp2 = (const struct ed_product *)pccard_product_lookup(
321 dev, (const struct pccard_product *)(pp2 + 1),
322 sizeof(ed_pccard_products[0]), NULL)) != NULL) {
323 if (first) {
324 device_printf(dev,
325 "Warning: card matches multiple entries. Report to imp@freebsd.org\n");
326 ed_pccard_print_entry(pp);
327 first = 0;
328 }
329 ed_pccard_print_entry(pp2);
330 }
331
332 return (0);
333 }
334 return (ENXIO);
335}
336
337static int
338ed_pccard_rom_mac(device_t dev, uint8_t *enaddr)
339{
340 struct ed_softc *sc = device_get_softc(dev);
341 uint8_t romdata[32], sum;
342 int i;
343
344 /*
345 * Read in the rom data at location 0. Since there are no
346 * NE-1000 based PC Card devices, we'll assume we're 16-bit.
347 *
348 * In researching what format this takes, I've found that the
349 * following appears to be true for multiple cards based on
350 * observation as well as datasheet digging.
351 *
352 * Data is stored in some ROM and is copied out 8 bits at a time
353 * into 16-bit wide locations. This means that the odd locations
354 * of the ROM are not used (and can be either 0 or ff).
355 *
356 * The contents appears to be as follows:
357 * PROM RAM
358 * Offset Offset What
359 * 0 0 ENETADDR 0
360 * 1 2 ENETADDR 1
361 * 2 4 ENETADDR 2
362 * 3 6 ENETADDR 3
363 * 4 8 ENETADDR 4
364 * 5 10 ENETADDR 5
365 * 6-13 12-26 Reserved (varies by manufacturer)
366 * 14 28 0x57
367 * 15 30 0x57
368 *
369 * Some manufacturers have another image of enetaddr from
370 * PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but
371 * this doesn't appear to be universally documented in the
372 * datasheets. Some manufactuers have a card type, card config
373 * checksums, etc encoded into PROM offset 6-13, but deciphering it
374 * requires more knowledge about the exact underlying chipset than
375 * we possess (and maybe can possess).
376 */
377 ed_pio_readmem(sc, 0, romdata, 32);
378 if (bootverbose)
379 device_printf(dev, "ROM DATA: %32D\n", romdata, " ");
380 if (romdata[28] != 0x57 || romdata[30] != 0x57)
381 return (0);
382 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
383 sum |= romdata[i * 2];
384 if (sum == 0)
385 return (0);
386 for (i = 0; i < ETHER_ADDR_LEN; i++)
387 enaddr[i] = romdata[i * 2];
388 return (1);
389}
390
391static int
392ed_pccard_add_modem(device_t dev)
393{
394 device_printf(dev, "Need to write this code\n");
395 return 0;
396}
397
398static int
399ed_pccard_kick_phy(struct ed_softc *sc)
400{
401 struct mii_softc *miisc;
402 struct mii_data *mii;
403
404 /*
405 * Many of the PHYs that wind up on PC Cards are weird in
406 * this way. Generally, we don't need to worry so much about
407 * the Isolation protocol since there's only one PHY in
408 * these designs, so this workaround is reasonable.
409 */
410 mii = device_get_softc(sc->miibus);
411 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
412 miisc->mii_flags |= MIIF_FORCEANEG;
413 mii_phy_reset(miisc);
414 }
415 return (mii_mediachg(mii));
416}
417
418static int
419ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
420{
421 struct mii_data *mii;
422
423 if (sc->miibus == NULL)
424 return (EINVAL);
425 mii = device_get_softc(sc->miibus);
426 return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command));
427}
428
429
430static void
431ed_pccard_mediachg(struct ed_softc *sc)
432{
433 struct mii_data *mii;
434
435 if (sc->miibus == NULL)
436 return;
437 mii = device_get_softc(sc->miibus);
438 mii_mediachg(mii);
439}
440
441static int
442ed_pccard_attach(device_t dev)
443{
444 u_char sum;
445 u_char enaddr[ETHER_ADDR_LEN];
446 const struct ed_product *pp;
447 int error, i, flags, port_rid, modem_rid;
448 struct ed_softc *sc = device_get_softc(dev);
449 u_long size;
450 static uint16_t *intr_vals[] = {NULL, NULL};
451
452 sc->dev = dev;
453 if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
454 (const struct pccard_product *) ed_pccard_products,
455 sizeof(ed_pccard_products[0]), NULL)) == NULL) {
456 printf("Can't find\n");
457 return (ENXIO);
458 }
459 modem_rid = port_rid = -1;
460 if (pp->flags & NE2000DVF_MODEM) {
461 for (i = 0; i < 4; i++) {
462 size = bus_get_resource_count(dev, SYS_RES_IOPORT, i);
463 if (size == ED_NOVELL_IO_PORTS)
464 port_rid = i;
465 else if (size == 8)
466 modem_rid = i;
467 }
468 if (port_rid == -1) {
469 device_printf(dev, "Cannot locate my ports!\n");
470 return (ENXIO);
471 }
472 } else {
473 port_rid = 0;
474 }
475 /* Allocate the port resource during setup. */
476 error = ed_alloc_port(dev, port_rid, ED_NOVELL_IO_PORTS);
477 if (error) {
478 printf("alloc_port failed\n");
479 return (error);
480 }
481 if (rman_get_size(sc->port_res) == ED_NOVELL_IO_PORTS / 2) {
482 port_rid++;
483 sc->port_res2 = bus_alloc_resource(dev, SYS_RES_IOPORT,
484 &port_rid, 0ul, ~0ul, 1, RF_ACTIVE);
485 if (sc->port_res2 == NULL ||
486 rman_get_size(sc->port_res2) != ED_NOVELL_IO_PORTS / 2) {
487 error = ENXIO;
488 goto bad;
489 }
490 }
491 error = ed_alloc_irq(dev, 0, 0);
492 if (error)
493 goto bad;
494
495 /*
496 * Determine which chipset we are. Almost all the PC Card chipsets
497 * have the Novel ASIC and NIC offsets. There's 2 known cards that
498 * follow the WD80x3 conventions, which are handled as a special case.
499 */
500 sc->asic_offset = ED_NOVELL_ASIC_OFFSET;
501 sc->nic_offset = ED_NOVELL_NIC_OFFSET;
502 error = ENXIO;
503 flags = device_get_flags(dev);
504 if (error != 0)
505 error = ed_pccard_dl100xx(dev, pp);
506 if (error != 0)
507 error = ed_pccard_ax88x90(dev, pp);
508 if (error != 0)
509 error = ed_pccard_tc5299j(dev, pp);
510 if (error != 0) {
511 error = ed_probe_Novell_generic(dev, flags);
512 printf("Novell probe generic %d\n", error);
513 }
514 if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) {
515 flags |= ED_FLAGS_TOSH_ETHER;
516 flags |= ED_FLAGS_PCCARD;
517 sc->asic_offset = ED_WD_ASIC_OFFSET;
518 sc->nic_offset = ED_WD_NIC_OFFSET;
519 error = ed_probe_WD80x3_generic(dev, flags, intr_vals);
520 }
521 if (error)
522 goto bad;
523
524 /*
525 * There are several ways to get the MAC address for the card.
526 * Some of the above probe routines can fill in the enaddr. If
527 * not, we run through a number of 'well known' locations:
528 * (1) From the PC Card FUNCE
529 * (2) From offset 0 in the shared memory
530 * (3) From a hinted offset in attribute memory
531 * (4) From 0xff0 in attribute memory
532 * If we can't get a non-zero MAC address from this list, we fail.
533 */
534 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
535 sum |= sc->enaddr[i];
536 if (sum == 0) {
537 pccard_get_ether(dev, enaddr);
538 if (bootverbose)
539 device_printf(dev, "CIS MAC %6D\n", enaddr, ":");
540 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
541 sum |= enaddr[i];
542 if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) {
543 if (bootverbose)
544 device_printf(dev, "ROM mac %6D\n", enaddr,
545 ":");
546 sum++;
547 }
548 if (sum == 0 && pp->flags & NE2000DVF_ENADDR) {
549 for (i = 0; i < ETHER_ADDR_LEN; i++) {
550 pccard_attr_read_1(dev, pp->enoff + i * 2,
551 enaddr + i);
552 sum |= enaddr[i];
553 }
554 if (bootverbose)
555 device_printf(dev, "Hint %x MAC %6D\n",
556 pp->enoff, enaddr, ":");
557 }
558 if (sum == 0) {
559 for (i = 0; i < ETHER_ADDR_LEN; i++) {
560 pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET +
561 i * 2, enaddr + i);
562 sum |= enaddr[i];
563 }
564 if (bootverbose)
565 device_printf(dev, "Fallback MAC %6D\n",
566 enaddr, ":");
567 }
568 if (sum == 0) {
569 device_printf(dev, "Cannot extract MAC address.\n");
570 ed_release_resources(dev);
571 return (ENXIO);
572 }
573 bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN);
574 }
575
576 error = ed_attach(dev);
577 if (error)
578 goto bad;
579 if (sc->chip_type == ED_CHIP_TYPE_DL10019 ||
580 sc->chip_type == ED_CHIP_TYPE_DL10022) {
581 /* Probe for an MII bus, but ignore errors. */
582 ed_pccard_dl100xx_mii_reset(sc);
583 (void)mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
584 ed_ifmedia_sts);
585 } else if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
586 sc->chip_type == ED_CHIP_TYPE_AX88790) {
587 if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
588 ed_ifmedia_sts)) != 0) {
589 device_printf(dev, "Missing mii %d!\n", error);
590 goto bad;
591 }
592
593 } else if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
594 if ((error = mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd,
595 ed_ifmedia_sts)) != 0) {
596 device_printf(dev, "Missing mii!\n");
597 goto bad;
598 }
599
600 }
601 if (sc->miibus != NULL) {
602 sc->sc_tick = ed_pccard_tick;
603 sc->sc_mediachg = ed_pccard_mediachg;
604 sc->sc_media_ioctl = ed_pccard_media_ioctl;
605 ed_pccard_kick_phy(sc);
606 } else {
607 ed_gen_ifmedia_init(sc);
608 }
609 if (modem_rid != -1)
610 ed_pccard_add_modem(dev);
611
612 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
613 NULL, edintr, sc, &sc->irq_handle);
614 if (error) {
615 device_printf(dev, "setup intr failed %d \n", error);
616 goto bad;
617 }
618
619 return (0);
620bad:
621 ed_detach(dev);
622 return (error);
623}
624
625/*
626 * Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100
627 * and compatible cards (DL10019C Ethernet controller).
628 */
629static int
630ed_pccard_dl100xx(device_t dev, const struct ed_product *pp)
631{
632 struct ed_softc *sc = device_get_softc(dev);
633 u_char sum;
634 uint8_t id;
635 u_int memsize;
636 int i, error;
637
638 if (!(pp->flags & NE2000DVF_DL100XX))
639 return (ENXIO);
640 if (bootverbose)
641 device_printf(dev, "Trying DL100xx probing\n");
642 error = ed_probe_Novell_generic(dev, device_get_flags(dev));
643 if (bootverbose && error)
644 device_printf(dev, "Novell generic probe failed: %d\n", error);
645 if (error != 0)
646 return (error);
647
648 /*
649 * Linksys registers(offset from ASIC base)
650 *
651 * 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5)
652 * 0x0A : Card ID Register (CIR)
653 * 0x0B : Check Sum Register (SR)
654 */
655 for (sum = 0, i = 0x04; i < 0x0c; i++)
656 sum += ed_asic_inb(sc, i);
657 if (sum != 0xff) {
658 if (bootverbose)
659 device_printf(dev, "Bad checksum %#x\n", sum);
660 return (ENXIO); /* invalid DL10019C */
661 }
662 if (bootverbose)
663 device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa));
664 for (i = 0; i < ETHER_ADDR_LEN; i++)
665 sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i);
666 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
667 id = ed_asic_inb(sc, 0xf);
668 sc->isa16bit = 1;
669 /*
670 * Hard code values based on the datasheet. We're NE-2000 compatible
671 * NIC with 24kb of packet memory starting at 24k offset. These
672 * cards also work with 16k at 16k, but don't work with 24k at 16k
673 * or 32k at 16k.
674 */
675 sc->type = ED_TYPE_NE2000;
676 sc->mem_start = 24 * 1024;
677 memsize = sc->mem_size = 24 * 1024;
678 sc->mem_end = sc->mem_start + memsize;
679 sc->tx_page_start = memsize / ED_PAGE_SIZE;
680 sc->txb_cnt = 3;
681 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
682 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
683
684 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
685
686 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE);
687 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE);
688 sc->vendor = ED_VENDOR_NOVELL;
689 sc->chip_type = (id & 0x90) == 0x90 ?
690 ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019;
691 sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019";
692 sc->mii_readbits = ed_pccard_dl100xx_mii_readbits;
693 sc->mii_writebits = ed_pccard_dl100xx_mii_writebits;
694 return (0);
695}
696
697/* MII bit-twiddling routines for cards using Dlink chipset */
698#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
699 ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x))
700#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
701 ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x))
702
703static void
704ed_pccard_dl100xx_mii_reset(struct ed_softc *sc)
705{
706 if (sc->chip_type != ED_CHIP_TYPE_DL10022)
707 return;
708
709 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2);
710 DELAY(10);
711 ed_asic_outb(sc, ED_DL100XX_MIIBUS,
712 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1);
713 DELAY(10);
714 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2);
715 DELAY(10);
716 ed_asic_outb(sc, ED_DL100XX_MIIBUS,
717 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1);
718 DELAY(10);
719 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0);
720}
721
722static void
723ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
724{
725 int i;
726
727 DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT);
728 for (i = nbits - 1; i >= 0; i--) {
729 if ((val >> i) & 1)
730 DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT);
731 else
732 DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT);
733 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
734 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
735 }
736}
737
738static u_int
739ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits)
740{
741 int i;
742 u_int val = 0;
743
744 DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT);
745 for (i = nbits - 1; i >= 0; i--) {
746 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
747 val <<= 1;
748 if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATAIN)
749 val++;
750 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
751 }
752 return val;
753}
754
755static void
756ed_pccard_ax88x90_reset(struct ed_softc *sc)
757{
758 int i;
759
760 /* Reset Card */
761 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
762 ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET));
763
764 /* Wait for the RST bit to assert, but cap it at 10ms */
765 for (i = 10000; !(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) && i > 0;
766 i--)
767 continue;
768 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST); /* ACK INTR */
769 if (i == 0)
770 device_printf(sc->dev, "Reset didn't finish\n");
771}
772
773/*
774 * Probe and vendor-specific initialization routine for ax88x90 boards
775 */
776static int
777ed_probe_ax88x90_generic(device_t dev, int flags)
778{
779 struct ed_softc *sc = device_get_softc(dev);
780 u_int memsize;
781 static char test_pattern[32] = "THIS is A memory TEST pattern";
782 char test_buffer[32];
783
784 ed_pccard_ax88x90_reset(sc);
785 DELAY(10*1000);
786
787 /* Make sure that we really have an 8390 based board */
788 if (!ed_probe_generic8390(sc))
789 return (ENXIO);
790
791 sc->vendor = ED_VENDOR_NOVELL;
792 sc->mem_shared = 0;
793 sc->cr_proto = ED_CR_RD2;
794
795 /*
796 * This prevents packets from being stored in the NIC memory when the
797 * readmem routine turns on the start bit in the CR. We write some
798 * bytes in word mode and verify we can read them back. If we can't
799 * then we don't have an AX88x90 chip here.
800 */
801 sc->isa16bit = 1;
802 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
803 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
804 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
805 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
806 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0)
807 return (ENXIO);
808
809 /*
810 * Hard code values based on the datasheet. We're NE-2000 compatible
811 * NIC with 16kb of packet memory starting at 16k offset.
812 */
813 sc->type = ED_TYPE_NE2000;
814 memsize = sc->mem_size = 16*1024;
815 sc->mem_start = 16 * 1024;
816 if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0)
817 sc->chip_type = ED_CHIP_TYPE_AX88790;
818 else {
819 sc->chip_type = ED_CHIP_TYPE_AX88190;
820 /*
821 * The AX88190 (not A) has external 64k SRAM. Probe for this
822 * here. Most of the cards I have either use the AX88190A
823 * part, or have only 32k SRAM for some reason, so I don't
824 * know if this works or not.
825 */
826 ed_pio_writemem(sc, test_pattern, 32768, sizeof(test_pattern));
827 ed_pio_readmem(sc, 32768, test_buffer, sizeof(test_pattern));
828 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) {
829 sc->mem_start = 2*1024;
830 memsize = sc->mem_size = 62 * 1024;
831 }
832 }
833 sc->mem_end = sc->mem_start + memsize;
834 sc->tx_page_start = memsize / ED_PAGE_SIZE;
835 if (sc->mem_size > 16 * 1024)
836 sc->txb_cnt = 3;
837 else
838 sc->txb_cnt = 2;
839 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
840 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
841
842 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
843
844 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE);
845 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE);
846
847 /* Get the mac before we go -- It's just at 0x400 in "SRAM" */
848 ed_pio_readmem(sc, 0x400, sc->enaddr, ETHER_ADDR_LEN);
849
850 /* clear any pending interrupts that might have occurred above */
851 ed_nic_outb(sc, ED_P0_ISR, 0xff);
852 sc->sc_write_mbufs = ed_pio_write_mbufs;
853 return (0);
854}
855
856static int
857ed_pccard_ax88x90_check_mii(device_t dev, struct ed_softc *sc)
858{
859 int i, id;
860
861 /*
862 * All AX88x90 devices have MII and a PHY, so we use this to weed out
863 * chips that would otherwise make it through the tests we have after
864 * this point.
865 */
866 for (i = 0; i < 32; i++) {
867 id = ed_miibus_readreg(dev, i, MII_BMSR);
868 if (id != 0 && id != 0xffff)
869 break;
870 }
871 /*
872 * Found one, we're good.
873 */
874 if (i != 32)
875 return (0);
876 /*
877 * Didn't find anything, so try to power up and try again. The PHY
878 * may be not responding because we're in power down mode.
879 */
880 if (sc->chip_type == ED_CHIP_TYPE_AX88190)
881 return (ENXIO);
882 pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, PCCARD_CCR_STATUS_PWRDWN);
883 for (i = 0; i < 32; i++) {
884 id = ed_miibus_readreg(dev, i, MII_BMSR);
885 if (id != 0 && id != 0xffff)
886 break;
887 }
888 /*
889 * Still no joy? We're AFU, punt.
890 */
891 if (i == 32)
892 return (ENXIO);
893 return (0);
894
895}
896
897/*
898 * Special setup for AX88[17]90
899 */
900static int
901ed_pccard_ax88x90(device_t dev, const struct ed_product *pp)
902{
903 int error;
904 int iobase;
905 struct ed_softc *sc = device_get_softc(dev);
906
907 if (!(pp->flags & NE2000DVF_AX88X90))
908 return (ENXIO);
909
910 if (bootverbose)
911 device_printf(dev, "Checking AX88x90\n");
912
913 /*
914 * Set the IOBASE Register. The AX88x90 cards are potentially
915 * multifunction cards, and thus requires a slight workaround.
916 * We write the address the card is at, on the off chance that this
917 * card is not MFC.
918 * XXX I'm not sure that this is still needed...
919 */
920 iobase = rman_get_start(sc->port_res);
921 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff);
922 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff);
923
924 sc->mii_readbits = ed_pccard_ax88x90_mii_readbits;
925 sc->mii_writebits = ed_pccard_ax88x90_mii_writebits;
926 error = ed_probe_ax88x90_generic(dev, device_get_flags(dev));
927 if (error) {
928 if (bootverbose)
929 device_printf(dev, "probe ax88x90 failed %d\n",
930 error);
931 goto fail;
932 }
933 error = ed_pccard_ax88x90_check_mii(dev, sc);
934 if (error)
935 goto fail;
936 sc->vendor = ED_VENDOR_NOVELL;
937 sc->type = ED_TYPE_NE2000;
938 if (sc->chip_type == ED_CHIP_TYPE_AX88190)
939 sc->type_str = "AX88190";
940 else
941 sc->type_str = "AX88790";
942 return (0);
943fail:;
944 sc->mii_readbits = 0;
945 sc->mii_writebits = 0;
946 return (error);
947}
948
949static void
950ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
951{
952 int i, data;
953
954 for (i = nbits - 1; i >= 0; i--) {
955 data = (val >> i) & 1 ? ED_AX88X90_MII_DATAOUT : 0;
956 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data);
957 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data | ED_AX88X90_MII_CLK);
958 }
959}
960
961static u_int
962ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits)
963{
964 int i;
965 u_int val = 0;
966 uint8_t mdio;
967
968 mdio = ED_AX88X90_MII_DIRIN;
969 for (i = nbits - 1; i >= 0; i--) {
970 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio);
971 val <<= 1;
972 if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATAIN)
973 val++;
974 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio | ED_AX88X90_MII_CLK);
975 }
976 return val;
977}
978
979/*
980 * Special setup for TC5299J
981 */
982static int
983ed_pccard_tc5299j(device_t dev, const struct ed_product *pp)
984{
985 int error, i, id;
986 char *ts;
987 struct ed_softc *sc = device_get_softc(dev);
988
989 if (!(pp->flags & NE2000DVF_TC5299J))
990 return (ENXIO);
991
992 if (bootverbose)
993 device_printf(dev, "Checking Tc5299j\n");
994
995 error = ed_probe_Novell_generic(dev, device_get_flags(dev));
996 if (bootverbose)
997 device_printf(dev, "probe novel returns %d\n", error);
998 if (error != 0)
999 return (error);
1000
1001 /*
1002 * Check to see if we have a MII PHY ID at any address. All TC5299J
1003 * devices have MII and a PHY, so we use this to weed out chips that
1004 * would otherwise make it through the tests we have after this point.
1005 */
1006 sc->mii_readbits = ed_pccard_tc5299j_mii_readbits;
1007 sc->mii_writebits = ed_pccard_tc5299j_mii_writebits;
1008 for (i = 0; i < 32; i++) {
1009 id = ed_miibus_readreg(dev, i, MII_PHYIDR1);
1010 if (id != 0 && id != 0xffff)
1011 break;
1012 }
1013 if (i == 32) {
1014 sc->mii_readbits = 0;
1015 sc->mii_writebits = 0;
1016 return (ENXIO);
1017 }
1018 ts = "TC5299J";
1019 if (ed_pccard_rom_mac(dev, sc->enaddr) == 0) {
1020 sc->mii_readbits = 0;
1021 sc->mii_writebits = 0;
1022 return (ENXIO);
1023 }
1024 sc->vendor = ED_VENDOR_NOVELL;
1025 sc->type = ED_TYPE_NE2000;
1026 sc->chip_type = ED_CHIP_TYPE_TC5299J;
1027 sc->type_str = ts;
1028 return (0);
1029}
1030
1031static void
1032ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
1033{
1034 int i;
1035 uint8_t cr, data;
1036
1037 /* Select page 3 */
1038 cr = ed_nic_inb(sc, ED_P0_CR);
1039 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
1040
1041 for (i = nbits - 1; i >= 0; i--) {
1042 data = (val >> i) & 1 ? ED_TC5299J_MII_DATAOUT : 0;
1043 ed_nic_outb(sc, ED_TC5299J_MIIBUS, data);
1044 ed_nic_outb(sc, ED_TC5299J_MIIBUS, data | ED_TC5299J_MII_CLK);
1045 }
1046 ed_nic_outb(sc, ED_TC5299J_MIIBUS, 0);
1047
1048 /* Restore prior page */
1049 ed_nic_outb(sc, ED_P0_CR, cr);
1050}
1051
1052static u_int
1053ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits)
1054{
1055 int i;
1056 u_int val = 0;
1057 uint8_t cr;
1058
1059 /* Select page 3 */
1060 cr = ed_nic_inb(sc, ED_P0_CR);
1061 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
1062
1063 ed_asic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT);
1064 for (i = nbits - 1; i >= 0; i--) {
1065 ed_nic_outb(sc, ED_TC5299J_MIIBUS,
1066 ED_TC5299J_MII_CLK | ED_TC5299J_MII_DIROUT);
1067 val <<= 1;
1068 if (ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ED_TC5299J_MII_DATAIN)
1069 val++;
1070 ed_nic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT);
1071 }
1072
1073 /* Restore prior page */
1074 ed_nic_outb(sc, ED_P0_CR, cr);
1075 return val;
1076}
1077
1078/*
1079 * MII bus support routines.
1080 */
1081static int
1082ed_miibus_readreg(device_t dev, int phy, int reg)
1083{
1084 struct ed_softc *sc;
1085 int failed, val;
1086
1087 sc = device_get_softc(dev);
1088 /*
1089 * The AX88790 has an interesting quirk. It has an internal phy that
1090 * needs a special bit set to access, but can also have additional
1091 * external PHYs set for things like HomeNET media. When accessing
1092 * the internal PHY, a bit has to be set, when accessing the external
1093 * PHYs, it must be clear. See Errata 1, page 51, in the AX88790
1094 * datasheet for more details.
1095 *
1096 * Also, PHYs above 16 appear to be phantoms on some cards, but not
1097 * others. Registers read for this are often the same as prior values
1098 * read. Filter all register requests to 17-31.
1099 *
1100 * I can't explain it, since I don't have the DL100xx data sheets, but
1101 * the DL100xx chips do 13-bits before the 'ACK' but, but the AX88x90
1102 * chips have 14. The linux pcnet and axnet drivers confirm this.
1103 */
1104 if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
1105 if (phy > 0x10)
1106 return (0);
1107 if (phy == 0x10)
1108 ed_asic_outb(sc, ED_AX88X90_GPIO,
1109 ED_AX88X90_GPIO_INT_PHY);
1110 else
1111 ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
1112 }
1113
1114 (*sc->mii_writebits)(sc, 0xffffffff, 32);
1115 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
1116 (*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS);
1117 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
1118 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
1119 if (sc->chip_type == ED_CHIP_TYPE_AX88790 ||
1120 sc->chip_type == ED_CHIP_TYPE_AX88190)
1121 (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
1122 failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
1123 val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS);
1124 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
1125/* printf("Reading phy %d reg %#x returning %#x (valid %d)\n", phy, reg, val, !failed); */
1126 return (failed ? 0 : val);
1127}
1128
1129static int
1130ed_miibus_writereg(device_t dev, int phy, int reg, int data)
1131{
1132 struct ed_softc *sc;
1133
1134/* printf("Writing phy %d reg %#x data %#x\n", phy, reg, data); */
1135 sc = device_get_softc(dev);
1136 /* See ed_miibus_readreg for details */
1137 if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
1138 if (phy > 0x10)
1139 return (0);
1140 if (phy == 0x10)
1141 ed_asic_outb(sc, ED_AX88X90_GPIO,
1142 ED_AX88X90_GPIO_INT_PHY);
1143 else
1144 ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
1145 }
1146 (*sc->mii_writebits)(sc, 0xffffffff, 32);
1147 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
1148 (*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS);
1149 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
1150 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
1151 (*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS);
1152 (*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS);
1153 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
1154 return (0);
1155}
1156
1157static int
1158ed_ifmedia_upd(struct ifnet *ifp)
1159{
1160 struct ed_softc *sc;
1161 int error;
1162
1163 sc = ifp->if_softc;
1164 if (sc->miibus == NULL)
1165 return (ENXIO);
1166 ED_LOCK(sc);
1167 error = ed_pccard_kick_phy(sc);
1168 ED_UNLOCK(sc);
1169 return (error);
1170}
1171
1172static void
1173ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1174{
1175 struct ed_softc *sc;
1176 struct mii_data *mii;
1177
1178 sc = ifp->if_softc;
1179 if (sc->miibus == NULL)
1180 return;
1181
1182 mii = device_get_softc(sc->miibus);
1183 mii_pollstat(mii);
1184 ifmr->ifm_active = mii->mii_media_active;
1185 ifmr->ifm_status = mii->mii_media_status;
1186}
1187
1188static void
1189ed_child_detached(device_t dev, device_t child)
1190{
1191 struct ed_softc *sc;
1192
1193 sc = device_get_softc(dev);
1194 if (child == sc->miibus)
1195 sc->miibus = NULL;
1196}
1197
1198static void
|
1199ed_pccard_tick(void *arg)
| 1199ed_pccard_tick(struct ed_softc *sc)
|
1200{
| 1200{
|
1201 struct ed_softc *sc = arg;
| |
1202 struct mii_data *mii;
1203 int media = 0;
1204
1205 ED_ASSERT_LOCKED(sc);
1206 if (sc->miibus != NULL) {
1207 mii = device_get_softc(sc->miibus);
1208 media = mii->mii_media_status;
1209 mii_tick(mii);
1210 if (mii->mii_media_status & IFM_ACTIVE &&
1211 media != mii->mii_media_status) {
1212 if (sc->chip_type == ED_CHIP_TYPE_DL10022) {
1213 ed_asic_outb(sc, ED_DL10022_DIAG,
1214 (mii->mii_media_active & IFM_FDX) ?
1215 ED_DL10022_COLLISON_DIS : 0);
1216#ifdef notyet
1217 } else if (sc->chip_type == ED_CHIP_TYPE_DL10019) {
1218 write_asic(sc, ED_DL10019_MAGIC,
1219 (mii->mii_media_active & IFM_FDX) ?
1220 DL19FDUPLX : 0);
1221#endif
1222 }
1223 }
1224
1225 }
| 1201 struct mii_data *mii;
1202 int media = 0;
1203
1204 ED_ASSERT_LOCKED(sc);
1205 if (sc->miibus != NULL) {
1206 mii = device_get_softc(sc->miibus);
1207 media = mii->mii_media_status;
1208 mii_tick(mii);
1209 if (mii->mii_media_status & IFM_ACTIVE &&
1210 media != mii->mii_media_status) {
1211 if (sc->chip_type == ED_CHIP_TYPE_DL10022) {
1212 ed_asic_outb(sc, ED_DL10022_DIAG,
1213 (mii->mii_media_active & IFM_FDX) ?
1214 ED_DL10022_COLLISON_DIS : 0);
1215#ifdef notyet
1216 } else if (sc->chip_type == ED_CHIP_TYPE_DL10019) {
1217 write_asic(sc, ED_DL10019_MAGIC,
1218 (mii->mii_media_active & IFM_FDX) ?
1219 DL19FDUPLX : 0);
1220#endif
1221 }
1222 }
1223
1224 }
|
1226 callout_reset(&sc->tick_ch, hz, ed_pccard_tick, sc);
| |
1227}
1228
1229static device_method_t ed_pccard_methods[] = {
1230 /* Device interface */
1231 DEVMETHOD(device_probe, ed_pccard_probe),
1232 DEVMETHOD(device_attach, ed_pccard_attach),
1233 DEVMETHOD(device_detach, ed_detach),
1234
1235 /* Bus interface */
1236 DEVMETHOD(bus_child_detached, ed_child_detached),
1237
1238 /* MII interface */
1239 DEVMETHOD(miibus_readreg, ed_miibus_readreg),
1240 DEVMETHOD(miibus_writereg, ed_miibus_writereg),
1241
1242 { 0, 0 }
1243};
1244
1245static driver_t ed_pccard_driver = {
1246 "ed",
1247 ed_pccard_methods,
1248 sizeof(struct ed_softc)
1249};
1250
1251DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0);
1252DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0);
1253MODULE_DEPEND(ed, miibus, 1, 1, 1);
1254MODULE_DEPEND(ed, ether, 1, 1, 1);
| 1225}
1226
1227static device_method_t ed_pccard_methods[] = {
1228 /* Device interface */
1229 DEVMETHOD(device_probe, ed_pccard_probe),
1230 DEVMETHOD(device_attach, ed_pccard_attach),
1231 DEVMETHOD(device_detach, ed_detach),
1232
1233 /* Bus interface */
1234 DEVMETHOD(bus_child_detached, ed_child_detached),
1235
1236 /* MII interface */
1237 DEVMETHOD(miibus_readreg, ed_miibus_readreg),
1238 DEVMETHOD(miibus_writereg, ed_miibus_writereg),
1239
1240 { 0, 0 }
1241};
1242
1243static driver_t ed_pccard_driver = {
1244 "ed",
1245 ed_pccard_methods,
1246 sizeof(struct ed_softc)
1247};
1248
1249DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0);
1250DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0);
1251MODULE_DEPEND(ed, miibus, 1, 1, 1);
1252MODULE_DEPEND(ed, ether, 1, 1, 1);
|