1/* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation --- 13 unchanged lines hidden (view full) --- 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Dave Airlie 25 * Alex Deucher 26 * Jerome Glisse 27 */ 28 29#include <sys/cdefs.h> |
30__FBSDID("$FreeBSD: stable/10/sys/dev/drm2/radeon/radeon_device.c 275408 2014-12-02 14:09:54Z tijl $"); |
31 32#include <dev/drm2/drmP.h> 33#include <dev/drm2/drm_crtc_helper.h> 34#include <dev/drm2/radeon/radeon_drm.h> 35#include "radeon_reg.h" 36#include "radeon.h" 37#include "atom.h" 38 --- 970 unchanged lines hidden (view full) --- 1009 rdev->ddev = ddev; 1010 rdev->flags = flags; 1011 rdev->family = flags & RADEON_FAMILY_MASK; 1012 rdev->is_atom_bios = false; 1013 rdev->usec_timeout = RADEON_MAX_USEC_TIMEOUT; 1014 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; 1015 rdev->accel_working = false; 1016 rdev->fictitious_range_registered = false; |
1017 rdev->fictitious_agp_range_registered = false; |
1018 /* set up ring ids */ 1019 for (i = 0; i < RADEON_NUM_RINGS; i++) { 1020 rdev->ring[i].idx = i; 1021 } 1022 1023 DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X).\n", 1024 radeon_family_name[rdev->family], ddev->pci_vendor, ddev->pci_device, 1025 ddev->pci_subvendor, ddev->pci_subdevice); --- 138 unchanged lines hidden (view full) --- 1164 VM_MEMATTR_WRITE_COMBINING); 1165 if (r != 0) { 1166 DRM_ERROR("Failed to register fictitious range " 1167 "0x%jx-0x%jx (%d).\n", (uintmax_t)rdev->mc.aper_base, 1168 (uintmax_t)rdev->mc.aper_base + rdev->mc.visible_vram_size, r); 1169 return (-r); 1170 } 1171 rdev->fictitious_range_registered = true; |
1172#if __OS_HAS_AGP 1173 if (rdev->flags & RADEON_IS_AGP) { 1174 DRM_INFO("%s: Taking over the fictitious range 0x%jx-0x%jx\n", 1175 __func__, (uintmax_t)rdev->mc.agp_base, 1176 (uintmax_t)rdev->mc.agp_base + rdev->mc.gtt_size); 1177 r = vm_phys_fictitious_reg_range( 1178 rdev->mc.agp_base, 1179 rdev->mc.agp_base + rdev->mc.gtt_size, 1180 VM_MEMATTR_WRITE_COMBINING); 1181 if (r != 0) { 1182 DRM_ERROR("Failed to register fictitious range " 1183 "0x%jx-0x%jx (%d).\n", (uintmax_t)rdev->mc.agp_base, 1184 (uintmax_t)rdev->mc.agp_base + rdev->mc.gtt_size, r); 1185 return (-r); 1186 } 1187 rdev->fictitious_agp_range_registered = true; 1188 } 1189#endif |
1190 1191 if ((radeon_testing & 1)) { 1192 radeon_test_moves(rdev); 1193 } 1194 if ((radeon_testing & 2)) { 1195 radeon_test_syncing(rdev); 1196 } 1197 if (radeon_benchmarking) { --- 21 unchanged lines hidden (view full) --- 1219 /* evict vram memory */ 1220 radeon_bo_evict_vram(rdev); 1221 1222 if (rdev->fictitious_range_registered) { 1223 vm_phys_fictitious_unreg_range( 1224 rdev->mc.aper_base, 1225 rdev->mc.aper_base + rdev->mc.visible_vram_size); 1226 } |
1227#if __OS_HAS_AGP 1228 if (rdev->fictitious_agp_range_registered) { 1229 vm_phys_fictitious_unreg_range( 1230 rdev->mc.agp_base, 1231 rdev->mc.agp_base + rdev->mc.gtt_size); 1232 } 1233#endif |
1234 1235 radeon_fini(rdev); 1236#ifdef DUMBBELL_WIP 1237 vga_switcheroo_unregister_client(rdev->pdev); 1238 vga_client_register(rdev->pdev, NULL, NULL, NULL); 1239#endif /* DUMBBELL_WIP */ 1240 1241 if (rdev->tq != NULL) { --- 336 unchanged lines hidden --- |