savage_state.c (152909) | savage_state.c (157617) |
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1/* savage_state.c -- State and drawing support for Savage 2 * 3 * Copyright 2004 Felix Kuehling 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation --- 10 unchanged lines hidden (view full) --- 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 20 * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR 21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF 22 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26#include <sys/cdefs.h> | 1/* savage_state.c -- State and drawing support for Savage 2 * 3 * Copyright 2004 Felix Kuehling 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation --- 10 unchanged lines hidden (view full) --- 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 20 * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR 21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF 22 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26#include <sys/cdefs.h> |
27__FBSDID("$FreeBSD: head/sys/dev/drm/savage_state.c 152909 2005-11-28 23:13:57Z anholt $"); | 27__FBSDID("$FreeBSD: head/sys/dev/drm/savage_state.c 157617 2006-04-09 20:45:45Z anholt $"); |
28#include "dev/drm/drmP.h" 29#include "dev/drm/savage_drm.h" 30#include "dev/drm/savage_drv.h" 31 32void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv, 33 const drm_clip_rect_t *pbox) 34{ 35 uint32_t scstart = dev_priv->state.s3d.new_scstart; --- 51 unchanged lines hidden (view full) --- 87 if ((addr & 6) != 2) { /* reserved bits */ 88 DRM_ERROR("bad texAddr%d %08x (reserved bits)\n", unit, addr); 89 return DRM_ERR(EINVAL); 90 } 91 if (!(addr & 1)) { /* local */ 92 addr &= ~7; 93 if (addr < dev_priv->texture_offset || 94 addr >= dev_priv->texture_offset+dev_priv->texture_size) { | 28#include "dev/drm/drmP.h" 29#include "dev/drm/savage_drm.h" 30#include "dev/drm/savage_drv.h" 31 32void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv, 33 const drm_clip_rect_t *pbox) 34{ 35 uint32_t scstart = dev_priv->state.s3d.new_scstart; --- 51 unchanged lines hidden (view full) --- 87 if ((addr & 6) != 2) { /* reserved bits */ 88 DRM_ERROR("bad texAddr%d %08x (reserved bits)\n", unit, addr); 89 return DRM_ERR(EINVAL); 90 } 91 if (!(addr & 1)) { /* local */ 92 addr &= ~7; 93 if (addr < dev_priv->texture_offset || 94 addr >= dev_priv->texture_offset+dev_priv->texture_size) { |
95 DRM_ERROR("bad texAddr%d %08x (local addr out of range)\n", 96 unit, addr); | 95 DRM_ERROR 96 ("bad texAddr%d %08x (local addr out of range)\n", 97 unit, addr); |
97 return DRM_ERR(EINVAL); 98 } 99 } else { /* AGP */ 100 if (!dev_priv->agp_textures) { 101 DRM_ERROR("bad texAddr%d %08x (AGP not available)\n", 102 unit, addr); 103 return DRM_ERR(EINVAL); 104 } 105 addr &= ~7; 106 if (addr < dev_priv->agp_textures->offset || 107 addr >= (dev_priv->agp_textures->offset + 108 dev_priv->agp_textures->size)) { | 98 return DRM_ERR(EINVAL); 99 } 100 } else { /* AGP */ 101 if (!dev_priv->agp_textures) { 102 DRM_ERROR("bad texAddr%d %08x (AGP not available)\n", 103 unit, addr); 104 return DRM_ERR(EINVAL); 105 } 106 addr &= ~7; 107 if (addr < dev_priv->agp_textures->offset || 108 addr >= (dev_priv->agp_textures->offset + 109 dev_priv->agp_textures->size)) { |
109 DRM_ERROR("bad texAddr%d %08x (AGP addr out of range)\n", 110 unit, addr); | 110 DRM_ERROR 111 ("bad texAddr%d %08x (AGP addr out of range)\n", 112 unit, addr); |
111 return DRM_ERR(EINVAL); 112 } 113 } 114 return 0; 115} 116 117#define SAVE_STATE(reg,where) \ 118 if(start <= reg && start+count > reg) \ --- 24 unchanged lines hidden (view full) --- 143 144 /* if any texture regs were changed ... */ 145 if (start <= SAVAGE_TEXCTRL_S3D && 146 start+count > SAVAGE_TEXPALADDR_S3D) { 147 /* ... check texture state */ 148 SAVE_STATE(SAVAGE_TEXCTRL_S3D, s3d.texctrl); 149 SAVE_STATE(SAVAGE_TEXADDR_S3D, s3d.texaddr); 150 if (dev_priv->state.s3d.texctrl & SAVAGE_TEXCTRL_TEXEN_MASK) | 113 return DRM_ERR(EINVAL); 114 } 115 } 116 return 0; 117} 118 119#define SAVE_STATE(reg,where) \ 120 if(start <= reg && start+count > reg) \ --- 24 unchanged lines hidden (view full) --- 145 146 /* if any texture regs were changed ... */ 147 if (start <= SAVAGE_TEXCTRL_S3D && 148 start+count > SAVAGE_TEXPALADDR_S3D) { 149 /* ... check texture state */ 150 SAVE_STATE(SAVAGE_TEXCTRL_S3D, s3d.texctrl); 151 SAVE_STATE(SAVAGE_TEXADDR_S3D, s3d.texaddr); 152 if (dev_priv->state.s3d.texctrl & SAVAGE_TEXCTRL_TEXEN_MASK) |
151 return savage_verify_texaddr( 152 dev_priv, 0, dev_priv->state.s3d.texaddr); | 153 return savage_verify_texaddr(dev_priv, 0, 154 dev_priv->state.s3d.texaddr); |
153 } 154 155 return 0; 156} 157 158static int savage_verify_state_s4(drm_savage_private_t *dev_priv, 159 unsigned int start, unsigned int count, 160 const uint32_t *regs) --- 9 unchanged lines hidden (view full) --- 170 171 SAVE_STATE_MASK(SAVAGE_DRAWCTRL0_S4, s4.new_drawctrl0, 172 ~SAVAGE_SCISSOR_MASK_S4); 173 SAVE_STATE_MASK(SAVAGE_DRAWCTRL1_S4, s4.new_drawctrl1, 174 ~SAVAGE_SCISSOR_MASK_S4); 175 176 /* if any texture regs were changed ... */ 177 if (start <= SAVAGE_TEXDESCR_S4 && | 155 } 156 157 return 0; 158} 159 160static int savage_verify_state_s4(drm_savage_private_t *dev_priv, 161 unsigned int start, unsigned int count, 162 const uint32_t *regs) --- 9 unchanged lines hidden (view full) --- 172 173 SAVE_STATE_MASK(SAVAGE_DRAWCTRL0_S4, s4.new_drawctrl0, 174 ~SAVAGE_SCISSOR_MASK_S4); 175 SAVE_STATE_MASK(SAVAGE_DRAWCTRL1_S4, s4.new_drawctrl1, 176 ~SAVAGE_SCISSOR_MASK_S4); 177 178 /* if any texture regs were changed ... */ 179 if (start <= SAVAGE_TEXDESCR_S4 && |
178 start+count > SAVAGE_TEXPALADDR_S4) { | 180 start + count > SAVAGE_TEXPALADDR_S4) { |
179 /* ... check texture state */ 180 SAVE_STATE(SAVAGE_TEXDESCR_S4, s4.texdescr); 181 SAVE_STATE(SAVAGE_TEXADDR0_S4, s4.texaddr0); 182 SAVE_STATE(SAVAGE_TEXADDR1_S4, s4.texaddr1); 183 if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX0EN_MASK) | 181 /* ... check texture state */ 182 SAVE_STATE(SAVAGE_TEXDESCR_S4, s4.texdescr); 183 SAVE_STATE(SAVAGE_TEXADDR0_S4, s4.texaddr0); 184 SAVE_STATE(SAVAGE_TEXADDR1_S4, s4.texaddr1); 185 if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX0EN_MASK) |
184 ret |= savage_verify_texaddr( 185 dev_priv, 0, dev_priv->state.s4.texaddr0); | 186 ret |= savage_verify_texaddr(dev_priv, 0, 187 dev_priv->state.s4.texaddr0); |
186 if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX1EN_MASK) | 188 if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX1EN_MASK) |
187 ret |= savage_verify_texaddr( 188 dev_priv, 1, dev_priv->state.s4.texaddr1); | 189 ret |= savage_verify_texaddr(dev_priv, 1, 190 dev_priv->state.s4.texaddr1); |
189 } 190 191 return ret; 192} 193#undef SAVE_STATE 194#undef SAVE_STATE_MASK 195 196static int savage_dispatch_state(drm_savage_private_t *dev_priv, --- 29 unchanged lines hidden (view full) --- 226 } 227 } else { 228 ret = savage_verify_state_s4(dev_priv, start, count, regs); 229 if (ret != 0) 230 return ret; 231 /* scissor regs are emitted in savage_dispatch_draw */ 232 if (start < SAVAGE_DRAWCTRL0_S4) { 233 if (start+count > SAVAGE_DRAWCTRL1_S4+1) | 191 } 192 193 return ret; 194} 195#undef SAVE_STATE 196#undef SAVE_STATE_MASK 197 198static int savage_dispatch_state(drm_savage_private_t *dev_priv, --- 29 unchanged lines hidden (view full) --- 228 } 229 } else { 230 ret = savage_verify_state_s4(dev_priv, start, count, regs); 231 if (ret != 0) 232 return ret; 233 /* scissor regs are emitted in savage_dispatch_draw */ 234 if (start < SAVAGE_DRAWCTRL0_S4) { 235 if (start+count > SAVAGE_DRAWCTRL1_S4+1) |
234 count2 = count - (SAVAGE_DRAWCTRL1_S4+1 - start); | 236 count2 = count - 237 (SAVAGE_DRAWCTRL1_S4 + 1 - start); |
235 if (start+count > SAVAGE_DRAWCTRL0_S4) 236 count = SAVAGE_DRAWCTRL0_S4 - start; 237 } else if (start <= SAVAGE_DRAWCTRL1_S4) { 238 if (start+count > SAVAGE_DRAWCTRL1_S4+1) { 239 count -= SAVAGE_DRAWCTRL1_S4+1 - start; 240 start = SAVAGE_DRAWCTRL1_S4+1; 241 } else 242 return 0; --- 59 unchanged lines hidden (view full) --- 302 DRM_ERROR("wrong number of vertices %u in TRILIST\n", 303 n); 304 return DRM_ERR(EINVAL); 305 } 306 break; 307 case SAVAGE_PRIM_TRISTRIP: 308 case SAVAGE_PRIM_TRIFAN: 309 if (n < 3) { | 238 if (start+count > SAVAGE_DRAWCTRL0_S4) 239 count = SAVAGE_DRAWCTRL0_S4 - start; 240 } else if (start <= SAVAGE_DRAWCTRL1_S4) { 241 if (start+count > SAVAGE_DRAWCTRL1_S4+1) { 242 count -= SAVAGE_DRAWCTRL1_S4+1 - start; 243 start = SAVAGE_DRAWCTRL1_S4+1; 244 } else 245 return 0; --- 59 unchanged lines hidden (view full) --- 305 DRM_ERROR("wrong number of vertices %u in TRILIST\n", 306 n); 307 return DRM_ERR(EINVAL); 308 } 309 break; 310 case SAVAGE_PRIM_TRISTRIP: 311 case SAVAGE_PRIM_TRIFAN: 312 if (n < 3) { |
310 DRM_ERROR("wrong number of vertices %u in TRIFAN/STRIP\n", 311 n); | 313 DRM_ERROR 314 ("wrong number of vertices %u in TRIFAN/STRIP\n", 315 n); |
312 return DRM_ERR(EINVAL); 313 } 314 break; 315 default: 316 DRM_ERROR("invalid primitive type %u\n", prim); 317 return DRM_ERR(EINVAL); 318 } 319 320 if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 321 if (skip != 0) { | 316 return DRM_ERR(EINVAL); 317 } 318 break; 319 default: 320 DRM_ERROR("invalid primitive type %u\n", prim); 321 return DRM_ERR(EINVAL); 322 } 323 324 if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 325 if (skip != 0) { |
322 DRM_ERROR("invalid skip flags 0x%04x for DMA\n", 323 skip); | 326 DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); |
324 return DRM_ERR(EINVAL); 325 } 326 } else { 327 unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) - 328 (skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) - 329 (skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1); 330 if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) { | 327 return DRM_ERR(EINVAL); 328 } 329 } else { 330 unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) - 331 (skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) - 332 (skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1); 333 if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) { |
331 DRM_ERROR("invalid skip flags 0x%04x for DMA\n", 332 skip); | 334 DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); |
333 return DRM_ERR(EINVAL); 334 } 335 if (reorder) { 336 DRM_ERROR("TRILIST_201 used on Savage4 hardware\n"); 337 return DRM_ERR(EINVAL); 338 } 339 } 340 --- 37 unchanged lines hidden (view full) --- 378 int reorder[3] = {-1, -1, -1}; 379 reorder[start%3] = 2; 380 381 BEGIN_BCI((count+1+1)/2); 382 BCI_DRAW_INDICES_S3D(count, prim, start+2); 383 384 for (i = start+1; i+1 < start+count; i += 2) 385 BCI_WRITE((i + reorder[i % 3]) | | 335 return DRM_ERR(EINVAL); 336 } 337 if (reorder) { 338 DRM_ERROR("TRILIST_201 used on Savage4 hardware\n"); 339 return DRM_ERR(EINVAL); 340 } 341 } 342 --- 37 unchanged lines hidden (view full) --- 380 int reorder[3] = {-1, -1, -1}; 381 reorder[start%3] = 2; 382 383 BEGIN_BCI((count+1+1)/2); 384 BCI_DRAW_INDICES_S3D(count, prim, start+2); 385 386 for (i = start+1; i+1 < start+count; i += 2) 387 BCI_WRITE((i + reorder[i % 3]) | |
386 ((i+1 + reorder[(i+1) % 3]) << 16)); | 388 ((i + 1 + 389 reorder[(i + 1) % 3]) << 16)); |
387 if (i < start+count) 388 BCI_WRITE(i + reorder[i%3]); 389 } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 390 BEGIN_BCI((count+1+1)/2); 391 BCI_DRAW_INDICES_S3D(count, prim, start); 392 393 for (i = start+1; i+1 < start+count; i += 2) 394 BCI_WRITE(i | ((i+1) << 16)); --- 44 unchanged lines hidden (view full) --- 439 DRM_ERROR("wrong number of vertices %u in TRILIST\n", 440 n); 441 return DRM_ERR(EINVAL); 442 } 443 break; 444 case SAVAGE_PRIM_TRISTRIP: 445 case SAVAGE_PRIM_TRIFAN: 446 if (n < 3) { | 390 if (i < start+count) 391 BCI_WRITE(i + reorder[i%3]); 392 } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 393 BEGIN_BCI((count+1+1)/2); 394 BCI_DRAW_INDICES_S3D(count, prim, start); 395 396 for (i = start+1; i+1 < start+count; i += 2) 397 BCI_WRITE(i | ((i+1) << 16)); --- 44 unchanged lines hidden (view full) --- 442 DRM_ERROR("wrong number of vertices %u in TRILIST\n", 443 n); 444 return DRM_ERR(EINVAL); 445 } 446 break; 447 case SAVAGE_PRIM_TRISTRIP: 448 case SAVAGE_PRIM_TRIFAN: 449 if (n < 3) { |
447 DRM_ERROR("wrong number of vertices %u in TRIFAN/STRIP\n", 448 n); | 450 DRM_ERROR 451 ("wrong number of vertices %u in TRIFAN/STRIP\n", 452 n); |
449 return DRM_ERR(EINVAL); 450 } 451 break; 452 default: 453 DRM_ERROR("invalid primitive type %u\n", prim); 454 return DRM_ERR(EINVAL); 455 } 456 --- 94 unchanged lines hidden (view full) --- 551 return 0; 552 553 switch (prim) { 554 case SAVAGE_PRIM_TRILIST_201: 555 reorder = 1; 556 prim = SAVAGE_PRIM_TRILIST; 557 case SAVAGE_PRIM_TRILIST: 558 if (n % 3 != 0) { | 453 return DRM_ERR(EINVAL); 454 } 455 break; 456 default: 457 DRM_ERROR("invalid primitive type %u\n", prim); 458 return DRM_ERR(EINVAL); 459 } 460 --- 94 unchanged lines hidden (view full) --- 555 return 0; 556 557 switch (prim) { 558 case SAVAGE_PRIM_TRILIST_201: 559 reorder = 1; 560 prim = SAVAGE_PRIM_TRILIST; 561 case SAVAGE_PRIM_TRILIST: 562 if (n % 3 != 0) { |
559 DRM_ERROR("wrong number of indices %u in TRILIST\n", 560 n); | 563 DRM_ERROR("wrong number of indices %u in TRILIST\n", n); |
561 return DRM_ERR(EINVAL); 562 } 563 break; 564 case SAVAGE_PRIM_TRISTRIP: 565 case SAVAGE_PRIM_TRIFAN: 566 if (n < 3) { | 564 return DRM_ERR(EINVAL); 565 } 566 break; 567 case SAVAGE_PRIM_TRISTRIP: 568 case SAVAGE_PRIM_TRIFAN: 569 if (n < 3) { |
567 DRM_ERROR("wrong number of indices %u in TRIFAN/STRIP\n", 568 n); | 570 DRM_ERROR 571 ("wrong number of indices %u in TRIFAN/STRIP\n", n); |
569 return DRM_ERR(EINVAL); 570 } 571 break; 572 default: 573 DRM_ERROR("invalid primitive type %u\n", prim); 574 return DRM_ERR(EINVAL); 575 } 576 577 if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 578 if (skip != 0) { | 572 return DRM_ERR(EINVAL); 573 } 574 break; 575 default: 576 DRM_ERROR("invalid primitive type %u\n", prim); 577 return DRM_ERR(EINVAL); 578 } 579 580 if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 581 if (skip != 0) { |
579 DRM_ERROR("invalid skip flags 0x%04x for DMA\n", 580 skip); | 582 DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); |
581 return DRM_ERR(EINVAL); 582 } 583 } else { 584 unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) - 585 (skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) - 586 (skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1); 587 if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) { | 583 return DRM_ERR(EINVAL); 584 } 585 } else { 586 unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) - 587 (skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) - 588 (skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1); 589 if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) { |
588 DRM_ERROR("invalid skip flags 0x%04x for DMA\n", 589 skip); | 590 DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip); |
590 return DRM_ERR(EINVAL); 591 } 592 if (reorder) { 593 DRM_ERROR("TRILIST_201 used on Savage4 hardware\n"); 594 return DRM_ERR(EINVAL); 595 } 596 } 597 --- 40 unchanged lines hidden (view full) --- 638 * for correct culling. Only on Savage3D. */ 639 int reorder[3] = {2, -1, -1}; 640 641 BEGIN_BCI((count+1+1)/2); 642 BCI_DRAW_INDICES_S3D(count, prim, idx[2]); 643 644 for (i = 1; i+1 < count; i += 2) 645 BCI_WRITE(idx[i + reorder[i % 3]] | | 591 return DRM_ERR(EINVAL); 592 } 593 if (reorder) { 594 DRM_ERROR("TRILIST_201 used on Savage4 hardware\n"); 595 return DRM_ERR(EINVAL); 596 } 597 } 598 --- 40 unchanged lines hidden (view full) --- 639 * for correct culling. Only on Savage3D. */ 640 int reorder[3] = {2, -1, -1}; 641 642 BEGIN_BCI((count+1+1)/2); 643 BCI_DRAW_INDICES_S3D(count, prim, idx[2]); 644 645 for (i = 1; i+1 < count; i += 2) 646 BCI_WRITE(idx[i + reorder[i % 3]] | |
646 (idx[i+1 + reorder[(i+1) % 3]] << 16)); | 647 (idx[i + 1 + 648 reorder[(i + 1) % 3]] << 16)); |
647 if (i < count) 648 BCI_WRITE(idx[i + reorder[i%3]]); 649 } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 650 BEGIN_BCI((count+1+1)/2); 651 BCI_DRAW_INDICES_S3D(count, prim, idx[0]); 652 653 for (i = 1; i+1 < count; i += 2) 654 BCI_WRITE(idx[i] | (idx[i+1] << 16)); --- 17 unchanged lines hidden (view full) --- 672 673 return 0; 674} 675 676static int savage_dispatch_vb_idx(drm_savage_private_t *dev_priv, 677 const drm_savage_cmd_header_t *cmd_header, 678 const uint16_t *idx, 679 const uint32_t *vtxbuf, | 649 if (i < count) 650 BCI_WRITE(idx[i + reorder[i%3]]); 651 } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 652 BEGIN_BCI((count+1+1)/2); 653 BCI_DRAW_INDICES_S3D(count, prim, idx[0]); 654 655 for (i = 1; i+1 < count; i += 2) 656 BCI_WRITE(idx[i] | (idx[i+1] << 16)); --- 17 unchanged lines hidden (view full) --- 674 675 return 0; 676} 677 678static int savage_dispatch_vb_idx(drm_savage_private_t *dev_priv, 679 const drm_savage_cmd_header_t *cmd_header, 680 const uint16_t *idx, 681 const uint32_t *vtxbuf, |
680 unsigned int vb_size, 681 unsigned int vb_stride) | 682 unsigned int vb_size, unsigned int vb_stride) |
682{ 683 unsigned char reorder = 0; 684 unsigned int prim = cmd_header->idx.prim; 685 unsigned int skip = cmd_header->idx.skip; 686 unsigned int n = cmd_header->idx.count; 687 unsigned int vtx_size; 688 unsigned int i; 689 DMA_LOCALS; 690 691 if (!n) 692 return 0; 693 694 switch (prim) { 695 case SAVAGE_PRIM_TRILIST_201: 696 reorder = 1; 697 prim = SAVAGE_PRIM_TRILIST; 698 case SAVAGE_PRIM_TRILIST: 699 if (n % 3 != 0) { | 683{ 684 unsigned char reorder = 0; 685 unsigned int prim = cmd_header->idx.prim; 686 unsigned int skip = cmd_header->idx.skip; 687 unsigned int n = cmd_header->idx.count; 688 unsigned int vtx_size; 689 unsigned int i; 690 DMA_LOCALS; 691 692 if (!n) 693 return 0; 694 695 switch (prim) { 696 case SAVAGE_PRIM_TRILIST_201: 697 reorder = 1; 698 prim = SAVAGE_PRIM_TRILIST; 699 case SAVAGE_PRIM_TRILIST: 700 if (n % 3 != 0) { |
700 DRM_ERROR("wrong number of indices %u in TRILIST\n", 701 n); | 701 DRM_ERROR("wrong number of indices %u in TRILIST\n", n); |
702 return DRM_ERR(EINVAL); 703 } 704 break; 705 case SAVAGE_PRIM_TRISTRIP: 706 case SAVAGE_PRIM_TRIFAN: 707 if (n < 3) { | 702 return DRM_ERR(EINVAL); 703 } 704 break; 705 case SAVAGE_PRIM_TRISTRIP: 706 case SAVAGE_PRIM_TRIFAN: 707 if (n < 3) { |
708 DRM_ERROR("wrong number of indices %u in TRIFAN/STRIP\n", 709 n); | 708 DRM_ERROR 709 ("wrong number of indices %u in TRIFAN/STRIP\n", n); |
710 return DRM_ERR(EINVAL); 711 } 712 break; 713 default: 714 DRM_ERROR("invalid primitive type %u\n", prim); 715 return DRM_ERR(EINVAL); 716 } 717 --- 85 unchanged lines hidden (view full) --- 803 if (nbox == 0) 804 return 0; 805 806 clear_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP | 807 BCI_CMD_SEND_COLOR | BCI_CMD_DEST_PBD_NEW; 808 BCI_CMD_SET_ROP(clear_cmd,0xCC); 809 810 nbufs = ((flags & SAVAGE_FRONT) ? 1 : 0) + | 710 return DRM_ERR(EINVAL); 711 } 712 break; 713 default: 714 DRM_ERROR("invalid primitive type %u\n", prim); 715 return DRM_ERR(EINVAL); 716 } 717 --- 85 unchanged lines hidden (view full) --- 803 if (nbox == 0) 804 return 0; 805 806 clear_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP | 807 BCI_CMD_SEND_COLOR | BCI_CMD_DEST_PBD_NEW; 808 BCI_CMD_SET_ROP(clear_cmd,0xCC); 809 810 nbufs = ((flags & SAVAGE_FRONT) ? 1 : 0) + |
811 ((flags & SAVAGE_BACK) ? 1 : 0) + 812 ((flags & SAVAGE_DEPTH) ? 1 : 0); | 811 ((flags & SAVAGE_BACK) ? 1 : 0) + ((flags & SAVAGE_DEPTH) ? 1 : 0); |
813 if (nbufs == 0) 814 return 0; 815 816 if (data->clear1.mask != 0xffffffff) { 817 /* set mask */ 818 BEGIN_DMA(2); 819 DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1); 820 DMA_WRITE(data->clear1.mask); --- 153 unchanged lines hidden (view full) --- 974 975 LOCK_TEST_WITH_RETURN(dev, filp); 976 977 DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_savage_cmdbuf_t __user *)data, 978 sizeof(cmdbuf)); 979 980 if (dma && dma->buflist) { 981 if (cmdbuf.dma_idx > dma->buf_count) { | 812 if (nbufs == 0) 813 return 0; 814 815 if (data->clear1.mask != 0xffffffff) { 816 /* set mask */ 817 BEGIN_DMA(2); 818 DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1); 819 DMA_WRITE(data->clear1.mask); --- 153 unchanged lines hidden (view full) --- 973 974 LOCK_TEST_WITH_RETURN(dev, filp); 975 976 DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_savage_cmdbuf_t __user *)data, 977 sizeof(cmdbuf)); 978 979 if (dma && dma->buflist) { 980 if (cmdbuf.dma_idx > dma->buf_count) { |
982 DRM_ERROR("vertex buffer index %u out of range (0-%u)\n", 983 cmdbuf.dma_idx, dma->buf_count-1); | 981 DRM_ERROR 982 ("vertex buffer index %u out of range (0-%u)\n", 983 cmdbuf.dma_idx, dma->buf_count-1); |
984 return DRM_ERR(EINVAL); 985 } 986 dmabuf = dma->buflist[cmdbuf.dma_idx]; 987 } else { 988 dmabuf = NULL; 989 } 990 991 /* Copy the user buffers into kernel temporary areas. This hasn't been --- 176 unchanged lines hidden --- | 984 return DRM_ERR(EINVAL); 985 } 986 dmabuf = dma->buflist[cmdbuf.dma_idx]; 987 } else { 988 dmabuf = NULL; 989 } 990 991 /* Copy the user buffers into kernel temporary areas. This hasn't been --- 176 unchanged lines hidden --- |