i915_drm.h (152909) | i915_drm.h (157617) |
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1/*- 2 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, --- 11 unchanged lines hidden (view full) --- 20 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 * 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, --- 11 unchanged lines hidden (view full) --- 20 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 * 25 */ 26 27#include <sys/cdefs.h> |
28__FBSDID("$FreeBSD: head/sys/dev/drm/i915_drm.h 152909 2005-11-28 23:13:57Z anholt $"); | 28__FBSDID("$FreeBSD: head/sys/dev/drm/i915_drm.h 157617 2006-04-09 20:45:45Z anholt $"); |
29 30#ifndef _I915_DRM_H_ 31#define _I915_DRM_H_ 32 33/* Please note that modifications to all structs defined here are 34 * subject to backwards-compatibility constraints. 35 */ 36 --- 35 unchanged lines hidden (view full) --- 72 int last_enqueue; /* last time a buffer was enqueued */ 73 int last_dispatch; /* age of the most recently dispatched buffer */ 74 int ctxOwner; /* last context to upload state */ 75 int texAge; 76 int pf_enabled; /* is pageflipping allowed? */ 77 int pf_active; 78 int pf_current_page; /* which buffer is being displayed? */ 79 int perf_boxes; /* performance boxes to be displayed */ | 29 30#ifndef _I915_DRM_H_ 31#define _I915_DRM_H_ 32 33/* Please note that modifications to all structs defined here are 34 * subject to backwards-compatibility constraints. 35 */ 36 --- 35 unchanged lines hidden (view full) --- 72 int last_enqueue; /* last time a buffer was enqueued */ 73 int last_dispatch; /* age of the most recently dispatched buffer */ 74 int ctxOwner; /* last context to upload state */ 75 int texAge; 76 int pf_enabled; /* is pageflipping allowed? */ 77 int pf_active; 78 int pf_current_page; /* which buffer is being displayed? */ 79 int perf_boxes; /* performance boxes to be displayed */ |
80 int width, height; /* screen size in pixels */ 81 82 drm_handle_t front_handle; 83 int front_offset; 84 int front_size; 85 86 drm_handle_t back_handle; 87 int back_offset; 88 int back_size; 89 90 drm_handle_t depth_handle; 91 int depth_offset; 92 int depth_size; 93 94 drm_handle_t tex_handle; 95 int tex_offset; 96 int tex_size; 97 int log_tex_granularity; 98 int pitch; 99 int rotation; /* 0, 90, 180 or 270 */ 100 int rotated_offset; 101 int rotated_size; 102 int rotated_pitch; 103 int virtualX, virtualY; |
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80} drm_i915_sarea_t; 81 82/* Flags for perf_boxes 83 */ 84#define I915_BOX_RING_EMPTY 0x1 85#define I915_BOX_FLIP 0x2 86#define I915_BOX_WAIT 0x4 87#define I915_BOX_TEXTURE_LOAD 0x8 --- 9 unchanged lines hidden (view full) --- 97#define DRM_I915_IRQ_EMIT 0x04 98#define DRM_I915_IRQ_WAIT 0x05 99#define DRM_I915_GETPARAM 0x06 100#define DRM_I915_SETPARAM 0x07 101#define DRM_I915_ALLOC 0x08 102#define DRM_I915_FREE 0x09 103#define DRM_I915_INIT_HEAP 0x0a 104#define DRM_I915_CMDBUFFER 0x0b | 104} drm_i915_sarea_t; 105 106/* Flags for perf_boxes 107 */ 108#define I915_BOX_RING_EMPTY 0x1 109#define I915_BOX_FLIP 0x2 110#define I915_BOX_WAIT 0x4 111#define I915_BOX_TEXTURE_LOAD 0x8 --- 9 unchanged lines hidden (view full) --- 121#define DRM_I915_IRQ_EMIT 0x04 122#define DRM_I915_IRQ_WAIT 0x05 123#define DRM_I915_GETPARAM 0x06 124#define DRM_I915_SETPARAM 0x07 125#define DRM_I915_ALLOC 0x08 126#define DRM_I915_FREE 0x09 127#define DRM_I915_INIT_HEAP 0x0a 128#define DRM_I915_CMDBUFFER 0x0b |
129#define DRM_I915_DESTROY_HEAP 0x0c |
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105 106#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) 107#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) 108#define DRM_IOCTL_I915_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLIP) 109#define DRM_IOCTL_I915_BATCHBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_BATCHBUFFER, drm_i915_batchbuffer_t) 110#define DRM_IOCTL_I915_IRQ_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_IRQ_EMIT, drm_i915_irq_emit_t) 111#define DRM_IOCTL_I915_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_IRQ_WAIT, drm_i915_irq_wait_t) 112#define DRM_IOCTL_I915_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GETPARAM, drm_i915_getparam_t) 113#define DRM_IOCTL_I915_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SETPARAM, drm_i915_setparam_t) 114#define DRM_IOCTL_I915_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_ALLOC, drm_i915_mem_alloc_t) 115#define DRM_IOCTL_I915_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_FREE, drm_i915_mem_free_t) 116#define DRM_IOCTL_I915_INIT_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT_HEAP, drm_i915_mem_init_heap_t) 117#define DRM_IOCTL_I915_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_CMDBUFFER, drm_i915_cmdbuffer_t) | 130 131#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) 132#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) 133#define DRM_IOCTL_I915_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLIP) 134#define DRM_IOCTL_I915_BATCHBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_BATCHBUFFER, drm_i915_batchbuffer_t) 135#define DRM_IOCTL_I915_IRQ_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_IRQ_EMIT, drm_i915_irq_emit_t) 136#define DRM_IOCTL_I915_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_IRQ_WAIT, drm_i915_irq_wait_t) 137#define DRM_IOCTL_I915_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GETPARAM, drm_i915_getparam_t) 138#define DRM_IOCTL_I915_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SETPARAM, drm_i915_setparam_t) 139#define DRM_IOCTL_I915_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_ALLOC, drm_i915_mem_alloc_t) 140#define DRM_IOCTL_I915_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_FREE, drm_i915_mem_free_t) 141#define DRM_IOCTL_I915_INIT_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT_HEAP, drm_i915_mem_init_heap_t) 142#define DRM_IOCTL_I915_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_CMDBUFFER, drm_i915_cmdbuffer_t) |
143#define DRM_IOCTL_I915_DESTROY_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_DESTROY_HEAP, drm_i915_mem_destroy_heap_t) |
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118 | 144 |
145 |
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119/* Allow drivers to submit batchbuffers directly to hardware, relying 120 * on the security mechanisms provided by hardware. 121 */ 122typedef struct _drm_i915_batchbuffer { 123 int start; /* agp offset */ 124 int used; /* nr bytes in use */ 125 int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ 126 int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ --- 22 unchanged lines hidden (view full) --- 149typedef struct drm_i915_irq_wait { 150 int irq_seq; 151} drm_i915_irq_wait_t; 152 153/* Ioctl to query kernel params: 154 */ 155#define I915_PARAM_IRQ_ACTIVE 1 156#define I915_PARAM_ALLOW_BATCHBUFFER 2 | 146/* Allow drivers to submit batchbuffers directly to hardware, relying 147 * on the security mechanisms provided by hardware. 148 */ 149typedef struct _drm_i915_batchbuffer { 150 int start; /* agp offset */ 151 int used; /* nr bytes in use */ 152 int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ 153 int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ --- 22 unchanged lines hidden (view full) --- 176typedef struct drm_i915_irq_wait { 177 int irq_seq; 178} drm_i915_irq_wait_t; 179 180/* Ioctl to query kernel params: 181 */ 182#define I915_PARAM_IRQ_ACTIVE 1 183#define I915_PARAM_ALLOW_BATCHBUFFER 2 |
184#define I915_PARAM_LAST_DISPATCH 3 |
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157 158typedef struct drm_i915_getparam { 159 int param; 160 int __user *value; 161} drm_i915_getparam_t; 162 163/* Ioctl to set kernel params: 164 */ --- 23 unchanged lines hidden (view full) --- 188} drm_i915_mem_free_t; 189 190typedef struct drm_i915_mem_init_heap { 191 int region; 192 int size; 193 int start; 194} drm_i915_mem_init_heap_t; 195 | 185 186typedef struct drm_i915_getparam { 187 int param; 188 int __user *value; 189} drm_i915_getparam_t; 190 191/* Ioctl to set kernel params: 192 */ --- 23 unchanged lines hidden (view full) --- 216} drm_i915_mem_free_t; 217 218typedef struct drm_i915_mem_init_heap { 219 int region; 220 int size; 221 int start; 222} drm_i915_mem_init_heap_t; 223 |
224/* Allow memory manager to be torn down and re-initialized (eg on 225 * rotate): 226 */ 227typedef struct drm_i915_mem_destroy_heap { 228 int region; 229} drm_i915_mem_destroy_heap_t; 230 |
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196#endif /* _I915_DRM_H_ */ | 231#endif /* _I915_DRM_H_ */ |