Deleted Added
full compact
i915_dma.c (152909) i915_dma.c (157617)
1/* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
2 */
3/*-
4 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the

--- 13 unchanged lines hidden (view full) ---

22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 */
28
29#include <sys/cdefs.h>
1/* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
2 */
3/*-
4 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the

--- 13 unchanged lines hidden (view full) ---

22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: head/sys/dev/drm/i915_dma.c 152909 2005-11-28 23:13:57Z anholt $");
30__FBSDID("$FreeBSD: head/sys/dev/drm/i915_dma.c 157617 2006-04-09 20:45:45Z anholt $");
31
32#include "dev/drm/drmP.h"
33#include "dev/drm/drm.h"
34#include "dev/drm/i915_drm.h"
35#include "dev/drm/i915_drv.h"
36
37/* Really want an OS-independent resettable timer. Would like to have
38 * this loop run for (eg) 3 sec, but have the timer reset every time

--- 303 unchanged lines hidden (view full) ---

342}
343
344static int i915_emit_cmds(drm_device_t * dev, int __user * buffer, int dwords)
345{
346 drm_i915_private_t *dev_priv = dev->dev_private;
347 int i;
348 RING_LOCALS;
349
31
32#include "dev/drm/drmP.h"
33#include "dev/drm/drm.h"
34#include "dev/drm/i915_drm.h"
35#include "dev/drm/i915_drv.h"
36
37/* Really want an OS-independent resettable timer. Would like to have
38 * this loop run for (eg) 3 sec, but have the timer reset every time

--- 303 unchanged lines hidden (view full) ---

342}
343
344static int i915_emit_cmds(drm_device_t * dev, int __user * buffer, int dwords)
345{
346 drm_i915_private_t *dev_priv = dev->dev_private;
347 int i;
348 RING_LOCALS;
349
350 if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
351 return DRM_ERR(EINVAL);
352
353 BEGIN_LP_RING(((dwords+1)&~1));
354
350 for (i = 0; i < dwords;) {
351 int cmd, sz;
352
353 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
354 return DRM_ERR(EINVAL);
355
355 for (i = 0; i < dwords;) {
356 int cmd, sz;
357
358 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
359 return DRM_ERR(EINVAL);
360
356/* printk("%d/%d ", i, dwords); */
357
358 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
359 return DRM_ERR(EINVAL);
360
361 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
362 return DRM_ERR(EINVAL);
363
361 BEGIN_LP_RING(sz);
362 OUT_RING(cmd);
363
364 while (++i, --sz) {
365 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
366 sizeof(cmd))) {
367 return DRM_ERR(EINVAL);
368 }
369 OUT_RING(cmd);
370 }
364 OUT_RING(cmd);
365
366 while (++i, --sz) {
367 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
368 sizeof(cmd))) {
369 return DRM_ERR(EINVAL);
370 }
371 OUT_RING(cmd);
372 }
371 ADVANCE_LP_RING();
372 }
373 }
374
375 if (dwords & 1)
376 OUT_RING(0);
373
377
378 ADVANCE_LP_RING();
379
374 return 0;
375}
376
377static int i915_emit_box(drm_device_t * dev,
378 drm_clip_rect_t __user * boxes,
379 int i, int DR1, int DR4)
380{
381 drm_i915_private_t *dev_priv = dev->dev_private;

--- 17 unchanged lines hidden (view full) ---

399 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
400 OUT_RING(DR4);
401 OUT_RING(0);
402 ADVANCE_LP_RING();
403
404 return 0;
405}
406
380 return 0;
381}
382
383static int i915_emit_box(drm_device_t * dev,
384 drm_clip_rect_t __user * boxes,
385 int i, int DR1, int DR4)
386{
387 drm_i915_private_t *dev_priv = dev->dev_private;

--- 17 unchanged lines hidden (view full) ---

405 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
406 OUT_RING(DR4);
407 OUT_RING(0);
408 ADVANCE_LP_RING();
409
410 return 0;
411}
412
413
414static void i915_emit_breadcrumb(drm_device_t *dev)
415{
416 drm_i915_private_t *dev_priv = dev->dev_private;
417 RING_LOCALS;
418
419 dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
420
421 BEGIN_LP_RING(4);
422 OUT_RING(CMD_STORE_DWORD_IDX);
423 OUT_RING(20);
424 OUT_RING(dev_priv->counter);
425 OUT_RING(0);
426 ADVANCE_LP_RING();
427}
428
407static int i915_dispatch_cmdbuffer(drm_device_t * dev,
408 drm_i915_cmdbuffer_t * cmd)
409{
410 int nbox = cmd->num_cliprects;
411 int i = 0, count, ret;
412
413 if (cmd->sz & 0x3) {
414 DRM_ERROR("alignment");

--- 12 unchanged lines hidden (view full) ---

427 return ret;
428 }
429
430 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
431 if (ret)
432 return ret;
433 }
434
429static int i915_dispatch_cmdbuffer(drm_device_t * dev,
430 drm_i915_cmdbuffer_t * cmd)
431{
432 int nbox = cmd->num_cliprects;
433 int i = 0, count, ret;
434
435 if (cmd->sz & 0x3) {
436 DRM_ERROR("alignment");

--- 12 unchanged lines hidden (view full) ---

449 return ret;
450 }
451
452 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
453 if (ret)
454 return ret;
455 }
456
457 i915_emit_breadcrumb( dev );
435 return 0;
436}
437
438static int i915_dispatch_batchbuffer(drm_device_t * dev,
439 drm_i915_batchbuffer_t * batch)
440{
441 drm_i915_private_t *dev_priv = dev->dev_private;
442 drm_clip_rect_t __user *boxes = batch->cliprects;

--- 28 unchanged lines hidden (view full) ---

471 OUT_RING(MI_BATCH_BUFFER);
472 OUT_RING(batch->start | MI_BATCH_NON_SECURE);
473 OUT_RING(batch->start + batch->used - 4);
474 OUT_RING(0);
475 ADVANCE_LP_RING();
476 }
477 }
478
458 return 0;
459}
460
461static int i915_dispatch_batchbuffer(drm_device_t * dev,
462 drm_i915_batchbuffer_t * batch)
463{
464 drm_i915_private_t *dev_priv = dev->dev_private;
465 drm_clip_rect_t __user *boxes = batch->cliprects;

--- 28 unchanged lines hidden (view full) ---

494 OUT_RING(MI_BATCH_BUFFER);
495 OUT_RING(batch->start | MI_BATCH_NON_SECURE);
496 OUT_RING(batch->start + batch->used - 4);
497 OUT_RING(0);
498 ADVANCE_LP_RING();
499 }
500 }
501
479 dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
480
481 BEGIN_LP_RING(4);
482 OUT_RING(CMD_STORE_DWORD_IDX);
483 OUT_RING(20);
484 OUT_RING(dev_priv->counter);
485 OUT_RING(0);
486 ADVANCE_LP_RING();
487
502 i915_emit_breadcrumb( dev );
488 return 0;
489}
490
491static int i915_dispatch_flip(drm_device_t * dev)
492{
493 drm_i915_private_t *dev_priv = dev->dev_private;
494 RING_LOCALS;
495

--- 166 unchanged lines hidden (view full) ---

662
663 switch (param.param) {
664 case I915_PARAM_IRQ_ACTIVE:
665 value = dev->irq ? 1 : 0;
666 break;
667 case I915_PARAM_ALLOW_BATCHBUFFER:
668 value = dev_priv->allow_batchbuffer ? 1 : 0;
669 break;
503 return 0;
504}
505
506static int i915_dispatch_flip(drm_device_t * dev)
507{
508 drm_i915_private_t *dev_priv = dev->dev_private;
509 RING_LOCALS;
510

--- 166 unchanged lines hidden (view full) ---

677
678 switch (param.param) {
679 case I915_PARAM_IRQ_ACTIVE:
680 value = dev->irq ? 1 : 0;
681 break;
682 case I915_PARAM_ALLOW_BATCHBUFFER:
683 value = dev_priv->allow_batchbuffer ? 1 : 0;
684 break;
685 case I915_PARAM_LAST_DISPATCH:
686 value = READ_BREADCRUMB(dev_priv);
687 break;
670 default:
688 default:
671 DRM_ERROR("Unkown parameter %d\n", param.param);
689 DRM_ERROR("Unknown parameter %d\n", param.param);
672 return DRM_ERR(EINVAL);
673 }
674
675 if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
676 DRM_ERROR("DRM_COPY_TO_USER failed\n");
677 return DRM_ERR(EFAULT);
678 }
679

--- 71 unchanged lines hidden (view full) ---

751 [DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, DRM_AUTH},
752 [DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, DRM_AUTH},
753 [DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, DRM_AUTH},
754 [DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, DRM_AUTH},
755 [DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
756 [DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, DRM_AUTH},
757 [DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, DRM_AUTH},
758 [DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
690 return DRM_ERR(EINVAL);
691 }
692
693 if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
694 DRM_ERROR("DRM_COPY_TO_USER failed\n");
695 return DRM_ERR(EFAULT);
696 }
697

--- 71 unchanged lines hidden (view full) ---

769 [DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, DRM_AUTH},
770 [DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, DRM_AUTH},
771 [DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, DRM_AUTH},
772 [DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, DRM_AUTH},
773 [DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
774 [DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, DRM_AUTH},
775 [DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, DRM_AUTH},
776 [DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
759 [DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, DRM_AUTH}
777 [DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, DRM_AUTH},
778 [DRM_IOCTL_NR(DRM_I915_DESTROY_HEAP)] = { i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }
760};
761
762int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
763
764/**
765 * Determine if the device really is AGP or not.
766 *
767 * All Intel graphics chipsets are treated as AGP, even if they are really
768 * PCI-e.
769 *
770 * \param dev The device to be tested.
771 *
772 * \returns
773 * A value of 1 is always retured to indictate every i9x5 is AGP.
774 */
775int i915_driver_device_is_agp(drm_device_t * dev)
776{
777 return 1;
778}
779};
780
781int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
782
783/**
784 * Determine if the device really is AGP or not.
785 *
786 * All Intel graphics chipsets are treated as AGP, even if they are really
787 * PCI-e.
788 *
789 * \param dev The device to be tested.
790 *
791 * \returns
792 * A value of 1 is always retured to indictate every i9x5 is AGP.
793 */
794int i915_driver_device_is_agp(drm_device_t * dev)
795{
796 return 1;
797}