if_dcreg.h (67314) | if_dcreg.h (67771) |
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1/* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
32 * $FreeBSD: head/sys/dev/dc/if_dcreg.h 67314 2000-10-19 08:34:32Z jon $ | 32 * $FreeBSD: head/sys/dev/dc/if_dcreg.h 67771 2000-10-28 09:00:20Z wpaul $ |
33 */ 34 35/* 36 * 21143 and clone common register definitions. 37 */ 38 39#define DC_BUSCTL 0x00 /* bus control */ 40#define DC_TXSTART 0x08 /* tx start demand */ --- 819 unchanged lines hidden (view full) --- 860 */ 861#define DC_VENDORID_XIRCOM 0x115d 862 863/* 864 * Xircom device IDs. 865 */ 866#define DC_DEVICEID_X3201 0x0003 867 | 33 */ 34 35/* 36 * 21143 and clone common register definitions. 37 */ 38 39#define DC_BUSCTL 0x00 /* bus control */ 40#define DC_TXSTART 0x08 /* tx start demand */ --- 819 unchanged lines hidden (view full) --- 860 */ 861#define DC_VENDORID_XIRCOM 0x115d 862 863/* 864 * Xircom device IDs. 865 */ 866#define DC_DEVICEID_X3201 0x0003 867 |
868/* 869 * Abocom vendor ID 870 */ 871#define DC_VENDORID_ABOCOM 0x13d1 |
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868 869/* | 872 873/* |
874 * Abocom device IDs. 875 */ 876#define DC_DEVICEID_FE2500 0xAB02 877 878/* |
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870 * PCI low memory base and low I/O base register, and 871 * other PCI registers. 872 */ 873 874#define DC_PCI_CFID 0x00 /* Id */ 875#define DC_PCI_CFCS 0x04 /* Command and status */ 876#define DC_PCI_CFRV 0x08 /* Revision */ 877#define DC_PCI_CFLT 0x0C /* Latency timer */ --- 215 unchanged lines hidden --- | 879 * PCI low memory base and low I/O base register, and 880 * other PCI registers. 881 */ 882 883#define DC_PCI_CFID 0x00 /* Id */ 884#define DC_PCI_CFCS 0x04 /* Command and status */ 885#define DC_PCI_CFRV 0x08 /* Revision */ 886#define DC_PCI_CFLT 0x0C /* Latency timer */ --- 215 unchanged lines hidden --- |