1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/dc/dcphy.c 74914 2001-03-28 09:17:56Z jhb $
33 */
34
35/*
36 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
37 * controllers. Technically we're abusing the miibus code to handle
38 * media selection and NWAY support here since there is no MII
39 * interface. However the logical operations are roughly the same,
40 * and the alternative is to create a fake MII interface in the driver,
41 * which is harder to do.
42 */
43
44#include <sys/param.h>
45#include <sys/systm.h>
46#include <sys/kernel.h>
47#include <sys/socket.h>
48#include <sys/errno.h>
49#include <sys/lock.h>
50#include <sys/module.h>
51#include <sys/mutex.h>
52#include <sys/bus.h>
53
54#include <net/if.h>
55#include <net/if_arp.h>
56#include <net/if_media.h>
57
58#include <dev/mii/mii.h>
59#include <dev/mii/miivar.h>
60#include <dev/mii/miidevs.h>
61
62#include <machine/bus_pio.h>
63#include <machine/bus_memio.h>
64#include <machine/bus.h>
65#include <machine/resource.h>
66#include <sys/bus.h>
67
68#include <pci/pcivar.h>
69
70#include <pci/if_dcreg.h>
71
72#include "miibus_if.h"
73
74#if !defined(lint)
75static const char rcsid[] =
76 "$FreeBSD: head/sys/dev/dc/dcphy.c 74914 2001-03-28 09:17:56Z jhb $";
77#endif
78
79#define DC_SETBIT(sc, reg, x) \
80 CSR_WRITE_4(sc, reg, \
81 CSR_READ_4(sc, reg) | x)
82
83#define DC_CLRBIT(sc, reg, x) \
84 CSR_WRITE_4(sc, reg, \
85 CSR_READ_4(sc, reg) & ~x)
86
87#define MIIF_AUTOTIMEOUT 0x0004
88
89/*
90 * This is the subsystem ID for the built-in 21143 ethernet
91 * in several Compaq Presario systems. Apparently these are
92 * 10Mbps only, so we need to treat them specially.
93 */
94#define COMPAQ_PRESARIO_ID 0xb0bb0e11
95
96static int dcphy_probe __P((device_t));
97static int dcphy_attach __P((device_t));
98static int dcphy_detach __P((device_t));
99
100static device_method_t dcphy_methods[] = {
101 /* device interface */
102 DEVMETHOD(device_probe, dcphy_probe),
103 DEVMETHOD(device_attach, dcphy_attach),
104 DEVMETHOD(device_detach, dcphy_detach),
105 DEVMETHOD(device_shutdown, bus_generic_shutdown),
106 { 0, 0 }
107};
108
109static devclass_t dcphy_devclass;
110
111static driver_t dcphy_driver = {
112 "dcphy",
113 dcphy_methods,
114 sizeof(struct mii_softc)
115};
116
117DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0);
118
119int dcphy_service __P((struct mii_softc *, struct mii_data *, int));
120void dcphy_status __P((struct mii_softc *));
121static int dcphy_auto __P((struct mii_softc *, int));
122static void dcphy_reset __P((struct mii_softc *));
123
124static int dcphy_probe(dev)
125 device_t dev;
126{
127 struct mii_attach_args *ma;
128
129 ma = device_get_ivars(dev);
130
131 /*
132 * The dc driver will report the 21143 vendor and device
133 * ID to let us know that it wants us to attach.
134 */
135 if (ma->mii_id1 != DC_VENDORID_DEC ||
136 ma->mii_id2 != DC_DEVICEID_21143)
137 return(ENXIO);
138
139 device_set_desc(dev, "Intel 21143 NWAY media interface");
140
141 return (0);
142}
143
144static int dcphy_attach(dev)
145 device_t dev;
146{
147 struct mii_softc *sc;
148 struct mii_attach_args *ma;
149 struct mii_data *mii;
150 struct dc_softc *dc_sc;
151
152 sc = device_get_softc(dev);
153 ma = device_get_ivars(dev);
154 sc->mii_dev = device_get_parent(dev);
155 mii = device_get_softc(sc->mii_dev);
156 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
157
158 sc->mii_inst = mii->mii_instance;
159 sc->mii_phy = ma->mii_phyno;
160 sc->mii_service = dcphy_service;
161 sc->mii_pdata = mii;
162
163 sc->mii_flags |= MIIF_NOISOLATE;
164 mii->mii_instance++;
165
166#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
167
168 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
169 BMCR_ISO);
170
171 /*dcphy_reset(sc);*/
172 dc_sc = mii->mii_ifp->if_softc;
173 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
174 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
175
176 switch(pci_read_config(device_get_parent(sc->mii_dev),
177 DC_PCI_CSID, 4)) {
178 case COMPAQ_PRESARIO_ID:
179 /* Example of how to only allow 10Mbps modes. */
180 sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
181 break;
182 default:
183 if (dc_sc->dc_pmode == DC_PMODE_SIA) {
184 sc->mii_capabilities =
185 BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
186 } else {
187 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
188 sc->mii_inst), BMCR_LOOP|BMCR_S100);
189
190 sc->mii_capabilities =
191 BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX|
192 BMSR_10TFDX|BMSR_10THDX;
193 }
194 break;
195 }
196
197 sc->mii_capabilities &= ma->mii_capmask;
198 device_printf(dev, " ");
199 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
200 printf("no media present");
201 else
202 mii_add_media(mii, sc->mii_capabilities, sc->mii_inst);
203 printf("\n");
204#undef ADD
205
206 MIIBUS_MEDIAINIT(sc->mii_dev);
207 return(0);
208}
209
210static int dcphy_detach(dev)
211 device_t dev;
212{
213 struct mii_softc *sc;
214 struct mii_data *mii;
215
216 sc = device_get_softc(dev);
217 mii = device_get_softc(device_get_parent(dev));
218 sc->mii_dev = NULL;
219 LIST_REMOVE(sc, mii_list);
220
221 return(0);
222}
223
224int
225dcphy_service(sc, mii, cmd)
226 struct mii_softc *sc;
227 struct mii_data *mii;
228 int cmd;
229{
230 struct dc_softc *dc_sc;
231 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
232 int reg;
233 u_int32_t mode;
234
235 dc_sc = mii->mii_ifp->if_softc;
236
237 switch (cmd) {
238 case MII_POLLSTAT:
239 /*
240 * If we're not polling our PHY instance, just return.
241 */
242 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
243 return (0);
244 }
245 break;
246
247 case MII_MEDIACHG:
248 /*
249 * If the media indicates a different PHY instance,
250 * isolate ourselves.
251 */
252 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
253 return (0);
254 }
255
256 /*
257 * If the interface is not up, don't do anything.
258 */
259 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
260 break;
261
262 sc->mii_flags = 0;
263 mii->mii_media_active = IFM_NONE;
264 mode = CSR_READ_4(dc_sc, DC_NETCFG);
265 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL|
266 DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL);
267
268 switch (IFM_SUBTYPE(ife->ifm_media)) {
269 case IFM_AUTO:
270 /*dcphy_reset(sc);*/
271 sc->mii_flags &= ~MIIF_DOINGAUTO;
272 (void) dcphy_auto(sc, 0);
273 break;
274 case IFM_100_T4:
275 /*
276 * XXX Not supported as a manual setting right now.
277 */
278 return (EINVAL);
279 case IFM_100_TX:
280 dcphy_reset(sc);
281 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
282 mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS|
283 DC_NETCFG_SCRAMBLER;
284 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
285 mode |= DC_NETCFG_FULLDUPLEX;
286 else
287 mode &= ~DC_NETCFG_FULLDUPLEX;
288 CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
289 break;
290 case IFM_10_T:
291 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
292 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
293 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
294 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
295 else
296 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
297 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
298 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
299 mode &= ~DC_NETCFG_PORTSEL;
300 mode |= DC_NETCFG_SPEEDSEL;
301 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
302 mode |= DC_NETCFG_FULLDUPLEX;
303 else
304 mode &= ~DC_NETCFG_FULLDUPLEX;
305 CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
306 break;
307 default:
308 return(EINVAL);
309 break;
310 }
311 break;
312
313 case MII_TICK:
314 /*
315 * If we're not currently selected, just return.
316 */
317 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
318 return (0);
319
320 /*
321 * Only used for autonegotiation.
322 */
323 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
324 return (0);
325
326 /*
327 * Is the interface even up?
328 */
329 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
330 return (0);
331
332 reg = CSR_READ_4(dc_sc, DC_10BTSTAT) &
333 (DC_TSTAT_LS10|DC_TSTAT_LS100);
334
335 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
336 return(0);
337
338 /*
339 * Only retry autonegotiation every 5 seconds.
340 */
341 if (++sc->mii_ticks != 50)
342 return (0);
343
344 sc->mii_ticks = 0;
345 /*if (DC_IS_INTEL(dc_sc))*/
346 sc->mii_flags &= ~MIIF_DOINGAUTO;
347 dcphy_auto(sc, 0);
348
349 break;
350 }
351
352 /* Update the media status. */
353 dcphy_status(sc);
354
355 /* Callback if something changed. */
356 if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
357 MIIBUS_STATCHG(sc->mii_dev);
358 sc->mii_active = mii->mii_media_active;
359 }
360 return (0);
361}
362
363void
364dcphy_status(sc)
365 struct mii_softc *sc;
366{
367 struct mii_data *mii = sc->mii_pdata;
368 int reg, anlpar, tstat = 0;
369 struct dc_softc *dc_sc;
370
371 dc_sc = mii->mii_ifp->if_softc;
372
373 mii->mii_media_status = IFM_AVALID;
374 mii->mii_media_active = IFM_ETHER;
375
376 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
377 return;
378
379 reg = CSR_READ_4(dc_sc, DC_10BTSTAT) &
380 (DC_TSTAT_LS10|DC_TSTAT_LS100);
381
382 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
383 mii->mii_media_status |= IFM_ACTIVE;
384
385 if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
386 /* Erg, still trying, I guess... */
387 tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
388 if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
389 if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
390 (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
391 goto skip;
392 mii->mii_media_active |= IFM_NONE;
393 return;
394 }
395
396 if (tstat & DC_TSTAT_LP_CAN_NWAY) {
397 anlpar = tstat >> 16;
398 if (anlpar & ANLPAR_T4 &&
399 sc->mii_capabilities & BMSR_100TXHDX)
400 mii->mii_media_active |= IFM_100_T4;
401 else if (anlpar & ANLPAR_TX_FD &&
402 sc->mii_capabilities & BMSR_100TXFDX)
403 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
404 else if (anlpar & ANLPAR_TX &&
405 sc->mii_capabilities & BMSR_100TXHDX)
406 mii->mii_media_active |= IFM_100_TX;
407 else if (anlpar & ANLPAR_10_FD)
408 mii->mii_media_active |= IFM_10_T|IFM_FDX;
409 else if (anlpar & ANLPAR_10)
410 mii->mii_media_active |= IFM_10_T;
411 else
412 mii->mii_media_active |= IFM_NONE;
413 if (DC_IS_INTEL(dc_sc))
414 DC_CLRBIT(dc_sc, DC_10BTCTRL,
415 DC_TCTL_AUTONEGENBL);
416 return;
417 }
418 /*
419 * If the other side doesn't support NWAY, then the
420 * best we can do is determine if we have a 10Mbps or
421 * 100Mbps link. There's no way to know if the link
422 * is full or half duplex, so we default to half duplex
423 * and hope that the user is clever enough to manually
424 * change the media settings if we're wrong.
425 */
426 if (!(reg & DC_TSTAT_LS100))
427 mii->mii_media_active |= IFM_100_TX;
428 else if (!(reg & DC_TSTAT_LS10))
429 mii->mii_media_active |= IFM_10_T;
430 else
431 mii->mii_media_active |= IFM_NONE;
432 if (DC_IS_INTEL(dc_sc))
433 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
434 return;
435 }
436
437skip:
438
439 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
440 mii->mii_media_active |= IFM_10_T;
441 else
442 mii->mii_media_active |= IFM_100_TX;
443 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
444 mii->mii_media_active |= IFM_FDX;
445
446 return;
447}
448
449static int
450dcphy_auto(mii, waitfor)
451 struct mii_softc *mii;
452 int waitfor;
453{
454 int i;
455 struct dc_softc *sc;
456
457 sc = mii->mii_pdata->mii_ifp->if_softc;
458
459 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) {
460 DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
461 DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
462 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
463 if (mii->mii_capabilities & BMSR_100TXHDX)
464 CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
465 else
466 CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
467 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
468 DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
469 DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
470 }
471
472 if (waitfor) {
473 /* Wait 500ms for it to complete. */
474 for (i = 0; i < 500; i++) {
475 if ((CSR_READ_4(sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT)
476 == DC_ASTAT_AUTONEGCMP)
477 return(0);
478 DELAY(1000);
479 }
480 /*
481 * Don't need to worry about clearing MIIF_DOINGAUTO.
482 * If that's set, a timeout is pending, and it will
483 * clear the flag.
484 */
485 return(EIO);
486 }
487
488 /*
489 * Just let it finish asynchronously. This is for the benefit of
490 * the tick handler driving autonegotiation. Don't want 500ms
491 * delays all the time while the system is running!
492 */
493 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0)
494 mii->mii_flags |= MIIF_DOINGAUTO;
495
496 return(EJUSTRETURN);
497}
498
499static void
500dcphy_reset(mii)
501 struct mii_softc *mii;
502{
503 struct dc_softc *sc;
504
505 sc = mii->mii_pdata->mii_ifp->if_softc;
506
507 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
508 DELAY(1000);
509 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
510
511 return;
512}
513
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/dc/dcphy.c 74914 2001-03-28 09:17:56Z jhb $
33 */
34
35/*
36 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
37 * controllers. Technically we're abusing the miibus code to handle
38 * media selection and NWAY support here since there is no MII
39 * interface. However the logical operations are roughly the same,
40 * and the alternative is to create a fake MII interface in the driver,
41 * which is harder to do.
42 */
43
44#include <sys/param.h>
45#include <sys/systm.h>
46#include <sys/kernel.h>
47#include <sys/socket.h>
48#include <sys/errno.h>
49#include <sys/lock.h>
50#include <sys/module.h>
51#include <sys/mutex.h>
52#include <sys/bus.h>
53
54#include <net/if.h>
55#include <net/if_arp.h>
56#include <net/if_media.h>
57
58#include <dev/mii/mii.h>
59#include <dev/mii/miivar.h>
60#include <dev/mii/miidevs.h>
61
62#include <machine/bus_pio.h>
63#include <machine/bus_memio.h>
64#include <machine/bus.h>
65#include <machine/resource.h>
66#include <sys/bus.h>
67
68#include <pci/pcivar.h>
69
70#include <pci/if_dcreg.h>
71
72#include "miibus_if.h"
73
74#if !defined(lint)
75static const char rcsid[] =
76 "$FreeBSD: head/sys/dev/dc/dcphy.c 74914 2001-03-28 09:17:56Z jhb $";
77#endif
78
79#define DC_SETBIT(sc, reg, x) \
80 CSR_WRITE_4(sc, reg, \
81 CSR_READ_4(sc, reg) | x)
82
83#define DC_CLRBIT(sc, reg, x) \
84 CSR_WRITE_4(sc, reg, \
85 CSR_READ_4(sc, reg) & ~x)
86
87#define MIIF_AUTOTIMEOUT 0x0004
88
89/*
90 * This is the subsystem ID for the built-in 21143 ethernet
91 * in several Compaq Presario systems. Apparently these are
92 * 10Mbps only, so we need to treat them specially.
93 */
94#define COMPAQ_PRESARIO_ID 0xb0bb0e11
95
96static int dcphy_probe __P((device_t));
97static int dcphy_attach __P((device_t));
98static int dcphy_detach __P((device_t));
99
100static device_method_t dcphy_methods[] = {
101 /* device interface */
102 DEVMETHOD(device_probe, dcphy_probe),
103 DEVMETHOD(device_attach, dcphy_attach),
104 DEVMETHOD(device_detach, dcphy_detach),
105 DEVMETHOD(device_shutdown, bus_generic_shutdown),
106 { 0, 0 }
107};
108
109static devclass_t dcphy_devclass;
110
111static driver_t dcphy_driver = {
112 "dcphy",
113 dcphy_methods,
114 sizeof(struct mii_softc)
115};
116
117DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0);
118
119int dcphy_service __P((struct mii_softc *, struct mii_data *, int));
120void dcphy_status __P((struct mii_softc *));
121static int dcphy_auto __P((struct mii_softc *, int));
122static void dcphy_reset __P((struct mii_softc *));
123
124static int dcphy_probe(dev)
125 device_t dev;
126{
127 struct mii_attach_args *ma;
128
129 ma = device_get_ivars(dev);
130
131 /*
132 * The dc driver will report the 21143 vendor and device
133 * ID to let us know that it wants us to attach.
134 */
135 if (ma->mii_id1 != DC_VENDORID_DEC ||
136 ma->mii_id2 != DC_DEVICEID_21143)
137 return(ENXIO);
138
139 device_set_desc(dev, "Intel 21143 NWAY media interface");
140
141 return (0);
142}
143
144static int dcphy_attach(dev)
145 device_t dev;
146{
147 struct mii_softc *sc;
148 struct mii_attach_args *ma;
149 struct mii_data *mii;
150 struct dc_softc *dc_sc;
151
152 sc = device_get_softc(dev);
153 ma = device_get_ivars(dev);
154 sc->mii_dev = device_get_parent(dev);
155 mii = device_get_softc(sc->mii_dev);
156 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
157
158 sc->mii_inst = mii->mii_instance;
159 sc->mii_phy = ma->mii_phyno;
160 sc->mii_service = dcphy_service;
161 sc->mii_pdata = mii;
162
163 sc->mii_flags |= MIIF_NOISOLATE;
164 mii->mii_instance++;
165
166#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
167
168 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
169 BMCR_ISO);
170
171 /*dcphy_reset(sc);*/
172 dc_sc = mii->mii_ifp->if_softc;
173 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
174 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
175
176 switch(pci_read_config(device_get_parent(sc->mii_dev),
177 DC_PCI_CSID, 4)) {
178 case COMPAQ_PRESARIO_ID:
179 /* Example of how to only allow 10Mbps modes. */
180 sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
181 break;
182 default:
183 if (dc_sc->dc_pmode == DC_PMODE_SIA) {
184 sc->mii_capabilities =
185 BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
186 } else {
187 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
188 sc->mii_inst), BMCR_LOOP|BMCR_S100);
189
190 sc->mii_capabilities =
191 BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX|
192 BMSR_10TFDX|BMSR_10THDX;
193 }
194 break;
195 }
196
197 sc->mii_capabilities &= ma->mii_capmask;
198 device_printf(dev, " ");
199 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
200 printf("no media present");
201 else
202 mii_add_media(mii, sc->mii_capabilities, sc->mii_inst);
203 printf("\n");
204#undef ADD
205
206 MIIBUS_MEDIAINIT(sc->mii_dev);
207 return(0);
208}
209
210static int dcphy_detach(dev)
211 device_t dev;
212{
213 struct mii_softc *sc;
214 struct mii_data *mii;
215
216 sc = device_get_softc(dev);
217 mii = device_get_softc(device_get_parent(dev));
218 sc->mii_dev = NULL;
219 LIST_REMOVE(sc, mii_list);
220
221 return(0);
222}
223
224int
225dcphy_service(sc, mii, cmd)
226 struct mii_softc *sc;
227 struct mii_data *mii;
228 int cmd;
229{
230 struct dc_softc *dc_sc;
231 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
232 int reg;
233 u_int32_t mode;
234
235 dc_sc = mii->mii_ifp->if_softc;
236
237 switch (cmd) {
238 case MII_POLLSTAT:
239 /*
240 * If we're not polling our PHY instance, just return.
241 */
242 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
243 return (0);
244 }
245 break;
246
247 case MII_MEDIACHG:
248 /*
249 * If the media indicates a different PHY instance,
250 * isolate ourselves.
251 */
252 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
253 return (0);
254 }
255
256 /*
257 * If the interface is not up, don't do anything.
258 */
259 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
260 break;
261
262 sc->mii_flags = 0;
263 mii->mii_media_active = IFM_NONE;
264 mode = CSR_READ_4(dc_sc, DC_NETCFG);
265 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL|
266 DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL);
267
268 switch (IFM_SUBTYPE(ife->ifm_media)) {
269 case IFM_AUTO:
270 /*dcphy_reset(sc);*/
271 sc->mii_flags &= ~MIIF_DOINGAUTO;
272 (void) dcphy_auto(sc, 0);
273 break;
274 case IFM_100_T4:
275 /*
276 * XXX Not supported as a manual setting right now.
277 */
278 return (EINVAL);
279 case IFM_100_TX:
280 dcphy_reset(sc);
281 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
282 mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS|
283 DC_NETCFG_SCRAMBLER;
284 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
285 mode |= DC_NETCFG_FULLDUPLEX;
286 else
287 mode &= ~DC_NETCFG_FULLDUPLEX;
288 CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
289 break;
290 case IFM_10_T:
291 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
292 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
293 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
294 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
295 else
296 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
297 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
298 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
299 mode &= ~DC_NETCFG_PORTSEL;
300 mode |= DC_NETCFG_SPEEDSEL;
301 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
302 mode |= DC_NETCFG_FULLDUPLEX;
303 else
304 mode &= ~DC_NETCFG_FULLDUPLEX;
305 CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
306 break;
307 default:
308 return(EINVAL);
309 break;
310 }
311 break;
312
313 case MII_TICK:
314 /*
315 * If we're not currently selected, just return.
316 */
317 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
318 return (0);
319
320 /*
321 * Only used for autonegotiation.
322 */
323 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
324 return (0);
325
326 /*
327 * Is the interface even up?
328 */
329 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
330 return (0);
331
332 reg = CSR_READ_4(dc_sc, DC_10BTSTAT) &
333 (DC_TSTAT_LS10|DC_TSTAT_LS100);
334
335 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
336 return(0);
337
338 /*
339 * Only retry autonegotiation every 5 seconds.
340 */
341 if (++sc->mii_ticks != 50)
342 return (0);
343
344 sc->mii_ticks = 0;
345 /*if (DC_IS_INTEL(dc_sc))*/
346 sc->mii_flags &= ~MIIF_DOINGAUTO;
347 dcphy_auto(sc, 0);
348
349 break;
350 }
351
352 /* Update the media status. */
353 dcphy_status(sc);
354
355 /* Callback if something changed. */
356 if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
357 MIIBUS_STATCHG(sc->mii_dev);
358 sc->mii_active = mii->mii_media_active;
359 }
360 return (0);
361}
362
363void
364dcphy_status(sc)
365 struct mii_softc *sc;
366{
367 struct mii_data *mii = sc->mii_pdata;
368 int reg, anlpar, tstat = 0;
369 struct dc_softc *dc_sc;
370
371 dc_sc = mii->mii_ifp->if_softc;
372
373 mii->mii_media_status = IFM_AVALID;
374 mii->mii_media_active = IFM_ETHER;
375
376 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
377 return;
378
379 reg = CSR_READ_4(dc_sc, DC_10BTSTAT) &
380 (DC_TSTAT_LS10|DC_TSTAT_LS100);
381
382 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
383 mii->mii_media_status |= IFM_ACTIVE;
384
385 if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
386 /* Erg, still trying, I guess... */
387 tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
388 if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
389 if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
390 (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
391 goto skip;
392 mii->mii_media_active |= IFM_NONE;
393 return;
394 }
395
396 if (tstat & DC_TSTAT_LP_CAN_NWAY) {
397 anlpar = tstat >> 16;
398 if (anlpar & ANLPAR_T4 &&
399 sc->mii_capabilities & BMSR_100TXHDX)
400 mii->mii_media_active |= IFM_100_T4;
401 else if (anlpar & ANLPAR_TX_FD &&
402 sc->mii_capabilities & BMSR_100TXFDX)
403 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
404 else if (anlpar & ANLPAR_TX &&
405 sc->mii_capabilities & BMSR_100TXHDX)
406 mii->mii_media_active |= IFM_100_TX;
407 else if (anlpar & ANLPAR_10_FD)
408 mii->mii_media_active |= IFM_10_T|IFM_FDX;
409 else if (anlpar & ANLPAR_10)
410 mii->mii_media_active |= IFM_10_T;
411 else
412 mii->mii_media_active |= IFM_NONE;
413 if (DC_IS_INTEL(dc_sc))
414 DC_CLRBIT(dc_sc, DC_10BTCTRL,
415 DC_TCTL_AUTONEGENBL);
416 return;
417 }
418 /*
419 * If the other side doesn't support NWAY, then the
420 * best we can do is determine if we have a 10Mbps or
421 * 100Mbps link. There's no way to know if the link
422 * is full or half duplex, so we default to half duplex
423 * and hope that the user is clever enough to manually
424 * change the media settings if we're wrong.
425 */
426 if (!(reg & DC_TSTAT_LS100))
427 mii->mii_media_active |= IFM_100_TX;
428 else if (!(reg & DC_TSTAT_LS10))
429 mii->mii_media_active |= IFM_10_T;
430 else
431 mii->mii_media_active |= IFM_NONE;
432 if (DC_IS_INTEL(dc_sc))
433 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
434 return;
435 }
436
437skip:
438
439 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
440 mii->mii_media_active |= IFM_10_T;
441 else
442 mii->mii_media_active |= IFM_100_TX;
443 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
444 mii->mii_media_active |= IFM_FDX;
445
446 return;
447}
448
449static int
450dcphy_auto(mii, waitfor)
451 struct mii_softc *mii;
452 int waitfor;
453{
454 int i;
455 struct dc_softc *sc;
456
457 sc = mii->mii_pdata->mii_ifp->if_softc;
458
459 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) {
460 DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
461 DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
462 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
463 if (mii->mii_capabilities & BMSR_100TXHDX)
464 CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
465 else
466 CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
467 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
468 DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
469 DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
470 }
471
472 if (waitfor) {
473 /* Wait 500ms for it to complete. */
474 for (i = 0; i < 500; i++) {
475 if ((CSR_READ_4(sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT)
476 == DC_ASTAT_AUTONEGCMP)
477 return(0);
478 DELAY(1000);
479 }
480 /*
481 * Don't need to worry about clearing MIIF_DOINGAUTO.
482 * If that's set, a timeout is pending, and it will
483 * clear the flag.
484 */
485 return(EIO);
486 }
487
488 /*
489 * Just let it finish asynchronously. This is for the benefit of
490 * the tick handler driving autonegotiation. Don't want 500ms
491 * delays all the time while the system is running!
492 */
493 if ((mii->mii_flags & MIIF_DOINGAUTO) == 0)
494 mii->mii_flags |= MIIF_DOINGAUTO;
495
496 return(EJUSTRETURN);
497}
498
499static void
500dcphy_reset(mii)
501 struct mii_softc *mii;
502{
503 struct dc_softc *sc;
504
505 sc = mii->mii_pdata->mii_ifp->if_softc;
506
507 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
508 DELAY(1000);
509 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
510
511 return;
512}
513